From d4eabea847e675bc333be1e51ead4e0be6fc976b Mon Sep 17 00:00:00 2001 From: Bert Vermeulen Date: Fri, 5 Sep 2014 03:23:32 +0200 Subject: [PATCH] scpi-pps: Add support for Rigol DP832. --- Makefile.am | 1 + src/hardware/scpi-pps/api.c | 4 +- src/hardware/scpi-pps/profiles.c | 99 ++++++++++++++++++++++++++++++++ 3 files changed, 102 insertions(+), 2 deletions(-) create mode 100644 src/hardware/scpi-pps/profiles.c diff --git a/Makefile.am b/Makefile.am index 589ae8d1..26319566 100644 --- a/Makefile.am +++ b/Makefile.am @@ -290,6 +290,7 @@ if HW_SCPI_PPS libsigrok_la_SOURCES += \ src/hardware/scpi-pps/protocol.h \ src/hardware/scpi-pps/protocol.c \ + src/hardware/scpi-pps/profiles.c \ src/hardware/scpi-pps/api.c endif if HW_SERIAL_DMM diff --git a/src/hardware/scpi-pps/api.c b/src/hardware/scpi-pps/api.c index ec84db74..0c19c017 100644 --- a/src/hardware/scpi-pps/api.c +++ b/src/hardware/scpi-pps/api.c @@ -22,8 +22,8 @@ SR_PRIV struct sr_dev_driver scpi_pps_driver_info; static struct sr_dev_driver *di = &scpi_pps_driver_info; -SR_PRIV const struct scpi_pps pps_profiles[] = {}; -unsigned int num_pps_profiles; +extern unsigned int num_pps_profiles; +extern const struct scpi_pps pps_profiles[]; static const int32_t scanopts[] = { SR_CONF_CONN, diff --git a/src/hardware/scpi-pps/profiles.c b/src/hardware/scpi-pps/profiles.c new file mode 100644 index 00000000..8de5b13c --- /dev/null +++ b/src/hardware/scpi-pps/profiles.c @@ -0,0 +1,99 @@ +/* + * This file is part of the libsigrok project. + * + * Copyright (C) 2014 Bert Vermeulen + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include "protocol.h" + +#define CH_IDX(x) (1 << x) + +enum vendors { + RIGOL, +}; + +/* Rigol DP800 series */ +static const int32_t devopts_rigol_dp800[] = { + SR_CONF_POWER_SUPPLY, + SR_CONF_CONTINUOUS, + SR_CONF_OVER_TEMPERATURE_PROTECTION, +}; + +static const int32_t devopts_cg_rigol_dp800[] = { + SR_CONF_OUTPUT_REGULATION, + SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED, + SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE, + SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD, + SR_CONF_OVER_CURRENT_PROTECTION_ENABLED, + SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE, + SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD, + SR_CONF_OUTPUT_VOLTAGE, + SR_CONF_OUTPUT_VOLTAGE_MAX, + SR_CONF_OUTPUT_CURRENT, + SR_CONF_OUTPUT_CURRENT_MAX, + SR_CONF_OUTPUT_ENABLED, +}; + +struct channel_spec ch_rigol_dp800[] = { + { "1", { 0, 30, 0.010 }, { 0, 3, 0.010 } }, + { "2", { 0, 30, 0.010 }, { 0, 3, 0.010 } }, + { "3", { 0, 5, 0.010 }, { 0, 3, 0.010 } }, +}; + +struct channel_group_spec cg_rigol_dp800[] = { + { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, + { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, + { "3", CH_IDX(2), PPS_OVP | PPS_OCP }, +}; + +struct scpi_command cmd_rigol_dp800[] = { + { SCPI_CMD_KEY_UNLOCK, "SYST:KLOCK OFF" }, + { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT? CH%s" }, + { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR? CH%s" }, + { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE? CH%s" }, + { SCPI_CMD_GET_VOLTAGE_MAX, ":SOUR%s:VOLT?" }, + { SCPI_CMD_SET_VOLTAGE_MAX, ":SOUR%s:VOLT %.6f" }, + { SCPI_CMD_GET_CURRENT_MAX, ":SOUR%s:CURR?" }, + { SCPI_CMD_SET_CURRENT_MAX, ":SOUR%s:CURR %.6f" }, + { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP? CH%s" }, + { SCPI_CMD_SET_OUTPUT_ENABLED, ":OUTP CH%s,%s" }, + { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE? CH%s" }, + { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" }, + { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP %s" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP? CH%s" }, + { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP CH%s,%s" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES? CH%s" }, + { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL? CH%s" }, + { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL CH%s,%.6f" }, + { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP? CH%s" }, + { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP CH%s,%s" }, + { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES? CH%s" }, + { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL? CH%s" }, + { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL CH%s,%.6f" }, +}; + +SR_PRIV const struct scpi_pps pps_profiles[] = { + /* Rigol DP800 series */ + { RIGOL, "Rigol", "RIGOL TECHNOLOGIES", "DP832", PPS_OTP, + ARRAY_AND_SIZE(devopts_rigol_dp800), + ARRAY_AND_SIZE(devopts_cg_rigol_dp800), + ARRAY_AND_SIZE(ch_rigol_dp800), + ARRAY_AND_SIZE(cg_rigol_dp800), + ARRAY_AND_SIZE(cmd_rigol_dp800), + }, +}; +SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles); +