diff --git a/src/main.rs b/src/main.rs index cfc45c5..b4efee6 100644 --- a/src/main.rs +++ b/src/main.rs @@ -1,6 +1,6 @@ use byteorder::{ReadBytesExt, LE}; +use std::convert::{TryFrom, TryInto}; use std::io::Cursor; -use std::convert::{TryInto, TryFrom}; use std::io::Read; struct Machine { @@ -40,9 +40,9 @@ impl Machine { Register::RY => self.RY = val, Register::RZ => self.RZ = val, Register::RTRGT => self.RTRGT = val, - Register::RSTAT => {}, // writes have no effect - Register::RCALL => {}, - Register::NULL => {}, + Register::RSTAT => {} // writes have no effect + Register::RCALL => {} + Register::NULL => {} } } @@ -69,7 +69,7 @@ impl Machine { fn write(&mut self, a: Arg, val: u16) { match a { Arg::Register(r) => self.write_reg(r, val), - Arg::SIN(v) => {}, + Arg::SIN(v) => {} Arg::SMAIN(v) => self.SMAIN[v as usize] = val, } } @@ -100,7 +100,6 @@ impl Register { } } - bitflags::bitflags! { struct Flags: u16 { const FZERO = 0b0000000000000001; @@ -116,106 +115,104 @@ bitflags::bitflags! { #[derive(Debug, Eq, PartialEq)] enum OP { -HALT = 0x000 , -NOOP = 0x001 , -INC = 0x002 , -DEC = 0x003 , -ADD = 0x004 , -SUB = 0x005 , -MUL = 0x006 , -DIV = 0x007 , -ADDC = 0x008 , -SUBC = 0x009 , -READ = 0x00A , -WRIT = 0x00B , -CPY = 0x00C , -MCPY = 0x00D , -ICPY = 0x00E , -CMP = 0x00F , -AND = 0x010 , -OR = 0x011 , -CMPL = 0x012 , -LSHF = 0x013 , -RSHF = 0x014 , -PUSH = 0x015 , -POP = 0x016 , -CFLG = 0x017 , -CALL = 0x018 , -RTRN = 0x019 , -RTRV = 0x01A , -RTL = 0x01B , -RTR = 0x01C , -CIP = 0x01D , -BSWP = 0x01E , -JUMP = 0x01F , -JZRO = 0x020 , -JEQU = 0x021 , -JLT = 0x022 , -JGT = 0x023 , -JCRY = 0x024 , -JINF = 0x025 , -JSE = 0x026 , -JSF = 0x027 , -CZRO = 0x030 , -CCRY = 0x034 , -XOR = 0x040 , -SWAP = 0x041 , -RCPT = 0x042 , -RCPF = 0x043 , + HALT = 0x000, + NOOP = 0x001, + INC = 0x002, + DEC = 0x003, + ADD = 0x004, + SUB = 0x005, + MUL = 0x006, + DIV = 0x007, + ADDC = 0x008, + SUBC = 0x009, + READ = 0x00A, + WRIT = 0x00B, + CPY = 0x00C, + MCPY = 0x00D, + ICPY = 0x00E, + CMP = 0x00F, + AND = 0x010, + OR = 0x011, + CMPL = 0x012, + LSHF = 0x013, + RSHF = 0x014, + PUSH = 0x015, + POP = 0x016, + CFLG = 0x017, + CALL = 0x018, + RTRN = 0x019, + RTRV = 0x01A, + RTL = 0x01B, + RTR = 0x01C, + CIP = 0x01D, + BSWP = 0x01E, + JUMP = 0x01F, + JZRO = 0x020, + JEQU = 0x021, + JLT = 0x022, + JGT = 0x023, + JCRY = 0x024, + JINF = 0x025, + JSE = 0x026, + JSF = 0x027, + CZRO = 0x030, + CCRY = 0x034, + XOR = 0x040, + SWAP = 0x041, + RCPT = 0x042, + RCPF = 0x043, } impl std::convert::Into for u16 { fn into(self) -> OP { match self { - - -0x000 => OP::HALT, -0x001 => OP::NOOP, -0x002 => OP::INC, -0x003 => OP::DEC, -0x004 => OP::ADD, -0x005 => OP::SUB, -0x006 => OP::MUL, -0x007 => OP::DIV, -0x008 => OP::ADDC, -0x009 => OP::SUBC, -0x00A => OP::READ, -0x00B => OP::WRIT, -0x00C => OP::CPY, -0x00D => OP::MCPY, -0x00E => OP::ICPY, -0x00F => OP::CMP, -0x010 => OP::AND, -0x011 => OP::OR, -0x012 => OP::CMPL, -0x013 => OP::LSHF, -0x014 => OP::RSHF, -0x015 => OP::PUSH, -0x016 => OP::POP, -0x017 => OP::CFLG, -0x018 => OP::CALL, -0x019 => OP::RTRN, -0x01A => OP::RTRV, -0x01B => OP::RTL, -0x01C => OP::RTR, -0x01D => OP::CIP, -0x01E => OP::BSWP, -0x01F => OP::JUMP, -0x020 => OP::JZRO, -0x021 => OP::JEQU, -0x022 => OP::JLT, -0x023 => OP::JGT, -0x024 => OP::JCRY, -0x025 => OP::JINF, -0x026 => OP::JSE, -0x027 => OP::JSF, -0x030 => OP::CZRO, -0x034 => OP::CCRY, -0x040 => OP::XOR, -0x041 => OP::SWAP, -0x042 => OP::RCPT, -0x043 => OP::RCPF, -_ => panic!(), + 0x000 => OP::HALT, + 0x001 => OP::NOOP, + 0x002 => OP::INC, + 0x003 => OP::DEC, + 0x004 => OP::ADD, + 0x005 => OP::SUB, + 0x006 => OP::MUL, + 0x007 => OP::DIV, + 0x008 => OP::ADDC, + 0x009 => OP::SUBC, + 0x00A => OP::READ, + 0x00B => OP::WRIT, + 0x00C => OP::CPY, + 0x00D => OP::MCPY, + 0x00E => OP::ICPY, + 0x00F => OP::CMP, + 0x010 => OP::AND, + 0x011 => OP::OR, + 0x012 => OP::CMPL, + 0x013 => OP::LSHF, + 0x014 => OP::RSHF, + 0x015 => OP::PUSH, + 0x016 => OP::POP, + 0x017 => OP::CFLG, + 0x018 => OP::CALL, + 0x019 => OP::RTRN, + 0x01A => OP::RTRV, + 0x01B => OP::RTL, + 0x01C => OP::RTR, + 0x01D => OP::CIP, + 0x01E => OP::BSWP, + 0x01F => OP::JUMP, + 0x020 => OP::JZRO, + 0x021 => OP::JEQU, + 0x022 => OP::JLT, + 0x023 => OP::JGT, + 0x024 => OP::JCRY, + 0x025 => OP::JINF, + 0x026 => OP::JSE, + 0x027 => OP::JSF, + 0x030 => OP::CZRO, + 0x034 => OP::CCRY, + 0x040 => OP::XOR, + 0x041 => OP::SWAP, + 0x042 => OP::RCPT, + 0x043 => OP::RCPF, + _ => panic!(), } } } @@ -314,52 +311,52 @@ fn parse_chunk(mut input: impl std::io::Read) -> Chunk { fn arg_count(opcode: OP) -> usize { match opcode { -OP::HALT => 0, -OP::NOOP => 0, -OP::INC => 1, -OP::DEC => 1, -OP::ADD => 2, -OP::SUB => 2, -OP::MUL => 2, -OP::DIV => 2, -OP::ADDC => 2, -OP::SUBC => 2, -OP::READ => 1, -OP::WRIT => 1, -OP::CPY => 2, -OP::MCPY => 3, -OP::ICPY => 2, -OP::CMP => 2, -OP::AND => 2, -OP::OR => 2, -OP::CMPL => 1, -OP::LSHF => 2, -OP::RSHF => 2, -OP::PUSH => 1, -OP::POP => 1, -OP::CFLG => 0, -OP::CALL => 3, -OP::RTRN => 0, -OP::RTRV => 0, -OP::RTL => 2, -OP::RTR => 2, -OP::CIP => 1, -OP::BSWP => 1, -OP::JUMP => 0, -OP::JZRO => 0, -OP::JEQU => 0, -OP::JLT => 0, -OP::JGT => 0, -OP::JCRY => 0, -OP::JINF => 0, -OP::JSE => 0, -OP::JSF => 0, -OP::CZRO => 0, -OP::CCRY => 0, -OP::XOR => 2, -OP::SWAP => 2, -OP::RCPT => 2, -OP::RCPF => 2, + OP::HALT => 0, + OP::NOOP => 0, + OP::INC => 1, + OP::DEC => 1, + OP::ADD => 2, + OP::SUB => 2, + OP::MUL => 2, + OP::DIV => 2, + OP::ADDC => 2, + OP::SUBC => 2, + OP::READ => 1, + OP::WRIT => 1, + OP::CPY => 2, + OP::MCPY => 3, + OP::ICPY => 2, + OP::CMP => 2, + OP::AND => 2, + OP::OR => 2, + OP::CMPL => 1, + OP::LSHF => 2, + OP::RSHF => 2, + OP::PUSH => 1, + OP::POP => 1, + OP::CFLG => 0, + OP::CALL => 3, + OP::RTRN => 0, + OP::RTRV => 0, + OP::RTL => 2, + OP::RTR => 2, + OP::CIP => 1, + OP::BSWP => 1, + OP::JUMP => 0, + OP::JZRO => 0, + OP::JEQU => 0, + OP::JLT => 0, + OP::JGT => 0, + OP::JCRY => 0, + OP::JINF => 0, + OP::JSE => 0, + OP::JSF => 0, + OP::CZRO => 0, + OP::CCRY => 0, + OP::XOR => 2, + OP::SWAP => 2, + OP::RCPT => 2, + OP::RCPF => 2, } } @@ -413,9 +410,7 @@ fn parse_instruction(mut bytes: &[u16]) -> (Instruction, usize) { }; match aflg { - AFLG::Register => { - args.push(Arg::Register(registers.remove(0))) - }, + AFLG::Register => args.push(Arg::Register(registers.remove(0))), AFLG::SIN => { args.push(Arg::SIN(bytes[0])); bytes = &bytes[1..]; @@ -429,8 +424,6 @@ fn parse_instruction(mut bytes: &[u16]) -> (Instruction, usize) { } } - - (Instruction { def, args }, consumed) } @@ -471,7 +464,7 @@ impl Machine { match oc { OP::HALT => return false, - OP::NOOP => {}, + OP::NOOP => {} OP::XOR => { let arg0 = self.read(ci.args[0]); let arg1 = self.read(ci.args[1]); @@ -649,7 +642,10 @@ impl Machine { self.write(ci.args[0], val); self.RSTAT.set(Flags::FZERO, val == 0); } - _ => { eprintln!("unsupported opcode {:?}", oc); return false; } + _ => { + eprintln!("unsupported opcode {:?}", oc); + return false; + } } if should_inc_ip { @@ -687,7 +683,7 @@ fn main() { m.SCODE[1..=code.inner().len()].copy_from_slice(code.inner()); m.input = b"\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x0a".to_vec(); -// dump_instructions(&m.SCODE[1..=code.inner().len()]); + // dump_instructions(&m.SCODE[1..=code.inner().len()]); while m.step() {} }