2020-09-11 21:50:53 +00:00
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/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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2022-03-11 21:16:52 +00:00
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* Copyright (C) 2004-2022 KiCad Developers.
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2020-09-11 21:50:53 +00:00
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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2021-06-11 21:07:02 +00:00
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#include <pcb_track.h>
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2021-06-06 19:03:10 +00:00
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#include <drc/drc_engine.h>
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2020-09-11 21:50:53 +00:00
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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#include <drc/drc_test_provider.h>
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/*
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Track width test. As the name says, checks width of the tracks (including segments and arcs)
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Errors generated:
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- DRCE_TRACK_WIDTH
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*/
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class DRC_TEST_PROVIDER_TRACK_WIDTH : public DRC_TEST_PROVIDER
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{
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public:
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DRC_TEST_PROVIDER_TRACK_WIDTH()
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{
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}
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virtual ~DRC_TEST_PROVIDER_TRACK_WIDTH()
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{
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}
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virtual bool Run() override;
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virtual const wxString GetName() const override
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{
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2022-03-11 21:16:52 +00:00
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return wxT( "width" );
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2020-09-11 21:50:53 +00:00
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};
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virtual const wxString GetDescription() const override
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{
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2022-03-11 21:16:52 +00:00
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return wxT( "Tests track widths" );
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2020-09-11 21:50:53 +00:00
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}
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};
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bool DRC_TEST_PROVIDER_TRACK_WIDTH::Run()
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{
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2020-09-17 13:36:34 +00:00
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const int delta = 100; // This is the number of tests between 2 calls to the progress bar
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2021-02-27 13:43:41 +00:00
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_TRACK_WIDTH ) )
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{
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2022-03-11 21:16:52 +00:00
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reportAux( wxT( "Track width violations ignored. Tests not run." ) );
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2021-02-27 13:43:41 +00:00
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return true; // continue with other tests
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}
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2021-01-01 22:29:15 +00:00
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if( !m_drcEngine->HasRulesForConstraintType( TRACK_WIDTH_CONSTRAINT ) )
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2020-09-11 21:50:53 +00:00
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{
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2022-03-11 21:16:52 +00:00
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reportAux( wxT( "No track width constraints found. Tests not run." ) );
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2021-02-27 13:43:41 +00:00
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return true; // continue with other tests
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2020-09-11 21:50:53 +00:00
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}
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2020-09-18 19:57:54 +00:00
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if( !reportPhase( _( "Checking track widths..." ) ) )
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2021-02-27 13:43:41 +00:00
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return false; // DRC cancelled
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2020-09-11 21:50:53 +00:00
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auto checkTrackWidth =
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[&]( BOARD_ITEM* item ) -> bool
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{
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2020-09-12 19:28:22 +00:00
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_TRACK_WIDTH ) )
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return false;
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2020-09-13 10:37:20 +00:00
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int actual;
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2022-01-01 06:04:08 +00:00
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VECTOR2I p0;
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2020-09-11 21:50:53 +00:00
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2021-06-11 21:07:02 +00:00
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if( PCB_ARC* arc = dyn_cast<PCB_ARC*>( item ) )
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2020-09-11 21:50:53 +00:00
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{
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actual = arc->GetWidth();
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p0 = arc->GetStart();
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}
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2021-06-11 21:07:02 +00:00
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else if( PCB_TRACK* trk = dyn_cast<PCB_TRACK*>( item ) )
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2020-09-11 21:50:53 +00:00
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{
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actual = trk->GetWidth();
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p0 = ( trk->GetStart() + trk->GetEnd() ) / 2;
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}
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2020-09-17 13:36:34 +00:00
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else
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{
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return true;
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}
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2020-09-11 21:50:53 +00:00
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2021-02-08 14:53:49 +00:00
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auto constraint = m_drcEngine->EvalRules( TRACK_WIDTH_CONSTRAINT, item, nullptr,
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item->GetLayer() );
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2020-09-11 21:50:53 +00:00
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bool fail_min = false;
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bool fail_max = false;
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int constraintWidth;
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2021-09-05 15:06:12 +00:00
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if( constraint.GetSeverity() != RPT_SEVERITY_IGNORE )
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2020-09-11 21:50:53 +00:00
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{
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2021-09-05 15:06:12 +00:00
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if( constraint.Value().HasMin() && actual < constraint.Value().Min() )
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{
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fail_min = true;
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constraintWidth = constraint.Value().Min();
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}
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2020-09-11 21:50:53 +00:00
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2021-09-05 15:06:12 +00:00
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if( constraint.Value().HasMax() && actual > constraint.Value().Max() )
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{
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fail_max = true;
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constraintWidth = constraint.Value().Max();
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}
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2020-09-11 21:50:53 +00:00
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}
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if( fail_min || fail_max )
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{
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_TRACK_WIDTH );
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2022-06-15 23:42:34 +00:00
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wxString msg;
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2020-09-11 21:50:53 +00:00
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2020-10-20 19:05:04 +00:00
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if( fail_min )
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{
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2022-06-15 23:42:34 +00:00
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msg.Printf( _( "(%s min width %s; actual %s)" ),
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2020-10-20 19:05:04 +00:00
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constraint.GetName(),
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MessageTextFromValue( userUnits(), constraintWidth ),
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MessageTextFromValue( userUnits(), actual ) );
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}
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else
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{
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2022-06-15 23:42:34 +00:00
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msg.Printf( _( "(%s max width %s; actual %s)" ),
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2020-10-20 19:05:04 +00:00
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constraint.GetName(),
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MessageTextFromValue( userUnits(), constraintWidth ),
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MessageTextFromValue( userUnits(), actual ) );
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}
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2020-09-11 21:50:53 +00:00
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2022-06-15 23:42:34 +00:00
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drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
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2020-09-11 21:50:53 +00:00
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drcItem->SetItems( item );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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2021-12-26 13:47:00 +00:00
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reportViolation( drcItem, p0, item->GetLayer() );
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2020-09-11 21:50:53 +00:00
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}
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return true;
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};
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2020-09-17 13:36:34 +00:00
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int ii = 0;
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2021-06-11 21:07:02 +00:00
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for( PCB_TRACK* item : m_drcEngine->GetBoard()->Tracks() )
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2020-09-17 13:36:34 +00:00
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{
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2020-09-18 19:57:54 +00:00
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if( !reportProgress( ii++, m_drcEngine->GetBoard()->Tracks().size(), delta ) )
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break;
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2020-09-17 13:36:34 +00:00
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if( !checkTrackWidth( item ) )
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break;
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}
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2020-09-11 21:50:53 +00:00
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reportRuleStatistics();
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2022-03-11 20:13:47 +00:00
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return !m_drcEngine->IsCancelled();
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2020-09-11 21:50:53 +00:00
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}
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namespace detail
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{
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static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_TRACK_WIDTH> dummy;
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2020-10-02 20:51:24 +00:00
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}
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