2020-09-23 21:49:18 +00:00
|
|
|
/*
|
|
|
|
* This program source code file is part of KiCad, a free EDA CAD application.
|
|
|
|
*
|
2023-10-28 12:01:36 +00:00
|
|
|
* Copyright (C) 2004-2023 KiCad Developers.
|
2020-09-23 21:49:18 +00:00
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License
|
|
|
|
* as published by the Free Software Foundation; either version 2
|
|
|
|
* of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
* along with this program; if not, you may find one here:
|
|
|
|
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
|
|
|
|
* or you may search the http://www.gnu.org website for the version 2 license,
|
|
|
|
* or you may write to the Free Software Foundation, Inc.,
|
|
|
|
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
2020-11-12 20:19:22 +00:00
|
|
|
#include <board.h>
|
2021-06-03 18:05:43 +00:00
|
|
|
#include <footprint.h>
|
2020-10-12 09:27:12 +00:00
|
|
|
#include <pcb_shape.h>
|
2022-07-07 21:27:29 +00:00
|
|
|
#include <pcb_track.h>
|
|
|
|
#include <geometry/shape_segment.h>
|
2020-09-23 21:49:18 +00:00
|
|
|
#include <geometry/seg.h>
|
2021-06-06 19:03:10 +00:00
|
|
|
#include <drc/drc_engine.h>
|
2020-09-23 21:49:18 +00:00
|
|
|
#include <drc/drc_item.h>
|
|
|
|
#include <drc/drc_rule.h>
|
|
|
|
#include <drc/drc_test_provider_clearance_base.h>
|
|
|
|
#include <drc/drc_rtree.h>
|
|
|
|
|
|
|
|
/*
|
|
|
|
Silk to silk clearance test. Check all silkscreen features against each other.
|
|
|
|
Errors generated:
|
2020-10-11 21:30:43 +00:00
|
|
|
- DRCE_OVERLAPPING_SILK
|
2020-09-23 21:49:18 +00:00
|
|
|
|
|
|
|
*/
|
|
|
|
|
2020-10-11 10:51:23 +00:00
|
|
|
class DRC_TEST_PROVIDER_SILK_CLEARANCE : public DRC_TEST_PROVIDER
|
2020-09-23 21:49:18 +00:00
|
|
|
{
|
|
|
|
public:
|
2020-10-26 09:46:08 +00:00
|
|
|
DRC_TEST_PROVIDER_SILK_CLEARANCE ():
|
|
|
|
m_board( nullptr ),
|
|
|
|
m_largestClearance( 0 )
|
2020-09-23 21:49:18 +00:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2020-10-11 10:51:23 +00:00
|
|
|
virtual ~DRC_TEST_PROVIDER_SILK_CLEARANCE()
|
2020-09-23 21:49:18 +00:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
virtual bool Run() override;
|
|
|
|
|
2020-10-12 23:47:36 +00:00
|
|
|
virtual const wxString GetName() const override
|
2020-09-23 21:49:18 +00:00
|
|
|
{
|
2022-03-11 21:16:52 +00:00
|
|
|
return wxT( "silk_clearance" );
|
2020-09-23 21:49:18 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
virtual const wxString GetDescription() const override
|
|
|
|
{
|
2022-03-11 21:16:52 +00:00
|
|
|
return wxT( "Tests for overlapping silkscreen features." );
|
2020-09-23 21:49:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
|
|
|
|
BOARD* m_board;
|
|
|
|
int m_largestClearance;
|
|
|
|
};
|
|
|
|
|
|
|
|
|
2020-10-11 10:51:23 +00:00
|
|
|
bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run()
|
2020-09-23 21:49:18 +00:00
|
|
|
{
|
2022-08-03 09:10:23 +00:00
|
|
|
const int progressDelta = 500;
|
2020-10-27 17:09:27 +00:00
|
|
|
|
2021-02-27 13:43:41 +00:00
|
|
|
if( m_drcEngine->IsErrorLimitExceeded( DRCE_OVERLAPPING_SILK ) )
|
|
|
|
{
|
2022-03-11 21:16:52 +00:00
|
|
|
reportAux( wxT( "Overlapping silk violations ignored. Tests not run." ) );
|
2021-02-27 13:43:41 +00:00
|
|
|
return true; // continue with other tests
|
|
|
|
}
|
|
|
|
|
2020-09-23 21:49:18 +00:00
|
|
|
m_board = m_drcEngine->GetBoard();
|
|
|
|
|
|
|
|
DRC_CONSTRAINT worstClearanceConstraint;
|
|
|
|
m_largestClearance = 0;
|
|
|
|
|
2020-11-02 16:20:00 +00:00
|
|
|
if( m_drcEngine->QueryWorstConstraint( SILK_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) )
|
2020-09-23 21:49:18 +00:00
|
|
|
m_largestClearance = worstClearanceConstraint.m_Value.Min();
|
|
|
|
|
2022-03-11 21:16:52 +00:00
|
|
|
reportAux( wxT( "Worst clearance : %d nm" ), m_largestClearance );
|
2020-10-05 13:31:10 +00:00
|
|
|
|
|
|
|
if( !reportPhase( _( "Checking silkscreen for overlapping items..." ) ) )
|
2021-02-27 13:43:41 +00:00
|
|
|
return false; // DRC cancelled
|
2020-09-23 21:49:18 +00:00
|
|
|
|
2020-10-27 17:09:27 +00:00
|
|
|
DRC_RTREE silkTree;
|
|
|
|
DRC_RTREE targetTree;
|
|
|
|
int ii = 0;
|
2021-08-15 20:54:50 +00:00
|
|
|
int items = 0;
|
|
|
|
|
|
|
|
auto countItems =
|
|
|
|
[&]( BOARD_ITEM* item ) -> bool
|
|
|
|
{
|
|
|
|
++items;
|
|
|
|
return true;
|
|
|
|
};
|
2020-09-23 21:49:18 +00:00
|
|
|
|
2020-10-11 10:51:23 +00:00
|
|
|
auto addToSilkTree =
|
2021-08-15 20:54:50 +00:00
|
|
|
[&]( BOARD_ITEM* item ) -> bool
|
2020-09-23 21:49:18 +00:00
|
|
|
{
|
2022-08-03 09:10:23 +00:00
|
|
|
if( !reportProgress( ii++, items, progressDelta ) )
|
2021-08-15 20:54:50 +00:00
|
|
|
return false;
|
|
|
|
|
2021-06-02 13:00:11 +00:00
|
|
|
for( PCB_LAYER_ID layer : { F_SilkS, B_SilkS } )
|
|
|
|
{
|
|
|
|
if( item->IsOnLayer( layer ) )
|
|
|
|
silkTree.Insert( item, layer );
|
|
|
|
}
|
|
|
|
|
2020-09-23 21:49:18 +00:00
|
|
|
return true;
|
|
|
|
};
|
|
|
|
|
2020-10-11 10:51:23 +00:00
|
|
|
auto addToTargetTree =
|
2020-10-27 17:09:27 +00:00
|
|
|
[&]( BOARD_ITEM* item ) -> bool
|
2020-10-11 10:51:23 +00:00
|
|
|
{
|
2022-08-03 09:10:23 +00:00
|
|
|
if( !reportProgress( ii++, items, progressDelta ) )
|
2020-10-27 17:09:27 +00:00
|
|
|
return false;
|
|
|
|
|
2021-06-02 13:00:11 +00:00
|
|
|
for( PCB_LAYER_ID layer : item->GetLayerSet().Seq() )
|
|
|
|
targetTree.Insert( item, layer );
|
|
|
|
|
2020-10-11 10:51:23 +00:00
|
|
|
return true;
|
|
|
|
};
|
|
|
|
|
2021-08-15 20:54:50 +00:00
|
|
|
forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ), countItems );
|
|
|
|
|
|
|
|
forEachGeometryItem( s_allBasicItems,
|
|
|
|
LSET::FrontMask() | LSET::BackMask() | LSET( 2, Edge_Cuts, Margin ),
|
|
|
|
countItems );
|
|
|
|
|
|
|
|
forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ), addToSilkTree );
|
|
|
|
|
|
|
|
forEachGeometryItem( s_allBasicItems,
|
|
|
|
LSET::FrontMask() | LSET::BackMask() | LSET( 2, Edge_Cuts, Margin ),
|
|
|
|
addToTargetTree );
|
|
|
|
|
2022-03-11 21:16:52 +00:00
|
|
|
reportAux( wxT( "Testing %d silkscreen features against %d board items." ),
|
2021-08-15 20:54:50 +00:00
|
|
|
silkTree.size(),
|
|
|
|
targetTree.size() );
|
|
|
|
|
|
|
|
const std::vector<DRC_RTREE::LAYER_PAIR> layerPairs =
|
|
|
|
{
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, F_SilkS ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, F_Mask ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, F_Adhes ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, F_Paste ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, F_CrtYd ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, F_Fab ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, F_Cu ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, Edge_Cuts ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( F_SilkS, Margin ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, B_SilkS ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, B_Mask ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, B_Adhes ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, B_Paste ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, B_CrtYd ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, B_Fab ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, B_Cu ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, Edge_Cuts ),
|
|
|
|
DRC_RTREE::LAYER_PAIR( B_SilkS, Margin )
|
|
|
|
};
|
|
|
|
|
|
|
|
targetTree.QueryCollidingPairs( &silkTree, layerPairs,
|
2022-06-03 23:01:52 +00:00
|
|
|
[&]( const DRC_RTREE::LAYER_PAIR& aLayers, DRC_RTREE::ITEM_WITH_SHAPE* aRefItemShape,
|
|
|
|
DRC_RTREE::ITEM_WITH_SHAPE* aTestItemShape, bool* aCollisionDetected ) -> bool
|
2020-09-28 22:27:33 +00:00
|
|
|
{
|
2022-07-07 21:27:29 +00:00
|
|
|
BOARD_ITEM* refItem = aRefItemShape->parent;
|
|
|
|
const SHAPE* refShape = aRefItemShape->shape;
|
|
|
|
BOARD_ITEM* testItem = aTestItemShape->parent;
|
|
|
|
const SHAPE* testShape = aTestItemShape->shape;
|
2022-06-03 23:01:52 +00:00
|
|
|
|
2022-07-22 22:05:25 +00:00
|
|
|
std::shared_ptr<SHAPE> hole;
|
2022-06-03 23:01:52 +00:00
|
|
|
|
2020-10-11 21:30:43 +00:00
|
|
|
if( m_drcEngine->IsErrorLimitExceeded( DRCE_OVERLAPPING_SILK ) )
|
2020-09-29 20:22:45 +00:00
|
|
|
return false;
|
|
|
|
|
2022-07-07 21:27:29 +00:00
|
|
|
if( isInvisibleText( refItem ) || isInvisibleText( testItem ) )
|
2020-10-12 09:27:12 +00:00
|
|
|
return true;
|
|
|
|
|
2022-07-07 21:27:29 +00:00
|
|
|
if( testItem->IsTented() )
|
|
|
|
{
|
2022-07-22 22:05:25 +00:00
|
|
|
if( testItem->HasHole() )
|
2022-07-07 21:27:29 +00:00
|
|
|
{
|
2022-07-22 22:05:25 +00:00
|
|
|
hole = testItem->GetEffectiveHoleShape();
|
2022-07-07 21:27:29 +00:00
|
|
|
testShape = hole.get();
|
|
|
|
}
|
2022-07-22 22:05:25 +00:00
|
|
|
else
|
2022-07-07 21:27:29 +00:00
|
|
|
{
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-08-20 17:25:07 +00:00
|
|
|
DRC_CONSTRAINT constraint = m_drcEngine->EvalRules( SILK_CLEARANCE_CONSTRAINT,
|
2022-07-07 21:27:29 +00:00
|
|
|
refItem, testItem,
|
2021-08-20 17:25:07 +00:00
|
|
|
aLayers.second );
|
2020-10-12 20:13:02 +00:00
|
|
|
|
2021-09-05 15:06:12 +00:00
|
|
|
if( constraint.IsNull() || constraint.GetSeverity() == RPT_SEVERITY_IGNORE )
|
2020-10-12 20:13:02 +00:00
|
|
|
return true;
|
|
|
|
|
2021-01-23 00:09:18 +00:00
|
|
|
int minClearance = constraint.GetValue().Min();
|
|
|
|
|
|
|
|
if( minClearance < 0 )
|
|
|
|
return true;
|
|
|
|
|
2020-09-28 22:27:33 +00:00
|
|
|
int actual;
|
|
|
|
VECTOR2I pos;
|
2020-09-23 21:49:18 +00:00
|
|
|
|
2020-10-12 09:27:12 +00:00
|
|
|
// Graphics are often compound shapes so ignore collisions between shapes in a
|
2023-03-30 11:49:23 +00:00
|
|
|
// single footprint or on the board (both parent footprints will be nullptr).
|
|
|
|
if( refItem->Type() == PCB_SHAPE_T && testItem->Type() == PCB_SHAPE_T
|
2022-07-07 21:27:29 +00:00
|
|
|
&& refItem->GetParentFootprint() == testItem->GetParentFootprint() )
|
2022-06-04 18:33:38 +00:00
|
|
|
{
|
|
|
|
return true;
|
2020-09-28 22:27:33 +00:00
|
|
|
}
|
2020-09-23 21:49:18 +00:00
|
|
|
|
2022-07-07 21:27:29 +00:00
|
|
|
if( refShape->Collide( testShape, minClearance, &actual, &pos ) )
|
2021-01-23 00:09:18 +00:00
|
|
|
{
|
|
|
|
std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_OVERLAPPING_SILK );
|
2020-09-23 21:49:18 +00:00
|
|
|
|
2021-01-23 00:09:18 +00:00
|
|
|
if( minClearance > 0 )
|
|
|
|
{
|
2022-10-06 20:52:17 +00:00
|
|
|
wxString msg = formatMsg( _( "(%s clearance %s; actual %s)" ),
|
|
|
|
constraint.GetParentRule()->m_Name,
|
|
|
|
minClearance,
|
|
|
|
actual );
|
2020-10-06 12:20:29 +00:00
|
|
|
|
2022-06-15 23:42:34 +00:00
|
|
|
drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
|
2021-01-23 00:09:18 +00:00
|
|
|
}
|
2020-10-06 12:20:29 +00:00
|
|
|
|
2022-07-07 21:27:29 +00:00
|
|
|
drcItem->SetItems( refItem, testItem );
|
2021-01-23 00:09:18 +00:00
|
|
|
drcItem->SetViolatingRule( constraint.GetParentRule() );
|
2020-10-06 12:20:29 +00:00
|
|
|
|
2022-01-02 02:06:40 +00:00
|
|
|
reportViolation( drcItem, pos, aLayers.second );
|
2020-09-23 21:49:18 +00:00
|
|
|
|
2021-01-23 00:09:18 +00:00
|
|
|
*aCollisionDetected = true;
|
|
|
|
}
|
2020-09-23 21:49:18 +00:00
|
|
|
|
2020-09-29 20:22:45 +00:00
|
|
|
return true;
|
2021-08-15 20:54:50 +00:00
|
|
|
},
|
|
|
|
m_largestClearance,
|
|
|
|
[&]( int aCount, int aSize ) -> bool
|
|
|
|
{
|
2022-08-03 09:10:23 +00:00
|
|
|
return reportProgress( aCount, aSize, progressDelta );
|
2021-08-15 20:54:50 +00:00
|
|
|
} );
|
2020-09-23 21:49:18 +00:00
|
|
|
|
|
|
|
reportRuleStatistics();
|
|
|
|
|
2022-03-11 20:13:47 +00:00
|
|
|
return !m_drcEngine->IsCancelled();
|
2020-09-23 21:49:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
namespace detail
|
|
|
|
{
|
2020-10-11 10:51:23 +00:00
|
|
|
static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_SILK_CLEARANCE> dummy;
|
2020-10-01 16:49:17 +00:00
|
|
|
}
|