diff --git a/pcbnew/plugins/eagle/eagle_plugin.cpp b/pcbnew/plugins/eagle/eagle_plugin.cpp
index b14f532a93..c5960e50d0 100644
--- a/pcbnew/plugins/eagle/eagle_plugin.cpp
+++ b/pcbnew/plugins/eagle/eagle_plugin.cpp
@@ -409,6 +409,10 @@ BOARD* EAGLE_PLUGIN::Load( const wxString& aFileName, BOARD* aAppendToMe,
         auto finishNetclass =
                 [&]( NETCLASSPTR netclass )
                 {
+                    // If Eagle has a clearance matrix then we'll build custom rules from that.
+                    // Netclasses should just be the board minimum clearance.
+                    netclass->SetClearance( KiROUND( designSettings.m_MinClearance ) );
+
                     if( netclass->GetTrackWidth() == INT_MAX )
                         netclass->SetTrackWidth( defaults.GetTrackWidth() );