diff --git a/pcbnew/tools/pcb_inspection_tool.cpp b/pcbnew/tools/pcb_inspection_tool.cpp index 45a5b1e21f..91292f11f3 100644 --- a/pcbnew/tools/pcb_inspection_tool.cpp +++ b/pcbnew/tools/pcb_inspection_tool.cpp @@ -301,7 +301,7 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent ) if( layer == F_SilkS || layer == B_SilkS ) { - r->Report( _( "Silkscreen clearance resolution for:" ) ); + r->Report( "" + _( "Silkscreen clearance resolution for:" ) + "" ); r->Report( wxString::Format( "", _( "Layer" ), @@ -325,7 +325,7 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent ) } else { - r->Report( _( "Clearance resolution for:" ) ); + r->Report( "" + _( "Clearance resolution for:" ) + "" ); r->Report( wxString::Format( "", _( "Layer" ), @@ -401,11 +401,20 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) compileError = true; } + for( ZONE_CONTAINER* zone : m_frame->GetBoard()->Zones() ) + zone->CacheBoundingBox(); + + for( MODULE* module : m_frame->GetBoard()->Modules() ) + { + for( ZONE_CONTAINER* zone : module->Zones() ) + zone->CacheBoundingBox(); + } + if( item->Type() == PCB_TRACE_T ) { - WX_HTML_REPORT_BOX* r = m_inspectConstraintsDialog->AddPage( "Track Width" ); + WX_HTML_REPORT_BOX* r = m_inspectConstraintsDialog->AddPage( _( "Track Width" ) ); - r->Report( _( "Track width resolution for:" ) ); + r->Report( "" + _( "Track width resolution for:" ) + "" ); r->Report( "" ); r->Report( "" ); @@ -440,9 +449,9 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) if( item->Type() == PCB_VIA_T ) { - WX_HTML_REPORT_BOX* r = m_inspectConstraintsDialog->AddPage( "Via Diameter" ); + WX_HTML_REPORT_BOX* r = m_inspectConstraintsDialog->AddPage( _( "Via Diameter" ) ); - r->Report( _( "Via diameter resolution for:" ) ); + r->Report( "" + _( "Via diameter resolution for:" ) + "" ); r->Report( "" ); r->Report( "" ); @@ -474,9 +483,9 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) r->Flush(); - r = m_inspectConstraintsDialog->AddPage( "Via Annular Width" ); + r = m_inspectConstraintsDialog->AddPage( _( "Via Annular Width" ) ); - r->Report( _( "Via annular width resolution for:" ) ); + r->Report( "" + _( "Via annular width resolution for:" ) + "" ); r->Report( "" ); r->Report( "" ); @@ -512,9 +521,9 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) if( ( item->Type() == PCB_PAD_T && static_cast( item )->GetDrillSize().x > 0 ) || item->Type() == PCB_VIA_T ) { - WX_HTML_REPORT_BOX* r = m_inspectConstraintsDialog->AddPage( "Hole Size" ); + WX_HTML_REPORT_BOX* r = m_inspectConstraintsDialog->AddPage( _( "Hole Size" ) ); - r->Report( _( "Hole diameter resolution for:" ) ); + r->Report( "" + _( "Hole diameter resolution for:" ) + "" ); r->Report( "" ); r->Report( "" ); @@ -541,6 +550,33 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent ) r->Flush(); } + WX_HTML_REPORT_BOX* r = m_inspectConstraintsDialog->AddPage( _( "Keepouts" ) ); + + r->Report( "" + _( "Keepout resolution for:" ) + "" ); + r->Report( "" ); + r->Report( "" ); + + if( compileError ) + { + r->Report( "" ); + r->Report( _( "Report incomplete: could not compile design rules. " ) + + "" + _( "Show design rules." ) + "" ); + } + else + { + auto constraint = drcEngine.EvalRulesForItems( DRC_CONSTRAINT_TYPE_DISALLOW, item, + nullptr, UNDEFINED_LAYER, r ); + + r->Report( "" ); + + if( constraint.m_DisallowFlags ) + r->Report( _( "Item disallowed at current location." ) ); + else + r->Report( _( "Item allowed at current location." ) ); + } + + r->Flush(); + m_inspectConstraintsDialog->FinishInitialization(); m_inspectConstraintsDialog->Raise(); m_inspectConstraintsDialog->Show( true );