diff --git a/pcbnew/drc/drc_engine.cpp b/pcbnew/drc/drc_engine.cpp
index f120ea6155..a9dd199256 100644
--- a/pcbnew/drc/drc_engine.cpp
+++ b/pcbnew/drc/drc_engine.cpp
@@ -366,14 +366,6 @@ void DRC_ENGINE::loadImplicitRules()
 
     // 3) keepout area rules
 
-    auto addKeepoutConstraint =
-            [&rule]( int aConstraint )
-            {
-                DRC_CONSTRAINT disallowConstraint( DISALLOW_CONSTRAINT );
-                disallowConstraint.m_DisallowFlags = aConstraint;
-                rule->AddConstraint( disallowConstraint );
-            };
-
     std::vector<ZONE*> keepoutZones;
 
     for( ZONE* zone : m_board->Zones() )
@@ -410,20 +402,26 @@ void DRC_ENGINE::loadImplicitRules()
 
         rule->m_LayerCondition = zone->GetLayerSet();
 
+        int disallowFlags = 0;
+
         if( zone->GetDoNotAllowTracks() )
-            addKeepoutConstraint( DRC_DISALLOW_TRACKS );
+            disallowFlags |= DRC_DISALLOW_TRACKS;
 
         if( zone->GetDoNotAllowVias() )
-            addKeepoutConstraint( DRC_DISALLOW_VIAS );
+            disallowFlags |= DRC_DISALLOW_VIAS;
 
         if( zone->GetDoNotAllowPads() )
-            addKeepoutConstraint( DRC_DISALLOW_PADS );
+            disallowFlags |= DRC_DISALLOW_PADS;
 
         if( zone->GetDoNotAllowCopperPour() )
-            addKeepoutConstraint( DRC_DISALLOW_ZONES );
+            disallowFlags |= DRC_DISALLOW_ZONES;
 
         if( zone->GetDoNotAllowFootprints() )
-            addKeepoutConstraint( DRC_DISALLOW_FOOTPRINTS );
+            disallowFlags |= DRC_DISALLOW_FOOTPRINTS;
+
+        DRC_CONSTRAINT disallowConstraint( DISALLOW_CONSTRAINT );
+        disallowConstraint.m_DisallowFlags = disallowFlags;
+        rule->AddConstraint( disallowConstraint );
     }
 
     ReportAux( wxString::Format( "Building %d implicit netclass rules",
diff --git a/pcbnew/drc/drc_rule_parser.cpp b/pcbnew/drc/drc_rule_parser.cpp
index 78c5520bb9..e23e376baf 100644
--- a/pcbnew/drc/drc_rule_parser.cpp
+++ b/pcbnew/drc/drc_rule_parser.cpp
@@ -290,11 +290,11 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
     case T_diff_pair_gap:       constraint.m_Type = DIFF_PAIR_GAP_CONSTRAINT;            break;
     case T_diff_pair_uncoupled: constraint.m_Type = DIFF_PAIR_MAX_UNCOUPLED_CONSTRAINT;  break;
     default:
-    // fixme: message
         msg.Printf( _( "Unrecognized item '%s'.| Expected %s." ),
                     FromUTF8(),
-                    "'clearance', 'track_width', 'annular_width', 'hole', 'disallow'."
-                   );
+                    "'clearance', 'hole_clearance', 'edge_clearance', 'hole', hole_to_hole',"
+                    "'courtyard_clearance', 'silk_clearance', 'track_width', 'annular_width', "
+                    "'disallow', 'length', 'skew', 'diff_pair_gap' or 'diff_pair_uncoupled'." );
         reportError( msg );
     }
 
@@ -325,9 +325,8 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
             default:
                 msg.Printf( _( "Unrecognized item '%s'.| Expected %s." ),
                             FromUTF8(),
-                            "'track', 'via', 'micro_via', 'blind_via', 'pad', 'zone', 'text', "
-                            "'graphic', 'hole'."
-                            );
+                            "'track', 'via', 'micro_via', 'buried_via', 'pad', 'zone', 'text', "
+                            "'graphic', 'hole' or 'footprint'." );
                 reportError( msg );
                 break;
             }
@@ -336,6 +335,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
         if( (int) CurTok() != DSN_RIGHT )
             reportError( _( "Missing ')'." ) );
 
+        aRule->AddConstraint( constraint );
         return;
     }
 
diff --git a/pcbnew/tools/pcb_inspection_tool.cpp b/pcbnew/tools/pcb_inspection_tool.cpp
index e9e2e95d99..6317d4e2fb 100644
--- a/pcbnew/tools/pcb_inspection_tool.cpp
+++ b/pcbnew/tools/pcb_inspection_tool.cpp
@@ -113,6 +113,21 @@ int PCB_INSPECTION_TOOL::ShowStatisticsDialog( const TOOL_EVENT& aEvent )
 }
 
 
+wxString PCB_INSPECTION_TOOL::getItemDescription( BOARD_ITEM* aItem )
+{
+    wxString s = aItem->GetSelectMenuText( m_frame->GetUserUnits() );
+
+    if( aItem->IsConnected() )
+    {
+        BOARD_CONNECTED_ITEM* cItem = static_cast<BOARD_CONNECTED_ITEM*>( aItem );
+        s += wxS( " " ) + wxString::Format( _( "[netclass %s]" ),
+                                            cItem->GetNetClass()->GetName() );
+    }
+
+    return s;
+};
+
+
 void PCB_INSPECTION_TOOL::reportZoneConnection( ZONE* aZone, PAD* aPad, REPORTER* r )
 {
     ENUM_MAP<ZONE_CONNECTION> connectionEnum = ENUM_MAP<ZONE_CONNECTION>::Instance();
@@ -296,21 +311,6 @@ int PCB_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
     else if( !a->IsConnected() && b->IsConnected() )
         std::swap( a, b );
 
-    auto getItemDescription =
-            [&]( BOARD_ITEM* aItem )
-            {
-                wxString s = aItem->GetSelectMenuText( r->GetUnits() );
-
-                if( aItem->IsConnected() )
-                {
-                    BOARD_CONNECTED_ITEM* cItem = static_cast<BOARD_CONNECTED_ITEM*>( aItem );
-                    s += wxS( " " ) + wxString::Format( _( "[netclass %s]" ),
-                                                        cItem->GetNetClass()->GetName() );
-                }
-
-                return s;
-            };
-
     if( layer == F_SilkS || layer == B_SilkS )
     {
         r->Report( "<h7>" + _( "Silkscreen clearance resolution for:" ) + "</h7>" );
@@ -432,21 +432,6 @@ int PCB_INSPECTION_TOOL::InspectConstraints( const TOOL_EVENT& aEvent )
 
     WX_HTML_REPORT_BOX* r = nullptr;
 
-    auto getItemDescription =
-            [&]( BOARD_ITEM* aItem )
-            {
-                wxString s = aItem->GetSelectMenuText( r->GetUnits() );
-
-                if( aItem->IsConnected() )
-                {
-                    BOARD_CONNECTED_ITEM* cItem = static_cast<BOARD_CONNECTED_ITEM*>( aItem );
-                    s += wxS( " " ) + wxString::Format( _( "[netclass %s]" ),
-                                                        cItem->GetNetClass()->GetName() );
-                }
-
-                return s;
-            };
-
     if( item->Type() == PCB_TRACE_T )
     {
         r = m_inspectConstraintsDialog->AddPage( _( "Track Width" ) );
diff --git a/pcbnew/tools/pcb_inspection_tool.h b/pcbnew/tools/pcb_inspection_tool.h
index 698e121c41..7f4bc97a1f 100644
--- a/pcbnew/tools/pcb_inspection_tool.h
+++ b/pcbnew/tools/pcb_inspection_tool.h
@@ -135,6 +135,8 @@ private:
     void reportClearance( DRC_CONSTRAINT_TYPE_T aClearanceType, PCB_LAYER_ID aLayer,
                           BOARD_ITEM* aA, BOARD_ITEM* aB, REPORTER* r );
 
+    wxString getItemDescription( BOARD_ITEM* aItem );
+
 private:
     PCB_EDIT_FRAME* m_frame;    // Pointer to the currently used edit frame.