diff --git a/demos/test_xil_95108/carte_test.net b/demos/test_xil_95108/carte_test.net index 1e58080fe3..bad9681211 100644 --- a/demos/test_xil_95108/carte_test.net +++ b/demos/test_xil_95108/carte_test.net @@ -1,8 +1,8 @@ (export (version D) (design (source F:\kicad-launchpad\git_testing\demos\test_xil_95108\carte_test.sch) - (date "21/11/2017 21:10:44") - (tool "Eeschema (2017-11-21 revision 945325d)-master") + (date "27/11/2017 21:15:39") + (tool "Eeschema (2017-11-27 revision 11eb8aa)-master") (sheet (number 1) (name /) (tstamps /) (title_block (title "XC95108PC84 EXPERIMENTATION BOARD") @@ -304,10 +304,9 @@ (pin (num VI) (name VI) (type input)) (pin (num VO) (name VO) (type power_out)))) (libpart (lib carte_test_schlib) (part C) + (description "Unpolarized capacitor") (footprints - (fp SM*) - (fp C?) - (fp C1-1)) + (fp C_*)) (fields (field (name Reference) C) (field (name Value) C)) @@ -339,11 +338,9 @@ (pin (num 2) (name PM) (type passive)) (pin (num 3) (name P3) (type passive)))) (libpart (lib carte_test_schlib) (part CP) - (aliases - (alias CAPAPOL)) + (description "Polarised capacitor") (footprints - (fp CP*) - (fp SM*)) + (fp CP_*)) (fields (field (name Reference) C) (field (name Value) CP)) @@ -440,12 +437,10 @@ (pin (num 7) (name V+) (type power_in)) (pin (num 8) (name FIN1) (type passive)))) (libpart (lib carte_test_schlib) (part R) + (description Resistor) (footprints - (fp R?) - (fp SM0603) - (fp SM0805) - (fp R?-*) - (fp SM1206)) + (fp R_*) + (fp R_*)) (fields (field (name Reference) R) (field (name Value) R)) @@ -607,408 +602,372 @@ (uri F:\kicad-launchpad\git_testing\demos\test_xil_95108/carte_test_schlib.lib))) (nets (net (code 1) (name /PARBUS0) - (node (ref J1) (pin 2)) - (node (ref U2) (pin 10))) + (node (ref U2) (pin 10)) + (node (ref J1) (pin 2))) (net (code 2) (name "Net-(K1-Pad2)") - (node (ref K1) (pin 2)) - (node (ref U5) (pin 1))) + (node (ref U5) (pin 1)) + (node (ref K1) (pin 2))) (net (code 3) (name /DAT0) - (node (ref U1) (pin 12)) - (node (ref U2) (pin 69))) + (node (ref U2) (pin 69)) + (node (ref U1) (pin 12))) (net (code 4) (name /DAT4) - (node (ref U1) (pin 10)) - (node (ref U2) (pin 63))) + (node (ref U2) (pin 63)) + (node (ref U1) (pin 10))) (net (code 5) (name /DAT1) (node (ref U1) (pin 11)) (node (ref U2) (pin 66))) - (net (code 6) (name "Net-(C2-Pad1)") - (node (ref C2) (pin 1)) - (node (ref U1) (pin 14))) - (net (code 7) (name "Net-(C14-Pad1)") - (node (ref C14) (pin 1)) - (node (ref U1) (pin 15))) - (net (code 8) (name /DAT2) - (node (ref U1) (pin 3)) - (node (ref U2) (pin 70))) - (net (code 9) (name /DAT3) + (net (code 6) (name "Net-(C14-Pad1)") + (node (ref U1) (pin 15)) + (node (ref C14) (pin 1))) + (net (code 7) (name /DAT2) + (node (ref U2) (pin 70)) + (node (ref U1) (pin 3))) + (net (code 8) (name /DAT3) (node (ref U2) (pin 68)) (node (ref U1) (pin 4))) - (net (code 10) (name /DAT7) - (node (ref U2) (pin 62)) - (node (ref U1) (pin 7))) - (net (code 11) (name /DAT6) - (node (ref U2) (pin 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(code 67) (name /XIN/CLK) + (node (ref U2) (pin 12)) + (node (ref U4) (pin 4))) + (net (code 68) (name "Net-(U4-Pad12)") (node (ref U4) (pin 12))) - (net (code 98) (name "Net-(U4-Pad10)") + (net (code 69) (name "Net-(U4-Pad10)") (node (ref U4) (pin 10))) - (net (code 99) (name "Net-(C4-Pad1)") - (node (ref C4) (pin 1))) - (net (code 100) (name "Net-(C4-Pad2)") - (node (ref C4) (pin 2))) - (net (code 101) (name "Net-(R1-Pad1)") - (node (ref R1) (pin 1))) - (net (code 102) (name "Net-(R1-Pad2)") - (node (ref R1) (pin 2))) - (net (code 103) (name "Net-(C5-Pad1)") - (node (ref C5) (pin 1))) - (net (code 104) (name "Net-(C5-Pad2)") - (node (ref C5) (pin 2))) - (net (code 105) (name /TDI) + (net (code 70) (name /TDI) (node (ref U2) (pin 28)) (node (ref J2) (pin 3))) - (net (code 106) (name /TMS) + (net (code 71) (name /TMS) (node (ref J2) (pin 5)) (node (ref U2) (pin 29))) - (net (code 107) (name /TCK) - (node (ref U2) (pin 30)) - (node (ref J2) (pin 4))) - (net (code 108) (name /TDO) + (net (code 72) (name /TCK) + (node (ref J2) (pin 4)) + (node (ref U2) (pin 30))) + (net (code 73) (name /TDO) (node (ref U2) (pin 59)) (node (ref J2) (pin 2))) - (net (code 109) (name "Net-(C3-Pad1)") - (node (ref C3) (pin 1))) - (net (code 110) (name "Net-(C6-Pad1)") - (node (ref C6) (pin 1))) - (net (code 111) (name "Net-(C6-Pad2)") - (node (ref C6) (pin 2))) - (net (code 112) (name /MA2) - (node (ref U5) (pin 13)) - (node (ref U2) (pin 26))) - (net (code 113) (name /MD1) + (net (code 74) (name /MA2) + (node (ref U2) (pin 26)) + (node (ref U5) (pin 13))) + (net (code 75) (name /MD1) (node (ref U2) (pin 37)) (node (ref U5) (pin 9))) - (net (code 114) (name /MD0) - (node (ref U2) (pin 35)) - (node (ref U5) (pin 10))) - (net (code 115) (name /MD14) + (net (code 76) (name /MD0) + (node (ref U5) (pin 10)) + (node (ref U2) (pin 35))) + (net (code 77) (name /MD14) (node (ref U2) (pin 56)) (node (ref K1) (pin 3))) - (net (code 116) (name /R/W-A14) + (net (code 78) (name /R/W-A14) (node (ref U2) (pin 54)) (node (ref U5) (pin 27))) - (net (code 117) (name /OEMEM) - (node (ref U2) (pin 43)) - (node (ref U5) (pin 22))) - (net (code 118) (name /CSMEM) + (net (code 79) (name /OEMEM) + (node (ref U5) (pin 22)) + (node (ref U2) (pin 43))) + (net (code 80) (name /CSMEM) (node (ref U2) (pin 39)) (node (ref U5) (pin 20))) - (net (code 119) (name /MA7) + (net (code 81) (name /MA7) (node (ref U2) (pin 36)) (node (ref U5) (pin 19))) - (net (code 120) (name /MA6) + (net (code 82) (name /MA6) (node (ref U5) (pin 18)) (node (ref U2) (pin 34))) - (net (code 121) (name /MA5) + (net (code 83) (name /MA5) (node (ref U5) (pin 17)) (node (ref U2) (pin 31))) - (net (code 122) (name /MA4) + (net (code 84) (name /MA4) (node (ref U5) (pin 16)) (node (ref U2) (pin 24))) - (net (code 123) (name /MA3) + (net (code 85) (name /MA3) (node (ref U2) (pin 25)) (node (ref U5) (pin 15))) - (net (code 124) (name /MD2) - (node (ref U2) (pin 40)) - (node (ref U5) (pin 8))) - (net (code 125) (name /MA1) - (node (ref U2) (pin 32)) - (node (ref U5) (pin 12))) - (net (code 126) (name /MA0) - (node (ref U2) (pin 33)) - (node (ref U5) (pin 11))) - (net (code 127) (name /MD13) - (node (ref U2) (pin 53)) - (node (ref U5) (pin 26))) - (net (code 128) (name /MD12) + (net (code 86) (name /MD2) + (node (ref U5) (pin 8)) + (node (ref U2) (pin 40))) + (net (code 87) (name /MA1) + (node (ref U5) (pin 12)) + (node (ref U2) (pin 32))) + (net (code 88) (name /MA0) + (node (ref U5) (pin 11)) + (node (ref U2) (pin 33))) + (net (code 89) (name /MD13) + (node (ref U5) (pin 26)) + (node (ref U2) (pin 53))) + (net (code 90) (name /MD12) (node (ref U2) (pin 55)) (node (ref U5) (pin 2))) - (net (code 129) (name /MD11) - (node (ref U5) (pin 23)) - (node (ref U2) (pin 45))) - (net (code 130) (name /MD10) + (net (code 91) (name /MD11) + (node (ref U2) (pin 45)) + (node (ref U5) (pin 23))) + (net (code 92) (name /MD10) (node (ref U5) (pin 21)) (node (ref U2) (pin 41))) - (net (code 131) (name /MD9) + (net (code 93) (name /MD9) (node (ref U2) (pin 47)) (node (ref U5) (pin 24))) - (net (code 132) (name /PARBUS1) - (node (ref J1) (pin 3)) - (node (ref U2) (pin 7))) - (net (code 133) (name /MD8) - (node (ref U5) (pin 25)) - (node (ref U2) (pin 51))) - (net (code 134) (name /MD7) - (node (ref U2) (pin 52)) - (node (ref U5) (pin 3))) - (net (code 135) (name /MD6) + (net (code 94) (name /PARBUS1) + (node (ref U2) (pin 7)) + (node (ref J1) (pin 3))) + (net (code 95) (name /MD8) + (node (ref U2) (pin 51)) + (node (ref U5) (pin 25))) + (net (code 96) (name /MD7) + (node (ref U5) (pin 3)) + (node (ref U2) (pin 52))) + (net (code 97) (name /MD6) (node (ref U2) (pin 50)) (node (ref U5) (pin 4))) - (net (code 136) (name /MD5) + (net (code 98) (name /MD5) (node (ref U5) (pin 5)) (node (ref U2) (pin 48))) - (net (code 137) (name /MD4) - (node (ref U2) (pin 46)) - (node (ref U5) (pin 6))) - (net (code 138) (name /MD3) + (net (code 99) (name /MD4) + (node (ref U5) (pin 6)) + (node (ref U2) (pin 46))) + (net (code 100) (name /MD3) (node (ref U2) (pin 44)) (node (ref U5) (pin 7))))) \ No newline at end of file diff --git a/demos/test_xil_95108/carte_test.sch b/demos/test_xil_95108/carte_test.sch index 2393d94ef9..fcb26029b9 100644 --- a/demos/test_xil_95108/carte_test.sch +++ b/demos/test_xil_95108/carte_test.sch @@ -59,7 +59,7 @@ F 3 "" H 2300 8050 60 0001 C CNN 1 0 0 1 $EndComp $Comp -L power:GND #PWR03 +L carte_test_schlib:GND #PWR03 U 1 1 3ECDDCB7 P 2400 8650 F 0 "#PWR03" H 2400 8650 40 0001 C CNN @@ -81,7 +81,7 @@ F 3 "" H 2400 8500 60 0001 C CNN 1 0 0 1 $EndComp $Comp -L power:-12V #PWR139 +L carte_test_schlib:-12V #PWR139 U 1 1 3ECDDC9F P 2550 8050 F 0 "#PWR139" H 2550 8250 40 0001 C CNN @@ -95,7 +95,7 @@ NoConn ~ 13400 4200 NoConn ~ 13400 4100 NoConn ~ 13400 3900 $Comp -L power:-12V #PWR118 +L carte_test_schlib:-12V #PWR118 U 1 1 3ECDDC1A P 12800 3550 F 0 "#PWR118" H 12800 3750 40 0001 C CNN @@ -106,7 +106,7 @@ F 3 "" H 12800 3550 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:+12V #PWR04 +L carte_test_schlib:+12V #PWR04 U 1 1 3ECDDC05 P 12800 4450 F 0 "#PWR04" H 12800 4650 40 0001 C CNN @@ -117,7 +117,7 @@ F 3 "" H 12800 4450 60 0001 C CNN 1 0 0 1 $EndComp $Comp -L power:+12V #PWR05 +L carte_test_schlib:+12V #PWR05 U 1 1 3ECDDBF2 P 2700 7750 F 0 "#PWR05" H 2700 7950 40 0001 C CNN @@ -128,7 +128,7 @@ F 3 "" H 2700 7750 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR06 +L carte_test_schlib:GND #PWR06 U 1 1 3ECDDBE0 P 12300 4650 F 0 "#PWR06" H 12300 4650 40 0001 C CNN @@ -220,7 +220,7 @@ PIN_TEST1 Text Label 4150 2900 0 60 ~ 0 PIN_TEST0 $Comp -L power:GND #PWR07 +L carte_test_schlib:GND #PWR07 U 1 1 3ECB3F8B P 13550 1650 F 0 "#PWR07" H 13550 1650 40 0001 C CNN @@ -248,7 +248,7 @@ $EndComp Text Label 3900 3400 0 60 ~ 0 PAR_AUX7/INIT $Comp -L power:GND #PWR08 +L carte_test_schlib:GND #PWR08 U 1 1 3ECB3A8F P 1950 5000 F 0 "#PWR08" H 1950 5000 40 0001 C CNN @@ -259,7 +259,7 @@ F 3 "" H 1950 5000 60 0001 C CNN 0 -1 -1 0 $EndComp $Comp -L power:GND #PWR09 +L carte_test_schlib:GND #PWR09 U 1 1 3ECB3A8D P 1950 4800 F 0 "#PWR09" H 1950 4800 40 0001 C CNN @@ -272,7 +272,7 @@ $EndComp Text Label 3800 3200 0 60 ~ 0 PAR_AUX8/SELECT $Comp -L power:GND #PWR010 +L carte_test_schlib:GND #PWR010 U 1 1 3ECB3A50 P 1950 4400 F 0 "#PWR010" H 1950 4400 40 0001 C CNN @@ -283,7 +283,7 @@ F 3 "" H 1950 4400 60 0001 C CNN 0 -1 -1 0 $EndComp $Comp -L power:GND #PWR011 +L carte_test_schlib:GND #PWR011 U 1 1 3ECB3A4D P 1950 4200 F 0 "#PWR011" H 1950 4200 40 0001 C CNN @@ -294,7 +294,7 @@ F 3 "" H 1950 4200 60 0001 C CNN 0 -1 -1 0 $EndComp $Comp -L power:GND #PWR012 +L carte_test_schlib:GND #PWR012 U 1 1 3ECB3A4B P 1950 4000 F 0 "#PWR012" H 1950 4000 40 0001 C CNN @@ -305,7 +305,7 @@ F 3 "" H 1950 4000 60 0001 C CNN 0 -1 -1 0 $EndComp $Comp -L power:GND #PWR013 +L carte_test_schlib:GND #PWR013 U 1 1 3ECB3A48 P 1950 3800 F 0 "#PWR013" H 1950 3800 40 0001 C CNN @@ -345,7 +345,7 @@ SW1 Text Label 10600 1600 0 60 ~ 0 SW0 $Comp -L power:VCC #PWR014 +L carte_test_schlib:VCC #PWR014 U 1 1 3EC8B981 P 11200 1200 F 0 "#PWR014" H 11200 1400 40 0001 C CNN @@ -356,7 +356,7 @@ F 3 "" H 11200 1200 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR015 +L carte_test_schlib:VCC #PWR015 U 1 1 3EC8B97E P 11000 1200 F 0 "#PWR015" H 11000 1400 40 0001 C CNN @@ -393,7 +393,7 @@ SW1 Text Label 7150 3900 0 60 ~ 0 SW0 $Comp -L power:GND #PWR016 +L carte_test_schlib:GND #PWR016 U 1 1 3EC8B890 P 12350 1850 F 0 "#PWR016" H 12350 1850 40 0001 C CNN @@ -404,7 +404,7 @@ F 3 "" H 12350 1850 60 0001 C CNN 0 -1 -1 0 $EndComp $Comp -L power:GND #PWR017 +L carte_test_schlib:GND #PWR017 U 1 1 3EC8B88C P 12350 1600 F 0 "#PWR017" H 12350 1600 40 0001 C CNN @@ -447,7 +447,7 @@ PAR_AUX4/PE Text Label 7150 3700 0 60 ~ 0 PAR_AUX3/SELECT* $Comp -L power:GND #PWR018 +L carte_test_schlib:GND #PWR018 U 1 1 3EC4F034 P 1950 4600 F 0 "#PWR018" H 1950 4600 40 0001 C CNN @@ -466,7 +466,7 @@ LED2 Text Label 10750 2300 0 60 ~ 0 LED1 $Comp -L power:GND #PWR019 +L carte_test_schlib:GND #PWR019 U 1 1 3EC4D095 P 11950 2600 F 0 "#PWR019" H 11950 2600 40 0001 C CNN @@ -499,7 +499,7 @@ F 3 "" H 11250 2600 60 0001 C CNN 0 1 1 0 $EndComp $Comp -L power:GND #PWR020 +L carte_test_schlib:GND #PWR020 U 1 1 52CEE1D5 P 11950 2300 F 0 "#PWR020" H 11950 2300 40 0001 C CNN @@ -532,7 +532,7 @@ F 3 "" H 11250 2300 60 0001 C CNN 0 1 1 0 $EndComp $Comp -L power:GND #PWR021 +L carte_test_schlib:GND #PWR021 U 1 1 3EC4C7F6 P 4700 9400 F 0 "#PWR021" H 4700 9400 40 0001 C CNN @@ -543,7 +543,7 @@ F 3 "" H 4700 9400 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR022 +L carte_test_schlib:VCC #PWR022 U 1 1 3EC4C7EA P 4700 9100 F 0 "#PWR022" H 4700 9300 40 0001 C CNN @@ -565,7 +565,7 @@ F 3 "" H 4700 9250 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR023 +L carte_test_schlib:GND #PWR023 U 1 1 52CEE1D2 P 12300 7850 F 0 "#PWR023" H 12300 7850 40 0001 C CNN @@ -576,7 +576,7 @@ F 3 "" H 12300 7850 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR024 +L carte_test_schlib:VCC #PWR024 U 1 1 52CEE1CE P 12300 7550 F 0 "#PWR024" H 12300 7750 40 0001 C CNN @@ -598,7 +598,7 @@ F 3 "" H 12300 7700 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR025 +L carte_test_schlib:VCC #PWR025 U 1 1 52CEE1CD P 8000 1700 F 0 "#PWR025" H 8000 1900 40 0001 C CNN @@ -620,7 +620,7 @@ F 3 "" H 8000 1900 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR026 +L carte_test_schlib:VCC #PWR026 U 1 1 52CEE1CC P 7600 1700 F 0 "#PWR026" H 7600 1900 40 0001 C CNN @@ -642,7 +642,7 @@ F 3 "" H 7600 1900 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR027 +L carte_test_schlib:VCC #PWR027 U 1 1 52CEE1CB P 7200 1700 F 0 "#PWR027" H 7200 1900 40 0001 C CNN @@ -664,7 +664,7 @@ F 3 "" H 7200 1900 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR028 +L carte_test_schlib:GND #PWR028 U 1 1 3EC4C76B P 1950 3600 F 0 "#PWR028" H 1950 3600 40 0001 C CNN @@ -829,7 +829,7 @@ MA1 Text Label 12250 6000 0 60 ~ 0 MA0 $Comp -L power:VCC #PWR029 +L carte_test_schlib:VCC #PWR029 U 1 1 3EC4C4B5 P 9900 7600 F 0 "#PWR029" H 9900 7800 40 0001 C CNN @@ -868,7 +868,7 @@ NoConn ~ 2000 10800 NoConn ~ 2000 10300 NoConn ~ 2000 9750 $Comp -L power:GND #PWR030 +L carte_test_schlib:GND #PWR030 U 1 1 3EC4C328 P 2200 10350 F 0 "#PWR030" H 2200 10350 40 0001 C CNN @@ -879,7 +879,7 @@ F 3 "" H 2200 10350 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR031 +L carte_test_schlib:GND #PWR031 U 1 1 3EC4C322 P 1050 10900 F 0 "#PWR031" H 1050 10900 40 0001 C CNN @@ -967,7 +967,7 @@ F 3 "" H 1850 8600 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR033 +L carte_test_schlib:GND #PWR033 U 1 1 52CEE1C6 P 1850 8650 F 0 "#PWR033" H 1850 8650 40 0001 C CNN @@ -978,7 +978,7 @@ F 3 "" H 1850 8650 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR034 +L carte_test_schlib:GND #PWR034 U 1 1 52CEE1C4 P 14200 4250 F 0 "#PWR034" H 14200 4250 40 0001 C CNN @@ -994,13 +994,13 @@ U 1 1 3EC2446D P 14550 4100 F 0 "P3" V 14500 4100 40 0000 C CNN F 1 "CONN_2" V 14600 4100 40 0000 C CNN -F 2 "Connect:bornier2" H 14550 3900 60 0000 C CNN +F 2 "Connect:bornier2" H 14550 3900 30 0000 C CNN F 3 "" H 14550 4100 60 0001 C CNN 1 14550 4100 1 0 0 -1 $EndComp $Comp -L power:GND #PWR035 +L carte_test_schlib:GND #PWR035 U 1 1 3EC243DC P 2800 8250 F 0 "#PWR035" H 2800 8250 40 0001 C CNN @@ -1033,7 +1033,7 @@ F 3 "" H 2100 7800 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR036 +L carte_test_schlib:GND #PWR036 U 1 1 3EC243BD P 1500 7900 F 0 "#PWR036" H 1500 7900 40 0001 C CNN @@ -1055,7 +1055,7 @@ F 3 "" H 1150 7900 60 0001 C CNN -1 0 0 -1 $EndComp $Comp -L power:VCC #PWR037 +L carte_test_schlib:VCC #PWR037 U 1 1 3EC24382 P 3900 7750 F 0 "#PWR037" H 3900 7950 40 0001 C CNN @@ -1066,7 +1066,7 @@ F 3 "" H 3900 7750 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR038 +L carte_test_schlib:GND #PWR038 U 1 1 3EC2437A P 3400 8150 F 0 "#PWR038" H 3400 8150 40 0001 C CNN @@ -1090,7 +1090,7 @@ $EndComp Text Label 7400 8900 0 60 ~ 0 XIN/CLK $Comp -L power:GND #PWR039 +L carte_test_schlib:GND #PWR039 U 1 1 52CEE1C2 P 6300 10250 F 0 "#PWR039" H 6300 10250 40 0001 C CNN @@ -1153,7 +1153,7 @@ TCK Text Label 4550 2700 0 60 ~ 0 TDO $Comp -L power:GND #PWR040 +L carte_test_schlib:GND #PWR040 U 1 1 3EC23E6E P 3800 2200 F 0 "#PWR040" H 3800 2200 40 0001 C CNN @@ -1164,7 +1164,7 @@ F 3 "" H 3800 2200 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR041 +L carte_test_schlib:VCC #PWR041 U 1 1 52CEE1C0 P 3450 2000 F 0 "#PWR041" H 3450 2200 40 0001 C CNN @@ -1175,7 +1175,7 @@ F 3 "" H 3450 2000 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR042 +L carte_test_schlib:GND #PWR042 U 1 1 3EC23DE5 P 3900 8250 F 0 "#PWR042" H 3900 8250 40 0001 C CNN @@ -1208,7 +1208,7 @@ F 3 "" H 11400 4200 60 0001 C CNN 0 -1 -1 0 $EndComp $Comp -L power:GND #PWR043 +L carte_test_schlib:GND #PWR043 U 1 1 3EC23ADD P 9500 5100 F 0 "#PWR043" H 9500 5100 40 0001 C CNN @@ -1230,7 +1230,7 @@ F 3 "" H 9500 4950 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR044 +L carte_test_schlib:GND #PWR044 U 1 1 3EC23A35 P 10400 5000 F 0 "#PWR044" H 10400 5000 40 0001 C CNN @@ -1241,7 +1241,7 @@ F 3 "" H 10400 5000 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR045 +L carte_test_schlib:GND #PWR045 U 1 1 52CEE1C3 P 6200 7000 F 0 "#PWR045" H 6200 7000 40 0001 C CNN @@ -1252,7 +1252,7 @@ F 3 "" H 6200 7000 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR046 +L carte_test_schlib:VCC #PWR046 U 1 1 3EC239FE P 10400 3050 F 0 "#PWR046" H 10400 3250 40 0001 C CNN @@ -1263,7 +1263,7 @@ F 3 "" H 10400 3050 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:VCC #PWR047 +L carte_test_schlib:VCC #PWR047 U 1 1 52CEE1C1 P 6150 1900 F 0 "#PWR047" H 6150 2100 40 0001 C CNN @@ -1321,7 +1321,7 @@ F 3 "" H 10400 4050 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR048 +L carte_test_schlib:GND #PWR048 U 1 1 3EC23A2D P 5200 10250 F 0 "#PWR048" H 5200 10250 40 0001 C CNN @@ -1785,7 +1785,7 @@ Wire Wire Line Wire Wire Line 11250 4200 11200 4200 $Comp -L power:GND #PWR049 +L carte_test_schlib:GND #PWR049 U 1 1 52CEE1D1 P 7200 2050 F 0 "#PWR049" H 7200 2050 40 0001 C CNN @@ -1796,7 +1796,7 @@ F 3 "" H 7200 2050 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR050 +L carte_test_schlib:GND #PWR050 U 1 1 52CEE1CF P 7600 2050 F 0 "#PWR050" H 7600 2050 40 0001 C CNN @@ -1807,7 +1807,7 @@ F 3 "" H 7600 2050 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L power:GND #PWR051 +L carte_test_schlib:GND #PWR051 U 1 1 52CEE1D0 P 8000 2050 F 0 "#PWR051" H 8000 2050 40 0001 C CNN diff --git a/demos/test_xil_95108/carte_test_schlib.dcm b/demos/test_xil_95108/carte_test_schlib.dcm index f27d05b30a..f55dcca5c6 100644 --- a/demos/test_xil_95108/carte_test_schlib.dcm +++ b/demos/test_xil_95108/carte_test_schlib.dcm @@ -1,5 +1,15 @@ EESchema-DOCLIB Version 2.0 # +$CMP +12V +D power-flag symbol +K Power Flag Symbol +$ENDCMP +# +$CMP -12V +D power-flag symbol +K Power Flag Symbol +$ENDCMP +# $CMP C D Unpolarized capacitor K cap capacitor @@ -10,9 +20,19 @@ D Polarised capacitor K cap capacitor $ENDCMP # +$CMP GND +D GROUND power-flag symbol +K Power Flag Symbol +$ENDCMP +# $CMP R D Resistor K r res resistor $ENDCMP # +$CMP VCC +D power-flag symbol +K Power Flag Symbol +$ENDCMP +# #End Doc Library diff --git a/demos/test_xil_95108/carte_test_schlib.lib b/demos/test_xil_95108/carte_test_schlib.lib index 2a2ead4616..99b221632f 100644 --- a/demos/test_xil_95108/carte_test_schlib.lib +++ b/demos/test_xil_95108/carte_test_schlib.lib @@ -1,6 +1,34 @@ EESchema-LIBRARY Version 2.4 #encoding utf-8 # +# +12V +# +DEF +12V #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "+12V" 0 140 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +12V 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# -12V +# +DEF -12V #PWR 0 0 Y Y 1 F N +F0 "#PWR" 0 100 50 H I C CNN +F1 "-12V" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F +X -12V 1 0 0 0 U 50 50 0 0 W N +ENDDRAW +ENDDEF +# # 74HCT04 # DEF 74HCT04 U 0 30 Y Y 6 F N @@ -340,6 +368,19 @@ X A 2 -200 0 150 R 20 20 1 1 P ENDDRAW ENDDEF # +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# # LED # DEF LED D 0 40 Y N 1 F N @@ -523,6 +564,20 @@ X DB5 9 -800 100 300 R 50 50 1 2 I ENDDRAW ENDDEF # +# VCC +# +DEF VCC #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCC" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 75 25 0 1 0 N +P 2 0 1 0 0 0 0 50 N +X VCC 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# # XC95108PC84 # DEF XC95108PC84 U 0 30 Y Y 1 F N diff --git a/demos/test_xil_95108/fp-lib-table b/demos/test_xil_95108/fp-lib-table index 30a35b29b6..3bec5c7302 100644 --- a/demos/test_xil_95108/fp-lib-table +++ b/demos/test_xil_95108/fp-lib-table @@ -1,7 +1,7 @@ (fp_lib_table - (lib (name Capacitors_SMD)(type KiCad)(uri "$(KISYSMOD)\\Capacitors_SMD.pretty")(options "")(descr "")) - (lib (name Sockets_DIP)(type KiCad)(uri "$(KISYSMOD)\\Sockets_DIP.pretty")(options "")(descr "")) - (lib (name Pin_Headers)(type KiCad)(uri "$(KISYSMOD)/Pin_Headers.pretty")(options "")(descr "")) + (lib (name Capacitors_SMD)(type KiCad)(uri "$(KISYSMOD)/Capacitors_SMD.pretty")(options "")(descr "")) + (lib (name Sockets_DIP)(type KiCad)(uri "$(KISYSMOD)/Sockets_DIP.pretty")(options "")(descr "")) + (lib (name Pin_Headers)(type KiCad)(uri "$(KISYSMOD)/Pin_Headers.pretty")(options "")(descr "")(disabled)) (lib (name SMD_Packages)(type KiCad)(uri "$(KISYSMOD)/SMD_Packages.pretty")(options "")(descr "")) (lib (name Sockets)(type KiCad)(uri "$(KISYSMOD)/Sockets.pretty")(options "")(descr "")) )