diff --git a/pcbnew/class_track.cpp b/pcbnew/class_track.cpp index e4ad4a4ef8..d41d36aa23 100644 --- a/pcbnew/class_track.cpp +++ b/pcbnew/class_track.cpp @@ -547,28 +547,10 @@ void VIA::ViewGetLayers( int aLayers[], int& aCount ) const // Just show it on common via & via holes layers switch( GetViaType() ) { - case VIATYPE::THROUGH: - aLayers[2] = LAYER_VIA_THROUGH; - break; - - case VIATYPE::BLIND_BURIED: - aLayers[2] = LAYER_VIA_BBLIND; - aLayers[3] = m_Layer; - aLayers[4] = m_BottomLayer; - aCount += 2; - break; - - case VIATYPE::MICROVIA: - aLayers[2] = LAYER_VIA_MICROVIA; - aLayers[3] = m_Layer; - aLayers[4] = m_BottomLayer; - aCount += 2; - break; - - default: - aLayers[2] = LAYER_GP_OVERLAY; - wxASSERT( false ); - break; + case VIATYPE::THROUGH: aLayers[2] = LAYER_VIA_THROUGH; break; + case VIATYPE::BLIND_BURIED: aLayers[2] = LAYER_VIA_BBLIND; break; + case VIATYPE::MICROVIA: aLayers[2] = LAYER_VIA_MICROVIA; break; + default: aLayers[2] = LAYER_GP_OVERLAY; break; } } diff --git a/pcbnew/pcb_draw_panel_gal.cpp b/pcbnew/pcb_draw_panel_gal.cpp index 347747398c..a6bf9212c1 100644 --- a/pcbnew/pcb_draw_panel_gal.cpp +++ b/pcbnew/pcb_draw_panel_gal.cpp @@ -276,10 +276,10 @@ void PCB_DRAW_PANEL_GAL::SetHighContrastLayer( PCB_LAYER_ID aLayer ) GetNetnameLayer( aLayer ), ZONE_LAYER_FOR( aLayer ), LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES, - LAYER_PADS_TH, LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES, - LAYER_DRC_ERROR, LAYER_DRC_WARNING, LAYER_DRC_EXCLUSION, - LAYER_NON_PLATEDHOLES, LAYER_SELECT_OVERLAY, LAYER_GP_OVERLAY, - LAYER_RATSNEST, LAYER_CURSOR, LAYER_ANCHOR, LAYER_MARKER_SHADOWS + LAYER_PADS_TH, LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES, LAYER_NON_PLATEDHOLES, + LAYER_DRC_ERROR, LAYER_DRC_WARNING, LAYER_DRC_EXCLUSION, LAYER_MARKER_SHADOWS, + LAYER_SELECT_OVERLAY, LAYER_GP_OVERLAY, + LAYER_RATSNEST, LAYER_CURSOR, LAYER_ANCHOR }; for( unsigned int i : layers ) @@ -312,10 +312,12 @@ void PCB_DRAW_PANEL_GAL::SetTopLayer( PCB_LAYER_ID aLayer ) // Layers that should always have on-top attribute enabled const std::vector layers = { - LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES, LAYER_PADS_TH, - LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES, LAYER_NON_PLATEDHOLES, - LAYER_SELECT_OVERLAY, LAYER_GP_OVERLAY, LAYER_RATSNEST, LAYER_DRC_ERROR, - LAYER_DRC_WARNING, LAYER_DRC_EXCLUSION, LAYER_MARKER_SHADOWS + LAYER_VIA_THROUGH, LAYER_VIA_BBLIND, LAYER_VIA_MICROVIA, LAYER_VIAS_HOLES, + LAYER_VIAS_NETNAMES, + LAYER_PADS_TH, LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES, LAYER_NON_PLATEDHOLES, + LAYER_SELECT_OVERLAY, LAYER_GP_OVERLAY, + LAYER_RATSNEST, + LAYER_DRC_ERROR, LAYER_DRC_WARNING, LAYER_DRC_EXCLUSION, LAYER_MARKER_SHADOWS }; for( auto layer : layers ) diff --git a/pcbnew/pcb_painter.cpp b/pcbnew/pcb_painter.cpp index bb5adc5771..42c6c811ec 100644 --- a/pcbnew/pcb_painter.cpp +++ b/pcbnew/pcb_painter.cpp @@ -232,10 +232,6 @@ COLOR4D PCB_RENDER_SETTINGS::GetColor( const VIEW_ITEM* aItem, int aLayer ) cons if( item && item->Type() == PCB_ZONE_AREA_T && IsZoneLayer( aLayer ) ) aLayer = aLayer - LAYER_ZONE_START; - // Make items invisible in "other layers hidden" contrast mode - if( m_contrastModeDisplay == HIGH_CONTRAST_MODE::HIDDEN && m_highContrastLayers.count( aLayer ) == 0 ) - return COLOR4D::CLEAR; - // Hide net names in "dimmed" contrast mode if( m_hiContrastEnabled && IsNetnameLayer( aLayer ) && m_highContrastLayers.count( aLayer ) == 0 ) return COLOR4D::CLEAR; @@ -276,9 +272,7 @@ COLOR4D PCB_RENDER_SETTINGS::GetColor( const VIEW_ITEM* aItem, int aLayer ) cons if( conItem ) netCode = conItem->GetNetCode(); - bool dimmedMode = m_contrastModeDisplay == HIGH_CONTRAST_MODE::DIMMED; bool highlighted = m_highlightEnabled && m_highlightNetcodes.count( netCode ); - bool activeLayer = m_highContrastLayers.count( aLayer ); bool selected = item->IsSelected(); // Apply net color overrides @@ -326,32 +320,21 @@ COLOR4D PCB_RENDER_SETTINGS::GetColor( const VIEW_ITEM* aItem, int aLayer ) cons } // Apply high-contrast dimming - if( dimmedMode && !activeLayer && !highlighted && !selected ) - color = color.Mix( m_layerColors[LAYER_PCB_BACKGROUND], m_hiContrastFactor ); + bool isActiveLayer = m_highContrastLayers.count( aLayer ); - // For vias, some layers depend on other layers in high contrast mode - if( m_hiContrastEnabled && !selected && item->Type() == PCB_VIA_T && - ( aLayer == LAYER_VIAS_HOLES || - aLayer == LAYER_VIA_THROUGH || - aLayer == LAYER_VIA_MICROVIA || - aLayer == LAYER_VIA_BBLIND || - aLayer == LAYER_VIAS_NETNAMES ) ) + if( item->Type() == PCB_VIA_T ) { - const VIA* via = static_cast( item ); - const BOARD* pcb = static_cast( item->GetParent() ); - bool viaActiveLayer = false; - + // Via layers depend on the via crossing a high-contrast layer for( int layer : m_highContrastLayers ) - { - auto lay_id = static_cast( layer ); - viaActiveLayer |= via->IsOnLayer( lay_id ) && pcb->IsLayerVisible( lay_id ); - } + isActiveLayer |= static_cast( item )->IsOnLayer( ToLAYER_ID( layer ) ); + } - if( !viaActiveLayer && m_contrastModeDisplay == HIGH_CONTRAST_MODE::HIDDEN ) - return COLOR4D::CLEAR; - - if( !viaActiveLayer ) - color.Darken( 1.0 - m_highlightFactor ); + if( m_hiContrastEnabled && !isActiveLayer && !highlighted && !selected ) + { + if( m_contrastModeDisplay == HIGH_CONTRAST_MODE::HIDDEN ) + color = COLOR4D::CLEAR; + else + color = color.Mix( m_layerColors[LAYER_PCB_BACKGROUND], m_hiContrastFactor ); } // Apply per-type opacity overrides @@ -604,6 +587,7 @@ void PCB_PAINTER::draw( const ARC* aArc, int aLayer ) void PCB_PAINTER::draw( const VIA* aVia, int aLayer ) { VECTOR2D center( aVia->GetStart() ); + double radius = 0.0; // Draw description layer if( IsNetnameLayer( aLayer ) ) @@ -667,10 +651,24 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer ) return; } + else if( aLayer == LAYER_VIAS_HOLES ) + { + radius = getDrillSize( aVia ) / 2.0; + } + else if( ( aLayer == LAYER_VIA_THROUGH && aVia->GetViaType() == VIATYPE::THROUGH ) + || ( aLayer == LAYER_VIA_BBLIND && aVia->GetViaType() == VIATYPE::BLIND_BURIED ) + || ( aLayer == LAYER_VIA_MICROVIA && aVia->GetViaType() == VIATYPE::MICROVIA ) ) + { + radius = aVia->GetWidth() / 2.0; + } + else + { + return; + } - double radius = aVia->GetWidth() / 2.0; - - if( aLayer == LAYER_VIAS_HOLES || ( IsCopperLayer( aLayer ) && !aVia->FlashLayer( aLayer ) ) ) + /// Vias not connected to copper are optionally not drawn + /// We draw instead the hole size to ensure we show the proper clearance + if( IsCopperLayer( aLayer ) && !aVia->FlashLayer( aLayer ) ) radius = getDrillSize( aVia ) / 2.0 ; bool sketchMode = false; @@ -725,17 +723,22 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer ) if( !sketchMode ) m_gal->SetLineWidth( ( aVia->GetWidth() - aVia->GetDrillValue() ) / 2.0 ); - if( aLayer == layerTop ) - m_gal->DrawArc( center, radius, 0.0, M_PI / 2.0 ); + m_gal->DrawArc( center, radius, M_PI / 2.0, M_PI ); + m_gal->DrawArc( center, radius, 3.0 * M_PI / 2.0, 2.0 * M_PI ); - else if( aLayer == layerBottom ) - m_gal->DrawArc( center, radius, M_PI, 3.0 * M_PI / 2.0 ); + if( sketchMode ) + m_gal->SetStrokeColor( m_pcbSettings.GetColor( aVia, layerTop ) ); + else + m_gal->SetFillColor( m_pcbSettings.GetColor( aVia, layerTop ) ); - else if( aLayer == LAYER_VIA_BBLIND || aLayer == LAYER_VIA_MICROVIA ) - { - m_gal->DrawArc( center, radius, M_PI / 2.0, M_PI ); - m_gal->DrawArc( center, radius, 3.0 * M_PI / 2.0, 2.0 * M_PI ); - } + m_gal->DrawArc( center, radius, 0.0, M_PI / 2.0 ); + + if( sketchMode ) + m_gal->SetStrokeColor( m_pcbSettings.GetColor( aVia, layerBottom ) ); + else + m_gal->SetFillColor( m_pcbSettings.GetColor( aVia, layerBottom ) ); + + m_gal->DrawArc( center, radius, M_PI, 3.0 * M_PI / 2.0 ); } else {