From 123ff326d4e4af5b971c711b6605ee3042b86802 Mon Sep 17 00:00:00 2001
From: Jeff Young <jeff@rokeby.ie>
Date: Mon, 4 Sep 2023 16:05:14 +0100
Subject: [PATCH] Don't include plating thickness when drawing hole clearance
 lines.

We don't include it in the router, and the code didn't
differentiate between plated and non-plated holes, and it confuses
users.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/15575

(cherry picked from commit 0cde8cff1d2ca979968dc76ce25e70edb81ca326)
---
 pcbnew/pcb_painter.cpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/pcbnew/pcb_painter.cpp b/pcbnew/pcb_painter.cpp
index 45f03be006..6fa09e86dc 100644
--- a/pcbnew/pcb_painter.cpp
+++ b/pcbnew/pcb_painter.cpp
@@ -1623,8 +1623,6 @@ void PCB_PAINTER::draw( const PAD* aPad, int aLayer )
             }
             else if( aPad->GetEffectiveHoleShape() && clearance > 0 )
             {
-                clearance += m_holePlatingThickness;
-
                 std::shared_ptr<SHAPE_SEGMENT> slot = aPad->GetEffectiveHoleShape();
                 m_gal->DrawSegment( slot->GetSeg().A, slot->GetSeg().B,
                                     slot->GetWidth() + 2 * clearance );