From 16e708a0e7430599cac3d4384489dba925325023 Mon Sep 17 00:00:00 2001
From: jean-pierre charras <jp.charras@wanadoo.fr>
Date: Sat, 15 Jun 2024 11:20:21 +0200
Subject: [PATCH] Fix minor compil and Coverity warnings.

---
 common/widgets/mathplot.cpp              | 1 +
 eeschema/sch_io/eagle/sch_io_eagle.cpp   | 2 +-
 pcbnew/board.cpp                         | 3 +++
 pcbnew/exporters/step/step_pcb_model.cpp | 2 ++
 pcbnew/pcb_painter.cpp                   | 2 +-
 5 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/common/widgets/mathplot.cpp b/common/widgets/mathplot.cpp
index 9b2f1fe05a..b3c2232a49 100644
--- a/common/widgets/mathplot.cpp
+++ b/common/widgets/mathplot.cpp
@@ -2539,6 +2539,7 @@ mpFXYVector::mpFXYVector( const wxString& name, int flags ) :
         mpFXY( name, flags )
 {
     m_index = 0;
+    m_sweepWindow = 0;
     m_minX  = -1;
     m_maxX  = 1;
     m_minY  = -1;
diff --git a/eeschema/sch_io/eagle/sch_io_eagle.cpp b/eeschema/sch_io/eagle/sch_io_eagle.cpp
index 9d3aa30c9e..4048148cbd 100644
--- a/eeschema/sch_io/eagle/sch_io_eagle.cpp
+++ b/eeschema/sch_io/eagle/sch_io_eagle.cpp
@@ -1038,7 +1038,7 @@ SCH_SHEET* SCH_IO_EAGLE::loadModuleInstance( const std::unique_ptr<EMODULEINST>&
         portExtWire->SetEndPoint( portExtWireEndpoint );
         currentScreen->Append( portExtWire );
 
-        LABEL_FLAG_SHAPE pinType;
+        LABEL_FLAG_SHAPE pinType = LABEL_FLAG_SHAPE::L_UNSPECIFIED;
 
         if( port->direction )
         {
diff --git a/pcbnew/board.cpp b/pcbnew/board.cpp
index c464232c24..d101588447 100644
--- a/pcbnew/board.cpp
+++ b/pcbnew/board.cpp
@@ -87,6 +87,9 @@ BOARD::BOARD() :
     // A too large value do not allow safely connecting 2 shapes like very short segments.
     m_outlinesChainingEpsilon = pcbIUScale.mmToIU( DEFAULT_CHAINING_EPSILON_MM );
 
+    m_DRCMaxClearance = 0;
+    m_DRCMaxPhysicalClearance = 0;
+
     // we have not loaded a board yet, assume latest until then.
     m_fileFormatVersionAtLoad = LEGACY_BOARD_FILE_VERSION;
 
diff --git a/pcbnew/exporters/step/step_pcb_model.cpp b/pcbnew/exporters/step/step_pcb_model.cpp
index 32ec14343e..01d8ce2531 100644
--- a/pcbnew/exporters/step/step_pcb_model.cpp
+++ b/pcbnew/exporters/step/step_pcb_model.cpp
@@ -1536,11 +1536,13 @@ bool STEP_PCB_MODEL::MakeShapes( std::vector<TopoDS_Shape>& aShapes, const SHAPE
         }*/
     }
 
+    #if 0   // No longer in use
     auto toPoint = [&]( const VECTOR2D& aKiCoords ) -> gp_Pnt
     {
         return gp_Pnt( pcbIUScale.IUTomm( aKiCoords.x - aOrigin.x ),
                        -pcbIUScale.IUTomm( aKiCoords.y - aOrigin.y ), aZposition );
     };
+    #endif
 
     gp_Pln basePlane( gp_Pnt( 0.0, 0.0, aZposition ),
                       std::signbit( aThickness ) ? -gp::DZ() : gp::DZ() );
diff --git a/pcbnew/pcb_painter.cpp b/pcbnew/pcb_painter.cpp
index 8547c2a968..772e353f12 100644
--- a/pcbnew/pcb_painter.cpp
+++ b/pcbnew/pcb_painter.cpp
@@ -769,7 +769,7 @@ void PCB_PAINTER::renderNetNameForSegment( const SHAPE_SEGMENT& aSeg, const COLO
 
     // Check if the track is long enough to have a netname displayed
     int         seg_minlength = aSeg.GetWidth() * num_char;
-    SEG::ecoord seg_minlength_sq = seg_minlength * seg_minlength;
+    SEG::ecoord seg_minlength_sq = (SEG::ecoord)seg_minlength * seg_minlength;
 
     if( aSeg.GetSeg().SquaredLength() < seg_minlength_sq )
         return;