From 34e134c5e52ae50559227ea0247c3ec356ca8e02 Mon Sep 17 00:00:00 2001
From: Jeff Young <jeff@rokeby.ie>
Date: Sat, 24 Dec 2022 12:31:41 +0000
Subject: [PATCH] Don't allow clearanceEpsilon to force clearance < 0.

Also, a plated hole has the max clearance of hole_clearance and
copper_clearance.

Fixes https://gitlab.com/kicad/code/kicad/issues/13237
---
 pcbnew/router/pns_kicad_iface.cpp | 34 +++++++++++++++----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/pcbnew/router/pns_kicad_iface.cpp b/pcbnew/router/pns_kicad_iface.cpp
index d3afa3b9c6..f1dcf05a9a 100644
--- a/pcbnew/router/pns_kicad_iface.cpp
+++ b/pcbnew/router/pns_kicad_iface.cpp
@@ -448,8 +448,8 @@ int PNS_PCBNEW_RULE_RESOLVER::Clearance( const PNS::ITEM* aA, const PNS::ITEM* a
         }
     }
 
-    if( aUseClearanceEpsilon )
-        rv -= m_clearanceEpsilon;
+    if( aUseClearanceEpsilon && rv > 0 )
+        rv = std::max( 0, rv - m_clearanceEpsilon );
 
     m_clearanceCache[ key ] = rv;
     return rv;
@@ -477,8 +477,18 @@ int PNS_PCBNEW_RULE_RESOLVER::HoleClearance( const PNS::ITEM* aA, const PNS::ITE
     if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_HOLE_CLEARANCE, aA, aB, layer, &constraint ) )
         rv = constraint.m_Value.Min();
 
-    if( aUseClearanceEpsilon )
-        rv -= m_clearanceEpsilon;
+#define HAS_PLATED_HOLE( a ) ( a )->IsRoutable()
+
+    if( IsCopperLayer( layer )
+            && ( HAS_PLATED_HOLE( aA ) || HAS_PLATED_HOLE( aB ) )
+            && QueryConstraint( PNS::CONSTRAINT_TYPE::CT_CLEARANCE, aA, aB, layer, &constraint )
+            && constraint.m_Value.Min() > rv )
+    {
+        rv = constraint.m_Value.Min();
+    }
+
+    if( aUseClearanceEpsilon && rv > 0 )
+        rv = std::max( 0, rv - m_clearanceEpsilon );
 
     m_holeClearanceCache[ key ] = rv;
     return rv;
@@ -506,8 +516,8 @@ int PNS_PCBNEW_RULE_RESOLVER::HoleToHoleClearance( const PNS::ITEM* aA, const PN
     if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_HOLE_TO_HOLE, aA, aB, layer, &constraint ) )
         rv = constraint.m_Value.Min();
 
-    if( aUseClearanceEpsilon )
-        rv -= m_clearanceEpsilon;
+    if( aUseClearanceEpsilon && rv > 0 )
+        rv = std::max( 0, rv - m_clearanceEpsilon );
 
     m_holeToHoleClearanceCache[ key ] = rv;
     return rv;
@@ -1035,17 +1045,7 @@ std::unique_ptr<PNS::SOLID> PNS_KICAD_IFACE_BASE::syncPad( PAD* aPad )
     solid->SetOffset( VECTOR2I( offset.x, offset.y ) );
 
     if( aPad->GetDrillSize().x > 0 )
-    {
-        SHAPE_SEGMENT* slot = (SHAPE_SEGMENT*) aPad->GetEffectiveHoleShape()->Clone();
-
-        if( aPad->GetAttribute() != PAD_ATTRIB::NPTH )
-        {
-            BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
-            slot->SetWidth( slot->GetWidth() );
-        }
-
-        solid->SetHole( slot );
-    }
+        solid->SetHole( aPad->GetEffectiveHoleShape()->Clone() );
 
     // We generate a single SOLID for a pad, so we have to treat it as ALWAYS_FLASHED and then
     // perform layer-specific flashing tests internally.