diff --git a/include/footprint_info.h b/include/footprint_info.h
index bcd114d5b6..4456e7781d 100644
--- a/include/footprint_info.h
+++ b/include/footprint_info.h
@@ -227,6 +227,14 @@ public:
         return m_list;
     }
 
+    /**
+	 * Clears the footprint info cache
+     */
+    void Clear()
+    {
+        m_list.clear();
+    }
+
     /**
      * Get info for a module by id.
      */
diff --git a/pcbnew/files.cpp b/pcbnew/files.cpp
index 179517c169..91ae6354f8 100644
--- a/pcbnew/files.cpp
+++ b/pcbnew/files.cpp
@@ -58,6 +58,7 @@
 #include <wx/stdpaths.h>
 #include <pcb_layer_widget.h>
 #include <wx/wupdlock.h>
+#include "footprint_info_impl.h"
 
 
 //#define     USE_INSTRUMENTATION     1
@@ -468,6 +469,9 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
         LoadProjectSettings();
     }
 
+    // Clear the cache footprint list which may be project specific
+    GFootprintList.Clear();
+
     if( is_new )
     {
         OnModify();
@@ -517,6 +521,10 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
             return false;
         }
 
+        if( GFootprintList.GetCount() == 0 )
+        {
+            GFootprintList.ReadCacheFromFile( Prj().GetProjectPath() + "fp-info-cache" );
+        }
 
         // 6.0 TODO: some settings didn't make it into the board file in 5.1 so as not to
         // change the file format.  For 5.1 we must copy them across from the config-initialized
diff --git a/pcbnew/pcb_base_edit_frame.cpp b/pcbnew/pcb_base_edit_frame.cpp
index 2e2e6b3bf5..c85fe2eeed 100644
--- a/pcbnew/pcb_base_edit_frame.cpp
+++ b/pcbnew/pcb_base_edit_frame.cpp
@@ -39,10 +39,6 @@ PCB_BASE_EDIT_FRAME::PCB_BASE_EDIT_FRAME( KIWAY* aKiway, wxWindow* aParent,
         PCB_BASE_FRAME( aKiway, aParent, aFrameType, aTitle, aPos, aSize, aStyle, aFrameName ),
                         m_rotationAngle( 900 ), m_undoRedoBlocked( false )
 {
-    if( !GFootprintList.GetCount() )
-    {
-        GFootprintList.ReadCacheFromFile( Prj().GetProjectPath() + "fp-info-cache" );
-    }
 }
 
 PCB_BASE_EDIT_FRAME::~PCB_BASE_EDIT_FRAME()