diff --git a/pcbnew/router/pns_kicad_iface.cpp b/pcbnew/router/pns_kicad_iface.cpp
index 3c1255a21c..9614dcb75d 100644
--- a/pcbnew/router/pns_kicad_iface.cpp
+++ b/pcbnew/router/pns_kicad_iface.cpp
@@ -127,8 +127,6 @@ public:
 
     int ClearanceEpsilon() const { return m_clearanceEpsilon; }
 
-    void SetCacheWriteEnabled( bool aEnabled ) override { m_cacheWriteEnabled = aEnabled; }
-
     void ClearCacheForItem( const PNS::ITEM* aItem ) override;
 
 private:
@@ -152,7 +150,6 @@ private:
     PCB_ARC            m_dummyArcs[2];
     PCB_VIA            m_dummyVias[2];
     int                m_clearanceEpsilon;
-    bool               m_cacheWriteEnabled;
 
     std::unordered_map<CLEARANCE_CACHE_KEY, int> m_clearanceCache;
     std::unordered_map<CLEARANCE_CACHE_KEY, int> m_holeClearanceCache;
@@ -166,8 +163,7 @@ PNS_PCBNEW_RULE_RESOLVER::PNS_PCBNEW_RULE_RESOLVER( BOARD* aBoard,
     m_board( aBoard ),
     m_dummyTracks{ { aBoard }, { aBoard } },
     m_dummyArcs{ { aBoard }, { aBoard } },
-    m_dummyVias{ { aBoard }, { aBoard } },
-    m_cacheWriteEnabled( true )
+    m_dummyVias{ { aBoard }, { aBoard } }
 {
     if( aBoard )
         m_clearanceEpsilon = aBoard->GetDesignSettings().GetDRCEpsilon();
@@ -430,9 +426,7 @@ int PNS_PCBNEW_RULE_RESOLVER::Clearance( const PNS::ITEM* aA, const PNS::ITEM* a
     if( aUseClearanceEpsilon )
         rv -= m_clearanceEpsilon;
 
-    if( m_cacheWriteEnabled )
-        m_clearanceCache[key] = rv;
-
+    m_clearanceCache[ key ] = rv;
     return rv;
 }
 
@@ -461,9 +455,7 @@ int PNS_PCBNEW_RULE_RESOLVER::HoleClearance( const PNS::ITEM* aA, const PNS::ITE
     if( aUseClearanceEpsilon )
         rv -= m_clearanceEpsilon;
 
-    if( m_cacheWriteEnabled )
-        m_holeClearanceCache[key] = rv;
-
+    m_holeClearanceCache[ key ] = rv;
     return rv;
 }
 
@@ -492,9 +484,7 @@ int PNS_PCBNEW_RULE_RESOLVER::HoleToHoleClearance( const PNS::ITEM* aA, const PN
     if( aUseClearanceEpsilon )
         rv -= m_clearanceEpsilon;
 
-    if( m_cacheWriteEnabled )
-        m_holeToHoleClearanceCache[key] = rv;
-
+    m_holeToHoleClearanceCache[ key ] = rv;
     return rv;
 }
 
diff --git a/pcbnew/router/pns_node.cpp b/pcbnew/router/pns_node.cpp
index 375c88de1b..60a591fd7f 100644
--- a/pcbnew/router/pns_node.cpp
+++ b/pcbnew/router/pns_node.cpp
@@ -477,10 +477,6 @@ NODE::OPT_OBSTACLE NODE::CheckColliding( const ITEM* aItemA, int aKindMask )
         const LINE* line = static_cast<const LINE*>( aItemA );
         const SHAPE_LINE_CHAIN& l = line->CLine();
 
-        // s is a temporary item, we don't want to put it in the cache.
-        if( m_ruleResolver )
-            m_ruleResolver->SetCacheWriteEnabled( false );
-
         for( int i = 0; i < l.SegmentCount(); i++ )
         {
             const SEGMENT s( *line, l.CSegment( i ) );
@@ -490,13 +486,10 @@ NODE::OPT_OBSTACLE NODE::CheckColliding( const ITEM* aItemA, int aKindMask )
                 return OPT_OBSTACLE( obs[0] );
         }
 
-        if( m_ruleResolver )
-            m_ruleResolver->SetCacheWriteEnabled( true );
-
         if( line->EndsWithVia() )
         {
             n += QueryColliding( &line->Via(), obs, aKindMask, 1 );
-
+            
             if( n )
                 return OPT_OBSTACLE( obs[0] );
         }
diff --git a/pcbnew/router/pns_node.h b/pcbnew/router/pns_node.h
index 438df3edb3..27681fa3e5 100644
--- a/pcbnew/router/pns_node.h
+++ b/pcbnew/router/pns_node.h
@@ -102,8 +102,6 @@ public:
 
     virtual wxString NetName( int aNet ) = 0;
 
-    virtual void SetCacheWriteEnabled( bool aEnabled ) = 0;
-
     virtual void ClearCacheForItem( const ITEM* aItem ) {}
 };