From 43404d457710a2ee351c8a4b749fd6986cdd37a0 Mon Sep 17 00:00:00 2001
From: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
Date: Fri, 18 Sep 2020 16:23:26 +0200
Subject: [PATCH] drc: be more verbose when skipping LVS due to lack of
 schematic netlist

---
 pcbnew/drc/drc_test_provider_lvs.cpp | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/pcbnew/drc/drc_test_provider_lvs.cpp b/pcbnew/drc/drc_test_provider_lvs.cpp
index a160cc684a..357cf2927b 100644
--- a/pcbnew/drc/drc_test_provider_lvs.cpp
+++ b/pcbnew/drc/drc_test_provider_lvs.cpp
@@ -211,8 +211,15 @@ bool DRC_TEST_PROVIDER_LVS::Run()
         if( !reportPhase( _( "Checking PCB to schematic parity..." ) ) )
             return false;
 
-        if( m_drcEngine->GetSchematicNetlist() )
-            testFootprints( *m_drcEngine->GetSchematicNetlist() );
+        auto netlist = m_drcEngine->GetSchematicNetlist();
+
+        if( !netlist )
+        {
+            reportAux( _("No netlist provided, skipping LVS.") );
+            return false;
+        }
+
+        testFootprints( *netlist );
 
         reportRuleStatistics();
     }