From 48150389b11b297eae2f461a4e6398e949c0e4ae Mon Sep 17 00:00:00 2001 From: Johannes Maibaum Date: Sat, 6 Jun 2020 13:59:30 +0200 Subject: [PATCH] Add diode model to rectifier demo (ngspice-32 fix) Patch by Holger Vogt Fixes https://gitlab.com/kicad/code/kicad/issues/4453 --- demos/simulation/rectifier/diode.mod | 2 + .../simulation/rectifier/rectifier-cache.lib | 202 ++++++------- demos/simulation/rectifier/rectifier.sch | 266 +++++++++--------- 3 files changed, 240 insertions(+), 230 deletions(-) create mode 100644 demos/simulation/rectifier/diode.mod diff --git a/demos/simulation/rectifier/diode.mod b/demos/simulation/rectifier/diode.mod new file mode 100644 index 0000000000..73b61653e3 --- /dev/null +++ b/demos/simulation/rectifier/diode.mod @@ -0,0 +1,2 @@ +*generic diode model +.model 1N4148 D diff --git a/demos/simulation/rectifier/rectifier-cache.lib b/demos/simulation/rectifier/rectifier-cache.lib index 5af522f8a8..bf2727eda9 100644 --- a/demos/simulation/rectifier/rectifier-cache.lib +++ b/demos/simulation/rectifier/rectifier-cache.lib @@ -1,101 +1,101 @@ -EESchema-LIBRARY Version 2.4 -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 25 100 50 H V L CNN -F1 "C" 25 -100 50 H V L CNN -F2 "" 38 -150 50 H V C CNN -F3 "" 0 0 50 H V C CNN -$FPLIST - C? - C_????_* - C_???? - SMD*_c - Capacitor* - Capacitors_ThroughHole:C_Radial_D10_L13_P5 - Capacitors_SMD:C_0805 - Capacitors_SMD:C_1206 -$ENDFPLIST -DRAW -P 2 0 1 20 -80 -30 80 -30 N -P 2 0 1 20 -80 30 80 30 N -X ~ 1 0 150 110 D 40 40 1 1 P -X ~ 2 0 -150 110 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# D -# -DEF D D 0 40 N N 1 F N -F0 "D" 0 100 50 H V C CNN -F1 "D" 0 -100 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -$FPLIST - Diode_* - D-Pak_TO252AA - *SingleDiode - *_Diode_* - *SingleDiode* -$ENDFPLIST -DRAW -P 2 0 1 6 -50 50 -50 -50 N -P 3 0 1 0 50 50 -50 0 50 -50 F -X K 1 -150 0 100 R 50 50 1 1 P -X A 2 150 0 100 L 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -150 50 H I C CNN -F1 "GND" 0 -123 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 20 30 1 1 W N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -F2 "" -70 0 50 V V C CNN -F3 "" 0 0 50 H V C CNN -$FPLIST - R_* - Resistor_* -$ENDFPLIST -DRAW -S -40 -100 40 100 0 1 10 N -X ~ 1 0 150 50 D 50 50 1 1 P -X ~ 2 0 -150 50 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# VSOURCE -# -DEF ~VSOURCE V 0 40 Y Y 1 F N -F0 "V" 200 200 50 H V C CNN -F1 "VSOURCE" 250 100 50 H I C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -F4 "Value" 0 0 60 H I C CNN "Fieldname" -F5 "V" 0 0 60 H I C CNN "Spice_Primitive" -F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence" -DRAW -C 0 0 100 0 1 0 N -P 2 0 1 0 0 -75 0 75 N -P 4 0 1 0 0 75 -25 25 25 25 0 75 F -X ~ 1 0 200 100 D 50 50 1 1 I -X ~ 2 0 -200 100 U 50 50 1 1 I -ENDDRAW -ENDDEF -# -#End Library +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# rectifier_schlib_C +# +DEF rectifier_schlib_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "rectifier_schlib_C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + C? + C_????_* + C_???? + SMD*_c + Capacitor* + Capacitors_ThroughHole:C_Radial_D10_L13_P5 + Capacitors_SMD:C_0805 + Capacitors_SMD:C_1206 +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# rectifier_schlib_D +# +DEF rectifier_schlib_D D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "rectifier_schlib_D" 0 -100 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + Diode_* + D-Pak_TO252AA + *SingleDiode + *_Diode_* + *SingleDiode* +$ENDFPLIST +DRAW +P 2 0 1 6 -50 50 -50 -50 N +P 3 0 1 0 50 50 -50 0 50 -50 F +X K 1 -150 0 100 R 50 50 1 1 P +X A 2 150 0 100 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# rectifier_schlib_GND +# +DEF rectifier_schlib_GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "rectifier_schlib_GND" 0 -123 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 20 30 1 1 W N +ENDDRAW +ENDDEF +# +# rectifier_schlib_R +# +DEF rectifier_schlib_R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "rectifier_schlib_R" 0 0 50 V V C CNN +F2 "" -70 0 50 V V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# rectifier_schlib_VSOURCE +# +DEF rectifier_schlib_VSOURCE V 0 40 Y Y 1 F N +F0 "V" 200 200 50 H V C CNN +F1 "rectifier_schlib_VSOURCE" 250 100 50 H I C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +F4 "Value" 0 0 60 H I C CNN "Fieldname" +F5 "V" 0 0 60 H I C CNN "Spice_Primitive" +F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence" +DRAW +C 0 0 100 0 1 0 N +P 2 0 1 0 0 -75 0 75 N +P 4 0 1 0 0 75 -25 25 25 25 0 75 F +X ~ 1 0 200 100 D 50 50 1 1 I +X ~ 2 0 -200 100 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/demos/simulation/rectifier/rectifier.sch b/demos/simulation/rectifier/rectifier.sch index 815cb29928..d1ba00fe53 100644 --- a/demos/simulation/rectifier/rectifier.sch +++ b/demos/simulation/rectifier/rectifier.sch @@ -1,129 +1,137 @@ -EESchema Schematic File Version 4 -LIBS:rectifier-cache -EELAYER 26 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L rectifier_schlib:VSOURCE V1 -U 1 1 57336052 -P 4400 4050 -F 0 "V1" H 4528 4096 50 0000 L CNN -F 1 "SINE(0 1.5 1k 0 0 0 0)" H 4528 4005 50 0000 L CNN -F 2 "" H 4400 4050 50 0000 C CNN -F 3 "" H 4400 4050 50 0000 C CNN -F 4 "Value" H 4400 4050 60 0001 C CNN "Fieldname" -F 5 "V" H 4400 4050 60 0001 C CNN "Spice_Primitive" -F 6 "1 2" H 4100 4250 60 0001 C CNN "Spice_Node_Sequence" - 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