From 56928647ef23d51e034d0daea892676c9646949b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tomasz=20W=C5=82ostowski?= <tomasz.wlostowski@cern.ch>
Date: Wed, 26 Apr 2017 21:52:17 +0200
Subject: [PATCH] fixed performance regression in DRC clearance test

---
 pcbnew/drc_clearance_test_functions.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/pcbnew/drc_clearance_test_functions.cpp b/pcbnew/drc_clearance_test_functions.cpp
index f8fa8db004..2e3d6fafc8 100644
--- a/pcbnew/drc_clearance_test_functions.cpp
+++ b/pcbnew/drc_clearance_test_functions.cpp
@@ -274,9 +274,11 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
     {
         unsigned pad_count = m_pcb->GetPadCount();
 
+        auto pads = m_pcb->GetPads();
+
         for( unsigned ii = 0;  ii<pad_count;  ++ii )
         {
-            D_PAD* pad = m_pcb->GetPad( ii );
+            D_PAD* pad = pads[ii];
 
             /* No problem if pads are on an other layer,
              * But if a drill hole exists	(a pad on a single layer can have a hole!)