diff --git a/pcbnew/drc/drc_test_provider.cpp b/pcbnew/drc/drc_test_provider.cpp
index 3e681036f7..7cf7f08d0e 100644
--- a/pcbnew/drc/drc_test_provider.cpp
+++ b/pcbnew/drc/drc_test_provider.cpp
@@ -30,6 +30,11 @@
 #include <class_zone.h>
 #include <pcb_text.h>
 
+
+// A list of all basic (ie: non-compound) board geometry items
+std::vector<KICAD_T> DRC_TEST_PROVIDER::s_allBasicItems;
+
+
 DRC_TEST_PROVIDER::DRC_TEST_PROVIDER() :
     m_drcEngine( nullptr )
 {
@@ -126,6 +131,15 @@ int DRC_TEST_PROVIDER::forEachGeometryItem( const std::vector<KICAD_T>& aTypes,
     std::bitset<MAX_STRUCT_TYPE_ID> typeMask;
     int n = 0;
 
+    if( s_allBasicItems.size() == 0 )
+    {
+        for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
+        {
+            if( i != PCB_MODULE_T && i != PCB_GROUP_T )
+                s_allBasicItems.push_back( (KICAD_T) i );
+        }
+    }
+
     if( aTypes.size() == 0 )
     {
         for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
diff --git a/pcbnew/drc/drc_test_provider.h b/pcbnew/drc/drc_test_provider.h
index b3343881ec..90577b351e 100644
--- a/pcbnew/drc/drc_test_provider.h
+++ b/pcbnew/drc/drc_test_provider.h
@@ -34,8 +34,7 @@
 class DRC_ENGINE;
 class DRC_TEST_PROVIDER;
 
-
-class DRC_TEST_PROVIDER_REGISTRY 
+class DRC_TEST_PROVIDER_REGISTRY
 {
 public:
     DRC_TEST_PROVIDER_REGISTRY() {};
@@ -123,6 +122,9 @@ protected:
 
     bool isInvisibleText( const BOARD_ITEM* aItem ) const;
 
+    // List of basic (ie: non-compound) geometry items
+    static std::vector<KICAD_T> s_allBasicItems;
+
     EDA_UNITS   userUnits() const;
     DRC_ENGINE* m_drcEngine;
     std::unordered_map<const DRC_RULE*, int> m_stats;
diff --git a/pcbnew/drc/drc_test_provider_edge_clearance.cpp b/pcbnew/drc/drc_test_provider_edge_clearance.cpp
index 2f59d20e32..a164ce52e4 100644
--- a/pcbnew/drc/drc_test_provider_edge_clearance.cpp
+++ b/pcbnew/drc/drc_test_provider_edge_clearance.cpp
@@ -144,7 +144,7 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
             };
 
     forEachGeometryItem( { PCB_SHAPE_T }, LSET( Edge_Cuts ), queryBoardOutlineItems );
-    forEachGeometryItem( {}, LSET::AllCuMask(), queryBoardGeometryItems );
+    forEachGeometryItem( s_allBasicItems, LSET::AllCuMask(), queryBoardGeometryItems );
 
     wxString val;
     wxGetEnv( "WXTRACE", &val );
@@ -205,7 +205,8 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
         return false;
 
     boardItems.clear();
-    forEachGeometryItem( {}, LSET( 2, F_SilkS, B_SilkS ), queryBoardGeometryItems );
+    forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ),
+                         queryBoardGeometryItems );
 
     for( const std::unique_ptr<PCB_SHAPE>& outlineItem : boardOutline )
     {
diff --git a/pcbnew/drc/drc_test_provider_silk_clearance.cpp b/pcbnew/drc/drc_test_provider_silk_clearance.cpp
index 862b5bd922..88a508f754 100644
--- a/pcbnew/drc/drc_test_provider_silk_clearance.cpp
+++ b/pcbnew/drc/drc_test_provider_silk_clearance.cpp
@@ -184,8 +184,8 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run()
                 return true;
             };
 
-    forEachGeometryItem( {}, LSET( 2, F_SilkS, B_SilkS ), addToSilkTree );
-    forEachGeometryItem( {}, LSET::FrontMask() | LSET::BackMask(), addToTargetTree );
+    forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ), addToSilkTree );
+    forEachGeometryItem( s_allBasicItems, LSET::FrontMask() | LSET::BackMask(), addToTargetTree );
 
     reportAux( _("Testing %d silkscreen features against %d board items."),
                silkTree.size(),