diff --git a/pcbnew/drc/drc_test_provider.cpp b/pcbnew/drc/drc_test_provider.cpp
index 9800d498d0..7a80e495b8 100644
--- a/pcbnew/drc/drc_test_provider.cpp
+++ b/pcbnew/drc/drc_test_provider.cpp
@@ -28,6 +28,7 @@
 #include <class_module.h>
 #include <class_pad.h>
 #include <class_zone.h>
+#include <class_pcb_text.h>
 
 DRC_TEST_PROVIDER::DRC_TEST_PROVIDER() :
     m_drcEngine( nullptr )
@@ -280,3 +281,22 @@ int DRC_TEST_PROVIDER::forEachGeometryItem( const std::vector<KICAD_T>& aTypes,
 
     return n;
 }
+
+
+bool DRC_TEST_PROVIDER::isInvisibleText( const BOARD_ITEM* aItem ) const
+{
+
+    if( auto text = dyn_cast<const TEXTE_MODULE*>( aItem ) )
+    {
+        if( !text->IsVisible() )
+            return true;
+    }
+
+    if( auto text = dyn_cast<const TEXTE_PCB*>( aItem ) )
+    {
+        if( !text->IsVisible() )
+            return true;
+    }
+
+    return false;
+}
\ No newline at end of file
diff --git a/pcbnew/drc/drc_test_provider.h b/pcbnew/drc/drc_test_provider.h
index 34167d383d..193de93025 100644
--- a/pcbnew/drc/drc_test_provider.h
+++ b/pcbnew/drc/drc_test_provider.h
@@ -120,6 +120,8 @@ protected:
     virtual void accountCheck( const DRC_RULE* ruleToTest );
     virtual void accountCheck( const DRC_CONSTRAINT& constraintToTest );
 
+    bool isInvisibleText( const BOARD_ITEM* aItem ) const;
+
     EDA_UNITS   userUnits() const;
     DRC_ENGINE* m_drcEngine;
     std::unordered_map<const DRC_RULE*, int> m_stats;
diff --git a/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp b/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp
index 644a4f6d65..245556d807 100644
--- a/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp
+++ b/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp
@@ -29,6 +29,10 @@
 #include <drc/drc_rule.h>
 #include <drc/drc_test_provider.h>
 #include <drc/drc_length_report.h>
+#include <drc/drc_rtree.h>
+
+#include <geometry/shape.h>
+#include <geometry/shape_segment.h>
 
 #include <connectivity/connectivity_data.h>
 #include <connectivity/from_to_cache.h>
@@ -265,7 +269,7 @@ struct DIFF_PAIR_KEY
         int totalLengthP;
     };
 
-static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp )
+static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp, DRC_RTREE& aTree )
 {
 
     for( BOARD_CONNECTED_ITEM* itemP : aDp.itemsP )
@@ -295,10 +299,21 @@ static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp )
 
                 if( coupled )
                 {
-                    cpair.parentP = sp;
-                    cpair.parentN = sn;
+                    SHAPE_SEGMENT checkSegStart( cpair.coupledP.A, cpair.coupledN.A );
+                    SHAPE_SEGMENT checkSegEnd( cpair.coupledP.B, cpair.coupledN.B );
 
-                    aDp.coupled.push_back( cpair );
+                    // check if there's anyting in between the segments suspected to be coupled. If
+                    // there's nothing, assume they are really coupled.
+
+                    if( !aTree.CheckColliding( &checkSegStart, sp->GetLayer() )
+                            && !aTree.CheckColliding( &checkSegEnd, sp->GetLayer() ) )
+                    {
+
+                        cpair.parentP = sp;
+                        cpair.parentN = sn;
+
+                        aDp.coupled.push_back( cpair );
+                    }
                 }
             }
         }
@@ -353,6 +368,20 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run()
                     LSET::AllCuMask(), evaluateDpConstraints );
 
 
+    DRC_RTREE copperTree;
+
+    auto addToTree =
+            [&copperTree]( BOARD_ITEM *item ) -> bool
+            {
+                copperTree.insert( item );
+                return true;
+            };
+
+    int numItems =
+            forEachGeometryItem( { PCB_TRACE_T, PCB_VIA_T, PCB_PAD_T, PCB_ZONE_AREA_T, PCB_ARC_T },
+                    LSET::AllCuMask(), addToTree );
+
+
     reportAux( wxString::Format( _("DPs evaluated:") ) );
 
     for( auto& it : dpRuleMatches )
@@ -368,7 +397,7 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run()
 
         reportAux( wxString::Format( "Rule '%s', DP: (+) %s - (-) %s", it.first.parentRule->m_Name, nameP, nameN ) );
 
-        extractDiffPairCoupledItems( it.second );
+        extractDiffPairCoupledItems( it.second, copperTree );
 
         it.second.totalCoupled = 0;
         it.second.totalLengthN = 0;
diff --git a/pcbnew/drc/drc_test_provider_silk_to_pad.cpp b/pcbnew/drc/drc_test_provider_silk_to_pad.cpp
index 4b214709dd..196c6e7e48 100644
--- a/pcbnew/drc/drc_test_provider_silk_to_pad.cpp
+++ b/pcbnew/drc/drc_test_provider_silk_to_pad.cpp
@@ -135,6 +135,12 @@ bool test::DRC_TEST_PROVIDER_SILK_TO_PAD::Run()
                 int      actual;
                 VECTOR2I pos;
 
+                if( isInvisibleText( aRefItem->parent ) )
+                    return true;
+
+                if( isInvisibleText( aTestItem->parent ) )
+                    return true;
+
                 accountCheck( constraint );
 
                 if( !aRefItem->shape->Collide( aTestItem->shape, minClearance, &actual, &pos ) )
diff --git a/pcbnew/drc/drc_test_provider_silk_to_silk.cpp b/pcbnew/drc/drc_test_provider_silk_to_silk.cpp
index 5cf0a29883..52951b8260 100644
--- a/pcbnew/drc/drc_test_provider_silk_to_silk.cpp
+++ b/pcbnew/drc/drc_test_provider_silk_to_silk.cpp
@@ -132,21 +132,11 @@ bool DRC_TEST_PROVIDER_SILK_TO_SILK::Run()
                 MODULE *parentModRef = nullptr;
                 MODULE *parentModTest = nullptr;
 
-                if( typeRef == PCB_MODULE_TEXT_T )
-                {
-                    auto textRef = static_cast<TEXTE_MODULE*>( aRefItem->parent );
+                if ( isInvisibleText( aRefItem->parent ) )
+                    return true;
 
-                    if( !textRef->IsVisible( ) )
-                        return true;
-                }
-
-                if( typeTest == PCB_MODULE_TEXT_T )
-                {
-                    auto textTest = static_cast<TEXTE_MODULE*>( aTestItem->parent );
-
-                    if( !textTest->IsVisible( ) )
-                        return true;
-                }
+                if ( isInvisibleText( aTestItem->parent ) )
+                    return true;
 
                 if( typeRef == PCB_MODULE_EDGE_T || typeRef == PCB_MODULE_TEXT_T )
                 {