From 6cd750bb9c087050a616660eaa544c7a5a178fcc Mon Sep 17 00:00:00 2001 From: Seth Hillbrand Date: Tue, 10 Jan 2023 14:28:44 -0800 Subject: [PATCH] Respect "Exclude from Board" flag in export When exporting to board-based netlists, skip components marked for exclude from Board Fixes https://gitlab.com/kicad/code/kicad/issues/13422 --- eeschema/netlist_exporters/netlist_exporter_cadstar.cpp | 3 +++ eeschema/netlist_exporters/netlist_exporter_orcadpcb2.cpp | 3 +++ eeschema/plugins/python_scripts/netlist_form_OrcadPcb2.py | 2 +- eeschema/plugins/python_scripts/netlist_form_cadstar.py | 3 ++- eeschema/plugins/python_scripts/netlist_form_pads-pcb-asc.py | 2 +- 5 files changed, 10 insertions(+), 3 deletions(-) diff --git a/eeschema/netlist_exporters/netlist_exporter_cadstar.cpp b/eeschema/netlist_exporters/netlist_exporter_cadstar.cpp index bd76534d8f..8f43d49c7d 100644 --- a/eeschema/netlist_exporters/netlist_exporter_cadstar.cpp +++ b/eeschema/netlist_exporters/netlist_exporter_cadstar.cpp @@ -76,6 +76,9 @@ bool NETLIST_EXPORTER_CADSTAR::WriteNetlist( const wxString& aOutFileName, if( !symbol ) continue; + if( !symbol->GetIncludeOnBoard() ) + continue; + footprint = symbol->GetFootprintFieldText( true ); if( footprint.IsEmpty() ) diff --git a/eeschema/netlist_exporters/netlist_exporter_orcadpcb2.cpp b/eeschema/netlist_exporters/netlist_exporter_orcadpcb2.cpp index bd40b5d075..27d02ebf66 100644 --- a/eeschema/netlist_exporters/netlist_exporter_orcadpcb2.cpp +++ b/eeschema/netlist_exporters/netlist_exporter_orcadpcb2.cpp @@ -76,6 +76,9 @@ bool NETLIST_EXPORTER_ORCADPCB2::WriteNetlist( const wxString& aOutFileName, if( !symbol ) continue; + if( !symbol->GetIncludeOnBoard() ) + continue; + CreatePinList( symbol, &sheet, true ); if( symbol->GetLibSymbolRef() diff --git a/eeschema/plugins/python_scripts/netlist_form_OrcadPcb2.py b/eeschema/plugins/python_scripts/netlist_form_OrcadPcb2.py index 841db5985a..d8681dfec3 100644 --- a/eeschema/plugins/python_scripts/netlist_form_OrcadPcb2.py +++ b/eeschema/plugins/python_scripts/netlist_form_OrcadPcb2.py @@ -41,7 +41,7 @@ except IOError: print(__file__, ":", e, sys.stderr) f = sys.stdout -components = netlist.getInterestingComponents() +components = netlist.getInterestingComponents( excludeBoard=True ) row ="" diff --git a/eeschema/plugins/python_scripts/netlist_form_cadstar.py b/eeschema/plugins/python_scripts/netlist_form_cadstar.py index 0814442775..bf561ad584 100644 --- a/eeschema/plugins/python_scripts/netlist_form_cadstar.py +++ b/eeschema/plugins/python_scripts/netlist_form_cadstar.py @@ -41,7 +41,7 @@ except IOError: print(__file__, ":", e, sys.stderr) f = sys.stdout -components = netlist.getInterestingComponents() +components = netlist.getInterestingComponents( excludeBoard=True ) row ="" @@ -61,6 +61,7 @@ row += '.TYP FULL' + '\n\n' ''' for c in components: + c.getExcludeFromBOM row += ".ADD_COM " + " " + c.getRef() + " \"" + c.getValue() + "\"" fp_name = c.getFootprint( False ) diff --git a/eeschema/plugins/python_scripts/netlist_form_pads-pcb-asc.py b/eeschema/plugins/python_scripts/netlist_form_pads-pcb-asc.py index c4467b21b6..615f6c837a 100644 --- a/eeschema/plugins/python_scripts/netlist_form_pads-pcb-asc.py +++ b/eeschema/plugins/python_scripts/netlist_form_pads-pcb-asc.py @@ -41,7 +41,7 @@ except IOError: print(__file__, ":", e, sys.stderr) f = sys.stdout -components = netlist.getInterestingComponents() +components = netlist.getInterestingComponents( excludeBoard=True ) row =""