From 7b705af0384b0cb1013996304005d117e87851e6 Mon Sep 17 00:00:00 2001 From: Ian McInerney Date: Thu, 16 Jul 2020 15:11:31 +0100 Subject: [PATCH] Refactor common QA components to create a single common library This moves the program-specific code (e.g. BIU files) into the program tests. Also, create title_block.cpp to break a dependency that pulled in eda_text.cpp when using the TITLE_BLOCK object. --- .gitlab/Fedora-Linux-CI.yml | 25 ++-- common/CMakeLists.txt | 1 + common/page_layout/ws_painter.cpp | 46 ------ common/title_block.cpp | 70 +++++++++ gerbview/CMakeLists.txt | 19 ++- pcbnew/CMakeLists.txt | 2 +- qa/CMakeLists.txt | 4 +- qa/common/CMakeLists.txt | 37 +---- qa/eeschema/CMakeLists.txt | 9 +- .../complex_hierarchy.kicad_pro | 136 ++++++++++++++++++ .../test_global_promotion.kicad_pro | 123 ++++++++++++++++ .../test_global_promotion_2.kicad_pro | 105 ++++++++++++++ .../data/netlists/video/video.kicad_pro | 118 +++++++++++++++ qa/gerbview/CMakeLists.txt | 69 +++++++++ qa/gerbview/test_module.cpp | 48 +++++++ qa/libs/sexpr/CMakeLists.txt | 2 +- qa/pcbnew/CMakeLists.txt | 25 ++-- qa/pcbnew/test_module.cpp | 4 +- qa/utils/kicad2step/CMakeLists.txt | 2 +- 19 files changed, 728 insertions(+), 117 deletions(-) create mode 100644 common/title_block.cpp create mode 100644 qa/eeschema/data/netlists/complex_hierarchy/complex_hierarchy.kicad_pro create mode 100644 qa/eeschema/data/netlists/test_global_promotion/test_global_promotion.kicad_pro create mode 100644 qa/eeschema/data/netlists/test_global_promotion_2/test_global_promotion_2.kicad_pro create mode 100644 qa/eeschema/data/netlists/video/video.kicad_pro create mode 100644 qa/gerbview/CMakeLists.txt create mode 100644 qa/gerbview/test_module.cpp diff --git a/.gitlab/Fedora-Linux-CI.yml b/.gitlab/Fedora-Linux-CI.yml index c808f5de0e..89d8f56b39 100644 --- a/.gitlab/Fedora-Linux-CI.yml +++ b/.gitlab/Fedora-Linux-CI.yml @@ -93,58 +93,51 @@ qa_python: variables: TEST: 'qa_python' -qa_common_eeschema: +qa_common: extends: - .unit_test - .only_code variables: - TEST: 'common_eeschema' + TEST: 'qa_common' -qa_common_pcbnew: +qa_gerbview: extends: - .unit_test - .only_code variables: - TEST: 'common_pcbnew' - -qa_common_gerbview: - extends: - - .unit_test - - .only_code - variables: - TEST: 'qa_common_gerbview' + TEST: 'qa_gerbview' qa_pcbnew: extends: - .unit_test - .only_code variables: - TEST: 'pcbnew' + TEST: 'qa_pcbnew' qa_eeschema: extends: - .unit_test - .only_code variables: - TEST: 'eeschema' + TEST: 'qa_eeschema' qa_kimath: extends: - .unit_test - .only_code variables: - TEST: 'kimath' + TEST: 'qa_kimath' qa_sexpr: extends: - .unit_test - .only_code variables: - TEST: 'sexpr' + TEST: 'qa_sexpr' qa_kicad2step: extends: - .unit_test - .only_code variables: - TEST: 'kicad2step' + TEST: 'qa_kicad2step' diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index 2765201665..cde69242b1 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -350,6 +350,7 @@ set( COMMON_SRCS systemdirsappend.cpp template_fieldnames.cpp textentry_tricks.cpp + title_block.cpp trace_helpers.cpp undo_redo_container.cpp utf8.cpp diff --git a/common/page_layout/ws_painter.cpp b/common/page_layout/ws_painter.cpp index 7e0e30ba34..7898511c77 100644 --- a/common/page_layout/ws_painter.cpp +++ b/common/page_layout/ws_painter.cpp @@ -214,52 +214,6 @@ wxString WS_DRAW_ITEM_LIST::BuildFullText( const wxString& aTextbase ) } -void TITLE_BLOCK::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const - -{ - // Don't write the title block information if there is nothing to write. - bool isempty = true; - for( unsigned idx = 0; idx < m_tbTexts.GetCount(); idx++ ) - { - if( ! m_tbTexts[idx].IsEmpty() ) - { - isempty = false; - break; - } - } - - if( !isempty ) - { - aFormatter->Print( aNestLevel, "(title_block\n" ); - - if( !GetTitle().IsEmpty() ) - aFormatter->Print( aNestLevel+1, "(title %s)\n", - aFormatter->Quotew( GetTitle() ).c_str() ); - - if( !GetDate().IsEmpty() ) - aFormatter->Print( aNestLevel+1, "(date %s)\n", - aFormatter->Quotew( GetDate() ).c_str() ); - - if( !GetRevision().IsEmpty() ) - aFormatter->Print( aNestLevel+1, "(rev %s)\n", - aFormatter->Quotew( GetRevision() ).c_str() ); - - if( !GetCompany().IsEmpty() ) - aFormatter->Print( aNestLevel+1, "(company %s)\n", - aFormatter->Quotew( GetCompany() ).c_str() ); - - for( int ii = 0; ii < 9; ii++ ) - { - if( !GetComment(ii).IsEmpty() ) - aFormatter->Print( aNestLevel+1, "(comment %d %s)\n", ii+1, - aFormatter->Quotew( GetComment(ii) ).c_str() ); - } - - aFormatter->Print( aNestLevel, ")\n\n" ); - } -} - - bool KIGFX::WS_PAINTER::Draw( const VIEW_ITEM* aItem, int aLayer ) { auto item = static_cast( aItem ); diff --git a/common/title_block.cpp b/common/title_block.cpp new file mode 100644 index 0000000000..bca72e813c --- /dev/null +++ b/common/title_block.cpp @@ -0,0 +1,70 @@ +/* + * This program source code file is part of KiCad, a free EDA CAD application. + * + * Copyright (C) 1992-2020 KiCad Developers, see AUTHORS.txt for contributors. + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, you may find one here: + * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html + * or you may search the http://www.gnu.org website for the version 2 license, + * or you may write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + */ + +#include +#include + +void TITLE_BLOCK::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const +{ + // Don't write the title block information if there is nothing to write. + bool isempty = true; + for( unsigned idx = 0; idx < m_tbTexts.GetCount(); idx++ ) + { + if( ! m_tbTexts[idx].IsEmpty() ) + { + isempty = false; + break; + } + } + + if( !isempty ) + { + aFormatter->Print( aNestLevel, "(title_block\n" ); + + if( !GetTitle().IsEmpty() ) + aFormatter->Print( aNestLevel+1, "(title %s)\n", + aFormatter->Quotew( GetTitle() ).c_str() ); + + if( !GetDate().IsEmpty() ) + aFormatter->Print( aNestLevel+1, "(date %s)\n", + aFormatter->Quotew( GetDate() ).c_str() ); + + if( !GetRevision().IsEmpty() ) + aFormatter->Print( aNestLevel+1, "(rev %s)\n", + aFormatter->Quotew( GetRevision() ).c_str() ); + + if( !GetCompany().IsEmpty() ) + aFormatter->Print( aNestLevel+1, "(company %s)\n", + aFormatter->Quotew( GetCompany() ).c_str() ); + + for( int ii = 0; ii < 9; ii++ ) + { + if( !GetComment(ii).IsEmpty() ) + aFormatter->Print( aNestLevel+1, "(comment %d %s)\n", ii+1, + aFormatter->Quotew( GetComment(ii) ).c_str() ); + } + + aFormatter->Print( aNestLevel, ")\n\n" ); + } +} diff --git a/gerbview/CMakeLists.txt b/gerbview/CMakeLists.txt index 87527ef3e2..12fd446562 100644 --- a/gerbview/CMakeLists.txt +++ b/gerbview/CMakeLists.txt @@ -119,13 +119,28 @@ if( MAKE_LINK_MAPS ) LINK_FLAGS "-Wl,-cref,-Map=gerbview.map" ) endif() -# the main gerbview program, in DSO form. -add_library( gerbview_kiface MODULE + +# The objects for the main gerbview program +add_library( gerbview_kiface_objects OBJECT gerbview.cpp ${GERBVIEW_SRCS} ${DIALOGS_SRCS} ${GERBVIEW_EXTRA_SRCS} ) + +# Since we're not using target_link_libraries, we need to explicitly +# declare the dependency +add_dependencies( gerbview_kiface_objects common ) +add_dependencies( gerbview_kiface_objects gal ) + +# CMake <3.9 can't link anything to object libraries, +# but we only need include directories, as we will link the kiface MODULE +target_include_directories( gerbview_kiface_objects PRIVATE + $ + ) + +# the main gerbview program, in DSO form. +add_library( gerbview_kiface MODULE $ ) set_target_properties( gerbview_kiface PROPERTIES OUTPUT_NAME gerbview PREFIX ${KIFACE_PREFIX} diff --git a/pcbnew/CMakeLists.txt b/pcbnew/CMakeLists.txt index b325acdc0e..827f70e163 100644 --- a/pcbnew/CMakeLists.txt +++ b/pcbnew/CMakeLists.txt @@ -308,7 +308,7 @@ set( PCBNEW_CLASS_SRCS zones_test_and_combine_areas.cpp ratsnest/ratsnest.cpp - + tools/drawing_tool.cpp tools/edit_tool.cpp tools/global_edit_tool.cpp diff --git a/qa/CMakeLists.txt b/qa/CMakeLists.txt index 28aa25089d..a371bc68f2 100644 --- a/qa/CMakeLists.txt +++ b/qa/CMakeLists.txt @@ -48,10 +48,10 @@ add_subdirectory( unit_test_utils ) # Unit tests add_subdirectory( common ) -add_subdirectory( pcbnew ) +add_subdirectory( gerbview ) add_subdirectory( eeschema ) - add_subdirectory( libs ) +add_subdirectory( pcbnew ) add_subdirectory( utils/kicad2step ) #add_subdirectory( libeval_compiler ) #add_subdirectory( drc_proto ) diff --git a/qa/common/CMakeLists.txt b/qa/common/CMakeLists.txt index a1bf16122a..d5b3f05ca6 100644 --- a/qa/common/CMakeLists.txt +++ b/qa/common/CMakeLists.txt @@ -28,21 +28,12 @@ set( common_srcs # The main test entry points test_module.cpp - # stuff from common due to...units? - ${CMAKE_SOURCE_DIR}/common/eda_text.cpp - ${CMAKE_SOURCE_DIR}/common/base_units.cpp - - # stuff from common which is needed...why? - ${CMAKE_SOURCE_DIR}/common/observable.cpp - wximage_test_utils.cpp test_array_axis.cpp - test_array_options.cpp test_bitmap_base.cpp test_color4d.cpp test_coroutine.cpp - test_format_units.cpp test_lib_table.cpp test_kicad_string.cpp test_property.cpp @@ -66,29 +57,13 @@ set( common_libs ) -# Use code with GERBVIEW defines in place (primarily IU difference) -add_executable( qa_common_gerbview ${common_srcs} ) -target_link_libraries( qa_common_gerbview ${common_libs} ) -target_compile_definitions( qa_common_gerbview PRIVATE GERBVIEW ) -target_include_directories( qa_common_gerbview PRIVATE +# Test executable for non-program-specific code +add_executable( qa_common ${common_srcs} ) +target_link_libraries( qa_common ${common_libs} ) +target_include_directories( qa_common PRIVATE $ ) -# Use code with PCBNEW defines in place -add_executable( qa_common_pcbnew ${common_srcs} ) -target_link_libraries( qa_common_pcbnew ${common_libs} ) -target_compile_definitions( qa_common_pcbnew PRIVATE PCBNEW ) -target_include_directories( qa_common_pcbnew PRIVATE - $ -) - -# Use code with EESCHEMA defines in place -add_executable( qa_common_eeschema ${common_srcs} ) -target_link_libraries( qa_common_eeschema ${common_libs} ) -target_compile_definitions( qa_common_eeschema PRIVATE EESCHEMA ) -target_include_directories( qa_common_eeschema PRIVATE - $ -) include_directories( ${CMAKE_SOURCE_DIR} @@ -97,6 +72,4 @@ include_directories( ${INC_AFTER} ) -kicad_add_boost_test( qa_common_eeschema common_eeschema ) -kicad_add_boost_test( qa_common_pcbnew common_pcbnew ) -kicad_add_boost_test( qa_common_gerbview qa_common_gerbview ) +kicad_add_boost_test( qa_common qa_common ) diff --git a/qa/eeschema/CMakeLists.txt b/qa/eeschema/CMakeLists.txt index 6191c72635..e58a26200f 100644 --- a/qa/eeschema/CMakeLists.txt +++ b/qa/eeschema/CMakeLists.txt @@ -32,9 +32,6 @@ include_directories( ) set( QA_EESCHEMA_SRCS - # stuff from common which is needed...why? - ${CMAKE_SOURCE_DIR}/common/observable.cpp - # need the mock Pgm for many functions mocks_eeschema.cpp @@ -47,6 +44,10 @@ set( QA_EESCHEMA_SRCS # Base internal units (1=100nm) testing. test_sch_biu.cpp + # Shared between programs, but dependent on the BIU + ${CMAKE_SOURCE_DIR}/qa/common/test_format_units.cpp + ${CMAKE_SOURCE_DIR}/qa/common/test_array_options.cpp + test_eagle_plugin.cpp test_lib_arc.cpp test_lib_part.cpp @@ -108,5 +109,5 @@ set_source_files_properties( eeschema_test_utils.cpp PROPERTIES COMPILE_DEFINITIONS "QA_EESCHEMA_DATA_LOCATION=(\"${CMAKE_CURRENT_SOURCE_DIR}/data\")" ) -kicad_add_boost_test( qa_eeschema eeschema ) +kicad_add_boost_test( qa_eeschema qa_eeschema ) diff --git a/qa/eeschema/data/netlists/complex_hierarchy/complex_hierarchy.kicad_pro b/qa/eeschema/data/netlists/complex_hierarchy/complex_hierarchy.kicad_pro new file mode 100644 index 0000000000..a7e08ddef7 --- /dev/null +++ b/qa/eeschema/data/netlists/complex_hierarchy/complex_hierarchy.kicad_pro @@ -0,0 +1,136 @@ +{ + "board": { + "design_settings": { + "defaults": { + "board_outline_line_width": 0.09999999999999999, + "copper_line_width": 0.3, + "copper_text_italic": false, + "copper_text_size_h": 2.0, + "copper_text_size_v": 2.0, + "copper_text_thickness": 0.3, + "copper_text_upright": false, + "courtyard_line_width": 0.05, + "dimension_precision": 1, + "dimension_units": 0, + "other_line_width": 0.09999999999999999, + "other_text_italic": false, + "other_text_size_h": 1.0, + "other_text_size_v": 1.0, + "other_text_thickness": 0.15, + "other_text_upright": false, + "silk_line_width": 0.2, + "silk_text_italic": false, + "silk_text_size_h": 1.0, + "silk_text_size_v": 1.0, + "silk_text_thickness": 0.2, + "silk_text_upright": false + }, + "diff_pair_dimensions": [ + { + "gap": 0.35, + "via_gap": 0.25, + "width": 0.4 + } + ], + "drc_exclusions": [], + "rule_severitieslegacy_courtyards_overlap": true, + "rule_severitieslegacy_no_courtyard_defined": false, + "rules": { + "allow_blind_buried_vias": false, + "allow_microvias": false, + "min_copper_edge_clearance": 0.01, + "min_hole_to_hole": 0.25, + "min_microvia_diameter": 0.508, + "min_microvia_drill": 0.2032, + "min_through_hole_diameter": 0.508, + "min_track_width": 0.2032, + "min_via_diameter": 0.889, + "solder_mask_clearance": 0.254, + "solder_mask_min_width": 0.0, + "solder_paste_clearance": 0.0, + "solder_paste_margin_ratio": -0.0 + }, + "track_widths": [ + 0.4 + ], + "via_dimensions": [ + { + "diameter": 1.651, + "drill": 0.6 + } + ] + }, + "layer_presets": [] + }, + "boards": [], + "cvpcb": { + "equivalence_files": [] + }, + "libraries": { + "pinned_footprint_libs": [], + "pinned_symbol_libs": [] + }, + "meta": { + "filename": "complex_hierarchy.kicad_pro", + "version": 1 + }, + "net_settings": { + "classes": [ + { + "clearance": 0.2, + "diff_pair_gap": 0.25, + "diff_pair_via_gap": 0.25, + "diff_pair_width": 0.2, + "microvia_diameter": 0.3, + "microvia_drill": 0.1, + "name": "Default", + "track_width": 0.25, + "via_diameter": 0.8, + "via_drill": 0.4 + } + ], + "meta": { + "version": 0 + }, + "net_colors": null + }, + "pcbnew": { + "last_paths": { + "gencad": "", + "idf": "", + "netlist": "", + "specctra_dsn": "", + "step": "", + "vmrl": "" + }, + "page_layout_descr_file": "" + }, + "schematic": { + "drawing": { + "default_text_size": 50 + }, + "legacy_lib_dir": "", + "legacy_lib_list": [], + "net_format_name": "Pcbnew", + "page_layout_descr_file": "", + "plot_directory": "", + "spice_adjust_passive_values": false, + "subpart_first_id": 65, + "subpart_id_separator": 0 + }, + "sheets": [ + [ + "2af0a8cc-488a-452c-afb6-9304525ae2e2", + "" + ], + [ + "00000000-0000-0000-0000-00004b3a1333", + "ampli_ht_vertical" + ], + [ + "00000000-0000-0000-0000-00004b3a13a4", + "ampli_ht_horizontal" + ] + ], + "text_variables": {} +} diff --git a/qa/eeschema/data/netlists/test_global_promotion/test_global_promotion.kicad_pro b/qa/eeschema/data/netlists/test_global_promotion/test_global_promotion.kicad_pro new file mode 100644 index 0000000000..b49027bc44 --- /dev/null +++ b/qa/eeschema/data/netlists/test_global_promotion/test_global_promotion.kicad_pro @@ -0,0 +1,123 @@ +{ + "board": { + "design_settings": { + "defaults": { + "board_outline_line_width": 0.05, + "copper_line_width": 0.2, + "copper_text_italic": false, + "copper_text_size_h": 1.5, + "copper_text_size_v": 1.5, + "copper_text_thickness": 0.3, + "copper_text_upright": false, + "courtyard_line_width": 0.05, + "dimension_precision": 1, + "dimension_units": 0, + "other_line_width": 0.09999999999999999, + "other_text_italic": false, + "other_text_size_h": 1.0, + "other_text_size_v": 1.0, + "other_text_thickness": 0.15, + "other_text_upright": false, + "silk_line_width": 0.12, + "silk_text_italic": false, + "silk_text_size_h": 1.0, + "silk_text_size_v": 1.0, + "silk_text_thickness": 0.15, + "silk_text_upright": false + }, + "diff_pair_dimensions": [ + { + "gap": 0.25, + "via_gap": 0.25, + "width": 0.2 + } + ], + "drc_exclusions": [], + "rule_severitieslegacy_courtyards_overlap": true, + "rule_severitieslegacy_no_courtyard_defined": false, + "rules": { + "allow_blind_buried_vias": false, + "allow_microvias": false, + "min_copper_edge_clearance": 0.01, + "min_hole_to_hole": 0.25, + "min_microvia_diameter": 0.2, + "min_microvia_drill": 0.09999999999999999, + "min_through_hole_diameter": 0.3, + "min_track_width": 0.2, + "min_via_diameter": 0.4, + "solder_mask_clearance": 0.051, + "solder_mask_min_width": 0.25, + "solder_paste_clearance": 0.0, + "solder_paste_margin_ratio": 0.0 + }, + "track_widths": [ + 0.25 + ], + "via_dimensions": [ + { + "diameter": 0.8, + "drill": 0.4 + } + ] + }, + "layer_presets": [] + }, + "boards": [], + "cvpcb": { + "equivalence_files": [] + }, + "libraries": { + "pinned_footprint_libs": [], + "pinned_symbol_libs": [] + }, + "meta": { + "filename": "test_global_promotion.kicad_pro", + "version": 1 + }, + "net_settings": { + "classes": [ + { + "clearance": 0.2, + "diff_pair_gap": 0.25, + "diff_pair_via_gap": 0.25, + "diff_pair_width": 0.2, + "microvia_diameter": 0.3, + "microvia_drill": 0.1, + "name": "Default", + "track_width": 0.25, + "via_diameter": 0.8, + "via_drill": 0.4 + } + ], + "meta": { + "version": 0 + }, + "net_colors": null + }, + "pcbnew": { + "last_paths": { + "gencad": "", + "idf": "", + "netlist": "", + "specctra_dsn": "", + "step": "", + "vmrl": "" + }, + "page_layout_descr_file": "" + }, + "schematic": { + "legacy_lib_dir": "", + "legacy_lib_list": [] + }, + "sheets": [ + [ + "dd57ce69-7dbc-45cf-9f11-a261dd5b9ef6", + "" + ], + [ + "00000000-0000-0000-0000-00005e68e19b", + "Subcircuit" + ] + ], + "text_variables": {} +} diff --git a/qa/eeschema/data/netlists/test_global_promotion_2/test_global_promotion_2.kicad_pro b/qa/eeschema/data/netlists/test_global_promotion_2/test_global_promotion_2.kicad_pro new file mode 100644 index 0000000000..73eab43c5a --- /dev/null +++ b/qa/eeschema/data/netlists/test_global_promotion_2/test_global_promotion_2.kicad_pro @@ -0,0 +1,105 @@ +{ + "board": { + "design_settings": { + "defaults": { + "board_outline_line_width": 0.1, + "copper_line_width": 0.2, + "copper_text_size_h": 1.5, + "copper_text_size_v": 1.5, + "copper_text_thickness": 0.3, + "other_line_width": 0.15, + "silk_line_width": 0.15, + "silk_text_size_h": 1.0, + "silk_text_size_v": 1.0, + "silk_text_thickness": 0.15 + }, + "diff_pair_dimensions": [], + "drc_exclusions": [], + "rules": { + "min_copper_edge_clearance": 0.0, + "solder_mask_clearance": 0.0, + "solder_mask_min_width": 0.0 + }, + "track_widths": [], + "via_dimensions": [] + }, + "layer_presets": [] + }, + "boards": [], + "cvpcb": { + "equivalence_files": [] + }, + "libraries": { + "pinned_footprint_libs": [], + "pinned_symbol_libs": [] + }, + "meta": { + "filename": "test_global_promotion_2.kicad_pro", + "version": 1 + }, + "net_settings": { + "classes": [ + { + "clearance": 0.2, + "diff_pair_gap": 0.25, + "diff_pair_via_gap": 0.25, + "diff_pair_width": 0.2, + "microvia_diameter": 0.3, + "microvia_drill": 0.1, + "name": "Default", + "track_width": 0.25, + "via_diameter": 0.8, + "via_drill": 0.4 + } + ], + "meta": { + "version": 0 + }, + "net_colors": null + }, + "pcbnew": { + "last_paths": { + "gencad": "", + "idf": "", + "netlist": "", + "specctra_dsn": "", + "step": "", + "vmrl": "" + }, + "page_layout_descr_file": "" + }, + "schematic": { + "drawing": { + "default_bus_thickness": 12, + "default_junction_size": 40, + "default_line_thickness": 6, + "default_text_size": 50, + "default_wire_thickness": 6, + "field_names": "(templatefields)", + "text_offset_ratio": 0.3 + }, + "legacy_lib_dir": "", + "legacy_lib_list": [], + "net_format_name": "Pcbnew", + "page_layout_descr_file": "", + "plot_directory": "", + "spice_adjust_passive_values": false, + "subpart_first_id": 65, + "subpart_id_separator": 0 + }, + "sheets": [ + [ + "68004dfc-62ae-4bb2-9ef3-d0131842bcaa", + "" + ], + [ + "00000000-0000-0000-0000-00005cc15ef9", + "Sheet5CC15EF8" + ], + [ + "00000000-0000-0000-0000-00005cc165f1", + "sheet5CC165F1" + ] + ], + "text_variables": {} +} diff --git a/qa/eeschema/data/netlists/video/video.kicad_pro b/qa/eeschema/data/netlists/video/video.kicad_pro new file mode 100644 index 0000000000..c8b24ab9f3 --- /dev/null +++ b/qa/eeschema/data/netlists/video/video.kicad_pro @@ -0,0 +1,118 @@ +{ + "board": { + "design_settings": { + "diff_pair_dimensions": [], + "drc_exclusions": [], + "track_widths": [], + "via_dimensions": [] + }, + "layer_presets": [] + }, + "boards": [], + "cvpcb": { + "equivalence_files": [] + }, + "legacy": { + "ViaDiameter": "0.889", + "ViaDrill": "0.4", + "dPairGap": "0.25", + "dPairViaGap": "0.25", + "dPairWidth": "0.2", + "uViaDiameter": "0.508", + "uViaDrill": "0.127" + }, + "libraries": { + "pinned_footprint_libs": [], + "pinned_symbol_libs": [] + }, + "meta": { + "filename": "video.kicad_pro", + "version": 1 + }, + "net_settings": { + "classes": [ + { + "clearance": 0.2, + "diff_pair_gap": 0.25, + "diff_pair_via_gap": 0.25, + "diff_pair_width": 0.2, + "microvia_diameter": 0.3, + "microvia_drill": 0.1, + "name": "Default", + "track_width": 0.25, + "via_diameter": 0.8, + "via_drill": 0.4 + } + ], + "meta": { + "version": 0 + }, + "net_colors": null + }, + "pcbnew": { + "last_paths": { + "gencad": "", + "idf": "", + "netlist": "", + "specctra_dsn": "", + "step": "", + "vmrl": "" + }, + "page_layout_descr_file": "" + }, + "schematic": { + "drawing": { + "default_bus_thickness": 12, + "default_junction_size": 40, + "default_line_thickness": 6, + "default_text_size": 50, + "default_wire_thickness": 6, + "field_names": "(templatefields)", + "pin_symbol_size": 25, + "text_offset_ratio": 0.3 + }, + "legacy_lib_dir": "", + "legacy_lib_list": [], + "net_format_name": "Pcbnew", + "page_layout_descr_file": "", + "plot_directory": "", + "spice_adjust_passive_values": false, + "subpart_first_id": 65, + "subpart_id_separator": 0 + }, + "sheets": [ + [ + "84d4d60f-6656-461e-b8d6-5d42ccee0251", + "" + ], + [ + "00000000-0000-0000-0000-00004bf03687", + "buspci.sch" + ], + [ + "00000000-0000-0000-0000-00004bf03683", + "graphic" + ], + [ + "00000000-0000-0000-0000-00004bf03689", + "ESVIDEO-RVB" + ], + [ + "00000000-0000-0000-0000-00004bf03681", + "pal-ntsc.sch" + ], + [ + "00000000-0000-0000-0000-00004bf03685", + "RAMS" + ], + [ + "00000000-0000-0000-0000-00004bf0367d", + "muxdata" + ], + [ + "00000000-0000-0000-0000-00004bf0367f", + "modul" + ] + ], + "text_variables": {} +} diff --git a/qa/gerbview/CMakeLists.txt b/qa/gerbview/CMakeLists.txt new file mode 100644 index 0000000000..770294b1ac --- /dev/null +++ b/qa/gerbview/CMakeLists.txt @@ -0,0 +1,69 @@ +# This program source code file is part of KiCad, a free EDA CAD application. +# +# Copyright (C) 2018 KiCad Developers, see CHANGELOG.TXT for contributors. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, you may find one here: +# http://www.gnu.org/licenses/old-licenses/gpl-2.0.html +# or you may search the http://www.gnu.org website for the version 2 license, +# or you may write to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + + +set( QA_GERBVIEW_SRCS + # The main test entry points + test_module.cpp + + # Shared between programs, but dependent on the BIU + ${CMAKE_SOURCE_DIR}/qa/common/test_format_units.cpp +) + +add_executable( qa_gerbview + ${QA_GERBVIEW_SRCS} + + # In order to enable this, the actual Gerbview kiface build must be updated to match pcbnew's + # Older CMakes cannot link OBJECT libraries + # https://cmake.org/pipermail/cmake/2013-November/056263.html + $ +) + +# Gerbview tests, so pretend to be gerbview (for units, etc) +target_compile_definitions( qa_gerbview + PRIVATE GERBVIEW +) + +target_include_directories( qa_gerbview PRIVATE + ${CMAKE_SOURCE_DIR}/include +) + +# Anytime we link to the kiface_objects, we have to add a dependency on the last object +# to ensure that the generated lexer files are finished being used before the qa runs in a +# multi-threaded build +add_dependencies( qa_gerbview gerbview ) + +target_link_libraries( qa_gerbview + pcbcommon + gal + common + gal + qa_utils + unit_test_utils + ${wxWidgets_LIBRARIES} + ${GITHUB_PLUGIN_LIBRARIES} + ${GDI_PLUS_LIBRARIES} + ${PYTHON_LIBRARIES} + ${Boost_LIBRARIES} # must follow GITHUB + ${PCBNEW_EXTRA_LIBS} # -lrt must follow Boost +) + +kicad_add_boost_test( qa_gerbview qa_gerbview ) diff --git a/qa/gerbview/test_module.cpp b/qa/gerbview/test_module.cpp new file mode 100644 index 0000000000..496704398b --- /dev/null +++ b/qa/gerbview/test_module.cpp @@ -0,0 +1,48 @@ +/* + * This program source code file is part of KiCad, a free EDA CAD application. + * + * Copyright (C) 2018 KiCad Developers, see CHANGELOG.TXT for contributors. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, you may find one here: + * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html + * or you may search the http://www.gnu.org website for the version 2 license, + * or you may write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + */ + +/** + * Main file for the pcbnew tests to be compiled + */ +#include + +#include + + +bool init_unit_test() +{ + boost::unit_test::framework::master_test_suite().p_name.value = "Gerbview module tests"; + return wxInitialize(); +} + + +int main( int argc, char* argv[] ) +{ + int ret = boost::unit_test::unit_test_main( &init_unit_test, argc, argv ); + + // This causes some glib warnings on GTK3 (http://trac.wxwidgets.org/ticket/18274) + // but without it, Valgrind notices a lot of leaks from WX + wxUninitialize(); + + return ret; +} diff --git a/qa/libs/sexpr/CMakeLists.txt b/qa/libs/sexpr/CMakeLists.txt index bee0b8a0a4..73fa74aae0 100644 --- a/qa/libs/sexpr/CMakeLists.txt +++ b/qa/libs/sexpr/CMakeLists.txt @@ -41,4 +41,4 @@ target_include_directories( qa_sexpr PRIVATE ${CMAKE_CURRENT_SOURCE_DIR} ) -kicad_add_boost_test(qa_sexpr sexpr) \ No newline at end of file +kicad_add_boost_test(qa_sexpr qa_sexpr) diff --git a/qa/pcbnew/CMakeLists.txt b/qa/pcbnew/CMakeLists.txt index 4dbfe44ec7..8b6e70c95d 100644 --- a/qa/pcbnew/CMakeLists.txt +++ b/qa/pcbnew/CMakeLists.txt @@ -23,19 +23,15 @@ if( BUILD_GITHUB_PLUGIN ) set( GITHUB_PLUGIN_LIBRARIES github_plugin ) endif() -add_executable( qa_pcbnew - # A single top to load the pcnew kiface - # ../../common/single_top.cpp - - # stuff from common due to...units? - ${CMAKE_SOURCE_DIR}/common/eda_text.cpp - - # stuff from common which is needed...why? - ${CMAKE_SOURCE_DIR}/common/observable.cpp +set( QA_PCBNEW_SRCS # The main test entry points test_module.cpp + # Shared between programs, but dependent on the BIU + ${CMAKE_SOURCE_DIR}/qa/common/test_format_units.cpp + ${CMAKE_SOURCE_DIR}/qa/common/test_array_options.cpp + # testing utility routines board_test_utils.cpp drc/drc_test_utils.cpp @@ -48,12 +44,21 @@ add_executable( qa_pcbnew drc/test_drc_courtyard_invalid.cpp drc/test_drc_courtyard_overlap.cpp +) + +add_executable( qa_pcbnew + ${QA_PCBNEW_SRCS} # Older CMakes cannot link OBJECT libraries # https://cmake.org/pipermail/cmake/2013-November/056263.html $ ) +# Pcbnew tests, so pretend to be pcbnew (for units, etc) +target_compile_definitions( qa_pcbnew + PRIVATE PCBNEW +) + # Anytime we link to the kiface_objects, we have to add a dependency on the last object # to ensure that the generated lexer files are finished being used before the qa runs in a # multi-threaded build @@ -84,4 +89,4 @@ target_link_libraries( qa_pcbnew ${PCBNEW_EXTRA_LIBS} # -lrt must follow Boost ) -kicad_add_boost_test( qa_pcbnew pcbnew ) +kicad_add_boost_test( qa_pcbnew qa_pcbnew ) diff --git a/qa/pcbnew/test_module.cpp b/qa/pcbnew/test_module.cpp index 5f593f6b27..698d0522a0 100644 --- a/qa/pcbnew/test_module.cpp +++ b/qa/pcbnew/test_module.cpp @@ -31,7 +31,7 @@ bool init_unit_test() { - boost::unit_test::framework::master_test_suite().p_name.value = "Common Pcbnew module tests"; + boost::unit_test::framework::master_test_suite().p_name.value = "Pcbnew module tests"; return wxInitialize(); } @@ -45,4 +45,4 @@ int main( int argc, char* argv[] ) wxUninitialize(); return ret; -} \ No newline at end of file +} diff --git a/qa/utils/kicad2step/CMakeLists.txt b/qa/utils/kicad2step/CMakeLists.txt index fa58e300b1..75a166df3b 100644 --- a/qa/utils/kicad2step/CMakeLists.txt +++ b/qa/utils/kicad2step/CMakeLists.txt @@ -44,4 +44,4 @@ target_include_directories( qa_sexpr PRIVATE ${CMAKE_CURRENT_SOURCE_DIR} ) -kicad_add_boost_test( qa_kicad2step kicad2step ) \ No newline at end of file +kicad_add_boost_test( qa_kicad2step qa_kicad2step )