From 7ca4f0b3753e3dd5a6d33ba6ae5f6a8ce1528a67 Mon Sep 17 00:00:00 2001 From: Roberto Fernandez Bautista Date: Sun, 6 Sep 2020 18:00:02 +0100 Subject: [PATCH] CADSTAR PCB Archive Importer: Formatting fixes --- common/CMakeLists.txt | 1 - .../cadstar/cadstar_archive_parser.cpp | 5 +- .../plugins/cadstar/cadstar_archive_parser.h | 26 +++------- common/wildcards_and_files_ext.cpp | 2 +- include/wildcards_and_files_ext.h | 2 +- pcbnew/files.cpp | 2 +- pcbnew/plugins/cadstar/CMakeLists.txt | 1 - .../cadstar/cadstar_pcb_archive_loader.cpp | 26 ++++++---- .../cadstar/cadstar_pcb_archive_loader.h | 29 ++++------- .../cadstar/cadstar_pcb_archive_parser.cpp | 52 ++++++++++++------- .../cadstar/cadstar_pcb_archive_parser.h | 34 +++++++++--- .../cadstar/cadstar_pcb_archive_plugin.cpp | 2 +- .../cadstar/cadstar_pcb_archive_plugin.h | 2 +- 13 files changed, 102 insertions(+), 82 deletions(-) diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index 53723d2eec..95951e000e 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -275,7 +275,6 @@ set( PLUGINS_ALTIUM_SRCS plugins/altium/altium_parser.cpp ) - set( PLUGINS_CADSTAR_SRCS plugins/cadstar/cadstar_archive_parser.cpp ) diff --git a/common/plugins/cadstar/cadstar_archive_parser.cpp b/common/plugins/cadstar/cadstar_archive_parser.cpp index 8efa33d8fa..977c33629b 100644 --- a/common/plugins/cadstar/cadstar_archive_parser.cpp +++ b/common/plugins/cadstar/cadstar_archive_parser.cpp @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it @@ -293,6 +293,7 @@ void CADSTAR_ARCHIVE_PARSER::ParseChildEValue( XNODE* aNode, EVALUE& aValueToPar } } + std::vector CADSTAR_ARCHIVE_PARSER::ParseAllChildPoints( XNODE* aNode, bool aTestAllChildNodes, int aExpectedNumPoints ) { @@ -369,6 +370,7 @@ std::vector CADSTAR_ARCHIVE_PARSER::ParseAllChil return retVal; } + void CADSTAR_ARCHIVE_PARSER::CUTOUT::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "CUTOUT" ) ); @@ -388,6 +390,7 @@ bool CADSTAR_ARCHIVE_PARSER::SHAPE::IsShape( XNODE* aNode ) return false; } + void CADSTAR_ARCHIVE_PARSER::SHAPE::Parse( XNODE* aNode ) { wxASSERT( IsShape( aNode ) ); diff --git a/common/plugins/cadstar/cadstar_archive_parser.h b/common/plugins/cadstar/cadstar_archive_parser.h index 8e5a8cb1b4..ce748822d6 100644 --- a/common/plugins/cadstar/cadstar_archive_parser.h +++ b/common/plugins/cadstar/cadstar_archive_parser.h @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it @@ -23,8 +23,8 @@ * @brief Helper functions and common defines between schematic and PCB Archive files */ -#ifndef CADSTAR_ARHIVE_PARSER_H_ -#define CADSTAR_ARHIVE_PARSER_H_ +#ifndef CADSTAR_ARCHIVE_PARSER_H_ +#define CADSTAR_ARCHIVE_PARSER_H_ #include #include @@ -52,7 +52,7 @@ /** * @brief Helper functions and common structures for CADSTAR PCB and Schematic archive files. -*/ + */ class CADSTAR_ARCHIVE_PARSER { public: @@ -82,7 +82,7 @@ public: void Parse( XNODE* aNode ); }; - + struct LONGPOINT { long x = UNDEFINED_VALUE; @@ -101,7 +101,6 @@ public: ANTICLOCKWISE_SEMICIRCLE }; - /** * @brief Represents a vertex in a shape. E.g. A circle is made by two semicircles with the same * center point. @@ -116,7 +115,6 @@ public: void Parse( XNODE* aNode ); }; - /** * @brief Represents a cutout in a closed shape (e.g. OUTLINE) */ @@ -170,7 +168,6 @@ public: */ static bool IsValidAttribute( wxXmlAttribute* aAttribute ); - /** * @brief * @param aNode @@ -180,7 +177,6 @@ public: */ static wxString GetXmlAttributeIDString( XNODE* aNode, unsigned int aID ); - /** * @brief * @param aNode @@ -190,7 +186,6 @@ public: */ static long GetXmlAttributeIDLong( XNODE* aNode, unsigned int aID ); - /** * @brief * @param aNode @@ -198,7 +193,6 @@ public: */ static void CheckNoChildNodes( XNODE* aNode ); - /** * @brief * @param aNode @@ -206,7 +200,6 @@ public: */ static void CheckNoNextNodes( XNODE* aNode ); - /** * @brief * @param aNode with a child node containing an EVALUE @@ -215,7 +208,6 @@ public: */ static void ParseChildEValue( XNODE* aNode, EVALUE& aValueToParse ); - /** * @brief if no childs are present, it just returns an empty * vector (without throwing an exception) @@ -231,7 +223,6 @@ public: static std::vector ParseAllChildPoints( XNODE* aNode, bool aTestAllChildNodes = false, int aExpectedNumPoints = UNDEFINED_VALUE ); - /** * @brief if no childs are present, it just returns an empty * vector (without throwing an exception) @@ -246,7 +237,6 @@ public: static std::vector ParseAllChildVertices( XNODE* aNode, bool aTestAllChildNodes = false ); - /** * @brief if no childs are present, it just returns an empty * vector (without throwing an exception) @@ -260,8 +250,6 @@ public: */ static std::vector ParseAllChildCutouts( XNODE* aNode, bool aTestAllChildNodes = false ); +}; // class CADSTAR_ARCHIVE_PARSER - -}; // class CADSTAR_ARHIVE_PARSER - -#endif // CADSTAR_ARHIVE_PARSER_H_ +#endif // CADSTAR_ARCHIVE_PARSER_H_ diff --git a/common/wildcards_and_files_ext.cpp b/common/wildcards_and_files_ext.cpp index b05e8bff20..fa4fbd50b7 100644 --- a/common/wildcards_and_files_ext.cpp +++ b/common/wildcards_and_files_ext.cpp @@ -270,7 +270,7 @@ wxString EaglePcbFileWildcard() return _( "Eagle ver. 6.x XML PCB files" ) + AddFileExtListToFilter( { "brd" } ); } -wxString CadstarArchivePcbFileWildcard() +wxString CadstarPcbArchiveFileWildcard() { return _( "CADSTAR PCB Archive files" ) + AddFileExtListToFilter( { "cpa" } ); } diff --git a/include/wildcards_and_files_ext.h b/include/wildcards_and_files_ext.h index eb520bcc3b..6093d86b56 100644 --- a/include/wildcards_and_files_ext.h +++ b/include/wildcards_and_files_ext.h @@ -196,7 +196,7 @@ extern wxString AltiumSchematicFileWildcard(); extern wxString EagleSchematicFileWildcard(); extern wxString EagleFilesWildcard(); extern wxString PCadPcbFileWildcard(); -extern wxString CadstarArchivePcbFileWildcard(); +extern wxString CadstarPcbArchiveFileWildcard(); extern wxString AltiumDesignerPcbFileWildcard(); extern wxString AltiumCircuitStudioPcbFileWildcard(); extern wxString AltiumCircuitMakerPcbFileWildcard(); diff --git a/pcbnew/files.cpp b/pcbnew/files.cpp index d84161ede2..e5a9bbb291 100644 --- a/pcbnew/files.cpp +++ b/pcbnew/files.cpp @@ -89,7 +89,7 @@ bool AskLoadBoardFileName( wxWindow* aParent, int* aCtl, wxString* aFileName, bo { AltiumDesignerPcbFileWildcard(), IO_MGR::ALTIUM_DESIGNER }, // Import Altium Designer board files { AltiumCircuitStudioPcbFileWildcard(), IO_MGR::ALTIUM_CIRCUIT_STUDIO }, // Import Altium Circuit Studio board files { AltiumCircuitMakerPcbFileWildcard(), IO_MGR::ALTIUM_CIRCUIT_MAKER }, // Import Altium Circuit Maker board files - { CadstarArchivePcbFileWildcard(), IO_MGR::CADSTAR_PCB_ARCHIVE }, // Import Cadstar PCB Archive board files + { CadstarPcbArchiveFileWildcard(), IO_MGR::CADSTAR_PCB_ARCHIVE }, // Import Cadstar PCB Archive board files }; // clang-format on diff --git a/pcbnew/plugins/cadstar/CMakeLists.txt b/pcbnew/plugins/cadstar/CMakeLists.txt index ee97be9863..2cb98da406 100644 --- a/pcbnew/plugins/cadstar/CMakeLists.txt +++ b/pcbnew/plugins/cadstar/CMakeLists.txt @@ -1,4 +1,3 @@ - # Sources for the pcbnew PLUGIN called CADSTAR_PCB_ARCHIVE_PLUGIN include_directories( . ) diff --git a/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp b/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp index c92d668e6b..e0979b130f 100644 --- a/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp +++ b/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it @@ -39,6 +39,7 @@ #include // std::numeric_limits + void CADSTAR_PCB_ARCHIVE_LOADER::Load( ::BOARD* aBoard ) { mBoard = aBoard; @@ -397,12 +398,14 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDesignRules() BOARD_DESIGN_SETTINGS& ds = mBoard->GetDesignSettings(); std::map& spacingCodes = Assignments.Codedefs.SpacingCodes; - auto applyRule = [&]( wxString aID, int* aVal ) { - if( spacingCodes.find( aID ) == spacingCodes.end() ) - wxLogWarning( _( "Design rule %s was not found. This was ignored." ) ); - else - *aVal = getKiCadLength( spacingCodes.at( aID ).Spacing ); - }; + auto applyRule = + [&]( wxString aID, int* aVal ) + { + if( spacingCodes.find( aID ) == spacingCodes.end() ) + wxLogWarning( _( "Design rule %s was not found. This was ignored." ) ); + else + *aVal = getKiCadLength( spacingCodes.at( aID ).Spacing ); + }; //Note: for details on the different spacing codes see SPACINGCODE::ID @@ -412,7 +415,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDesignRules() ds.m_TrackMinWidth = Assignments.Technology.MinRouteWidth; - auto applyNetClassRule = + auto applyNetClassRule = [&]( wxString aID, ::NETCLASS* aNetClassPtr, void (::NETCLASS::*aFunc)(int) ) { int value = -1; @@ -647,6 +650,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadFigures() } } + void CADSTAR_PCB_ARCHIVE_LOADER::loadTexts() { for( std::pair txtPair : Layout.Texts ) @@ -1041,6 +1045,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadCoppers() } } + void CADSTAR_PCB_ARCHIVE_LOADER::loadNets() { for( std::pair netPair : Layout.Nets ) @@ -1209,6 +1214,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadNetVia( ///todo add netcode to the via } + void CADSTAR_PCB_ARCHIVE_LOADER::drawCadstarText( const TEXT& aCadstarText, BOARD_ITEM_CONTAINER* aContainer, const LAYER_ID& aCadstarLayerOverride, const wxPoint& aMoveVector, const double& aRotationAngle, const double& aScalingFactor, @@ -2186,7 +2192,6 @@ PCB_LAYER_ID CADSTAR_PCB_ARCHIVE_LOADER::getKiCadCopperLayerID( unsigned int aLa switch( aLayerNum ) { - // clang-format off case 1: return PCB_LAYER_ID::F_Cu; case 2: return PCB_LAYER_ID::In1_Cu; case 3: return PCB_LAYER_ID::In2_Cu; @@ -2218,9 +2223,8 @@ PCB_LAYER_ID CADSTAR_PCB_ARCHIVE_LOADER::getKiCadCopperLayerID( unsigned int aLa case 29: return PCB_LAYER_ID::In28_Cu; case 30: return PCB_LAYER_ID::In29_Cu; case 31: return PCB_LAYER_ID::In30_Cu; - case 32: return PCB_LAYER_ID::B_Cu; + case 32: return PCB_LAYER_ID::B_Cu; } - // clang-format on return PCB_LAYER_ID::UNDEFINED_LAYER; } diff --git a/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.h b/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.h index efd356bdb7..f7802f974f 100644 --- a/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.h +++ b/pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.h @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it @@ -47,6 +47,7 @@ public: mNumNets = 0; } + ~CADSTAR_PCB_ARCHIVE_LOADER() { for( std::pair libItem : mLibraryMap ) @@ -64,6 +65,7 @@ public: */ void Load( ::BOARD* aBoard ); + private: ::BOARD* mBoard; std::map mLayermap; ///< Map between Cadstar and KiCad Layers. @@ -119,7 +121,9 @@ private: void loadComponentAttributes( const COMPONENT& aComponent, MODULE* aModule ); void loadNetTracks( const NET_ID& aCadstarNetID, const NET::ROUTE& aCadstarRoute ); void loadNetVia( const NET_ID& aCadstarNetID, const NET::VIA& aCadstarVia ); + void checkAndLogHatchCode( const HATCHCODE_ID& aCadstarHatchcodeID ); + //Helper functions for drawing /loading objects onto screen: /** * @brief * @param aCadstarText @@ -288,15 +292,8 @@ private: const ATTRIBUTE_ID& aCadstarAttributeID, MODULE* aModule, const wxString& aAttributeValue ); - /** - * @brief If the LineCode ID is found, returns the thickness as defined in the Linecode, - * otherwise returns the default line thickness in Edge_Cuts KiCad layer - * @param aCadstarLineCodeID - * @return - */ - int getLineThickness( const LINECODE_ID& aCadstarLineCodeID ); - - + //Helper Functions for obtaining CADSTAR elements in the parsed structures + int getLineThickness( const LINECODE_ID& aCadstarLineCodeID ); COPPERCODE getCopperCode( const COPPERCODE_ID& aCadstaCopperCodeID ); HATCHCODE getHatchCode( const HATCHCODE_ID& aCadstarHatchcodeID ); LAYERPAIR getLayerPair( const LAYERPAIR_ID& aCadstarLayerPairID ); @@ -305,13 +302,11 @@ private: ROUTECODE getRouteCode( const ROUTECODE_ID& aCadstarRouteCodeID ); TEXTCODE getTextCode( const TEXTCODE_ID& aCadstarTextCodeID ); VIACODE getViaCode( const VIACODE_ID& aCadstarViaCodeID ); - - wxString getAttributeName( const ATTRIBUTE_ID& aCadstarAttributeID ); - - wxString getAttributeValue( const ATTRIBUTE_ID& aCadstarAttributeID, + wxString getAttributeName( const ATTRIBUTE_ID& aCadstarAttributeID ); + wxString getAttributeValue( const ATTRIBUTE_ID& aCadstarAttributeID, const std::map& aCadstarAttributeMap ); - void checkAndLogHatchCode( const HATCHCODE_ID& aCadstarHatchcodeID ); + // Helper Functions for obtaining individual elements as KiCad elements: double getHatchCodeAngleDegrees( const HATCHCODE_ID& aCadstarHatchcodeID ); MODULE* getModuleFromCadstarID( const COMPONENT_ID& aCadstarComponentID ); int getKiCadHatchCodeThickness( const HATCHCODE_ID& aCadstarHatchcodeID ); @@ -369,7 +364,6 @@ private: */ NETINFO_ITEM* getKiCadNet( const NET_ID& aCadstarNetID ); - /** * @brief * @param aLayerNum Physical / logical layer number (starts at 1) @@ -377,7 +371,6 @@ private: */ PCB_LAYER_ID getKiCadCopperLayerID( unsigned int aLayerNum ); - /** * @brief * @param aCadstarLayerID @@ -385,7 +378,6 @@ private: */ bool isLayerSet( const LAYER_ID& aCadstarLayerID ); - /** * @brief * @param aCadstarLayerID @@ -393,7 +385,6 @@ private: */ PCB_LAYER_ID getKiCadLayer( const LAYER_ID& aCadstarLayerID ); - /** * @brief * @param aCadstarLayerID diff --git a/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.cpp b/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.cpp index 08beb8928d..d61bce5461 100644 --- a/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.cpp +++ b/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.cpp @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it @@ -134,6 +134,7 @@ CADSTAR_PCB_ARCHIVE_PARSER::JUSTIFICATION CADSTAR_PCB_ARCHIVE_PARSER::ParseJusti return JUSTIFICATION::LEFT; } + CADSTAR_PCB_ARCHIVE_PARSER::READABILITY CADSTAR_PCB_ARCHIVE_PARSER::ParseReadability( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "READABILITY" ) ); @@ -150,6 +151,7 @@ CADSTAR_PCB_ARCHIVE_PARSER::READABILITY CADSTAR_PCB_ARCHIVE_PARSER::ParseReadabi return READABILITY::BOTTOM_TO_TOP; } + CADSTAR_PCB_ARCHIVE_PARSER::ANGUNITS CADSTAR_PCB_ARCHIVE_PARSER::ParseAngunits( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "ANGUNITS" ) ); @@ -786,6 +788,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::FONT::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::TEXTCODE::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "TEXTCODE" ) ); @@ -984,6 +987,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::PAD_SHAPE::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::PADREASSIGN::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "PADREASSIGN" ) ); @@ -1803,6 +1807,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::TEXT_LOCATION::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::TEXT::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "TEXT" ) ); @@ -2054,13 +2059,14 @@ bool CADSTAR_PCB_ARCHIVE_PARSER::DIMENSION::IsDimension( XNODE* aNode ) return false; } + void CADSTAR_PCB_ARCHIVE_PARSER::DIMENSION::Parse( XNODE* aNode ) { wxASSERT( IsDimension( aNode ) ); std::map typeMap = { - { wxT( "LINEARDIM" ), TYPE::LINEARDIM }, ///////////////////////////////////////////// - { wxT( "LEADERDIM" ), TYPE::LEADERDIM }, ///////////////////////////////////////////// + { wxT( "LINEARDIM" ), TYPE::LINEARDIM }, + { wxT( "LEADERDIM" ), TYPE::LEADERDIM }, { wxT( "ANGLEDIM" ), TYPE::ANGLEDIM } }; @@ -2073,11 +2079,11 @@ void CADSTAR_PCB_ARCHIVE_PARSER::DIMENSION::Parse( XNODE* aNode ) wxString subTypeStr = GetXmlAttributeIDString( aNode, 2 ); std::map subTypeMap = { - { wxT( "DIMENSION_ORTHOGONAL" ), SUBTYPE::ORTHOGONAL }, ////////////////////////////// - { wxT( "DIMENSION_DIRECT" ), SUBTYPE::DIRECT }, ////////////////////////////// - { wxT( "DIMENSION_ANGLED" ), SUBTYPE::ANGLED }, ////////////////////////////// - { wxT( "DIMENSION_DIAMETER" ), SUBTYPE::DIAMETER }, ////////////////////////////// - { wxT( "DIMENSION_RADIUS" ), SUBTYPE::RADIUS }, ////////////////////////////// + { wxT( "DIMENSION_ORTHOGONAL" ), SUBTYPE::ORTHOGONAL }, + { wxT( "DIMENSION_DIRECT" ), SUBTYPE::DIRECT }, + { wxT( "DIMENSION_ANGLED" ), SUBTYPE::ANGLED }, + { wxT( "DIMENSION_DIAMETER" ), SUBTYPE::DIAMETER }, + { wxT( "DIMENSION_RADIUS" ), SUBTYPE::RADIUS }, { wxT( "DIMENSION_ANGULAR" ), SUBTYPE::ANGULAR } }; @@ -2154,6 +2160,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::DIMENSION::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::SYMDEF::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "SYMDEF" ) ); @@ -2309,6 +2316,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::PART::DEFINITION::GATE::Parse( XNODE* aNode ) CheckNoChildNodes( aNode ); } + CADSTAR_PCB_ARCHIVE_PARSER::PART::PIN_TYPE CADSTAR_PCB_ARCHIVE_PARSER::PART::GetPinType( XNODE* aNode ) { @@ -2317,15 +2325,15 @@ CADSTAR_PCB_ARCHIVE_PARSER::PART::PIN_TYPE CADSTAR_PCB_ARCHIVE_PARSER::PART::Get wxString pinTypeStr = GetXmlAttributeIDString( aNode, 0 ); std::map pinTypeMap = { - { wxT( "INPUT" ), PIN_TYPE::INPUT }, //////////////////////////////// - { wxT( "OUTPUT_OR" ), PIN_TYPE::OUTPUT_OR }, //////////////////////////////// - { wxT( "OUTPUT_NOT_OR" ), PIN_TYPE::OUTPUT_NOT_OR }, //////////////////////////////// - { wxT( "OUTPUT_NOT_NORM_OR" ), PIN_TYPE::OUTPUT_NOT_NORM_OR }, ////////////////////// - { wxT( "POWER" ), PIN_TYPE::POWER }, ////////////////////////////////////////////// - { wxT( "GROUND" ), PIN_TYPE::GROUND }, ////////////////////////////////////////////// - { wxT( "TRISTATE_BIDIR" ), PIN_TYPE::TRISTATE_BIDIR }, ///////////////////////////// - { wxT( "TRISTATE_INPUT" ), PIN_TYPE::TRISTATE_INPUT }, ///////////////////////////// - { wxT( "TRISTATE_DRIVER" ), PIN_TYPE::TRISTATE_DRIVER } ///////////////////////////// + { wxT( "INPUT" ), PIN_TYPE::INPUT }, + { wxT( "OUTPUT_OR" ), PIN_TYPE::OUTPUT_OR }, + { wxT( "OUTPUT_NOT_OR" ), PIN_TYPE::OUTPUT_NOT_OR }, + { wxT( "OUTPUT_NOT_NORM_OR" ), PIN_TYPE::OUTPUT_NOT_NORM_OR }, + { wxT( "POWER" ), PIN_TYPE::POWER }, + { wxT( "GROUND" ), PIN_TYPE::GROUND }, + { wxT( "TRISTATE_BIDIR" ), PIN_TYPE::TRISTATE_BIDIR }, + { wxT( "TRISTATE_INPUT" ), PIN_TYPE::TRISTATE_INPUT }, + { wxT( "TRISTATE_DRIVER" ), PIN_TYPE::TRISTATE_DRIVER } }; if( pinTypeMap.find( pinTypeStr ) == pinTypeMap.end() ) @@ -2395,6 +2403,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::PART::PART_PIN::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::PART::DEFINITION::PIN_EQUIVALENCE::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "PINEQUIVALENCE" ) ); @@ -2579,6 +2588,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::PARTS::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::BOARD::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "BOARD" ) ); @@ -2619,6 +2629,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::BOARD::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::AREA::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "AREA" ) ); @@ -2885,6 +2896,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::ATTRIBUTE_LOCATION::Parse( XNODE* aNode ) } } + CADSTAR_PCB_ARCHIVE_PARSER::TESTLAND_SIDE CADSTAR_PCB_ARCHIVE_PARSER::ParseTestlandSide( XNODE* aNode ) { @@ -2981,6 +2993,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::NET::COPPER_TERMINAL::Parse( XNODE* aNode ) CopperTermNum = GetXmlAttributeIDLong( aNode, 2 ); } + XNODE* CADSTAR_PCB_ARCHIVE_PARSER::NET::ROUTE_VERTEX::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "ROUTEWIDTH" ) ); @@ -3079,6 +3092,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::NET::CONNECTION::Parse( XNODE* aNode ) } } + void CADSTAR_PCB_ARCHIVE_PARSER::NET::Parse( XNODE* aNode ) { wxASSERT( aNode->GetName() == wxT( "NET" ) ); @@ -3491,8 +3505,8 @@ void CADSTAR_PCB_ARCHIVE_PARSER::LAYOUT::Parse( XNODE* aNode ) if( !netSynchParsed && cNodeName == wxT( "NETSYNCH" ) ) { std::map netSynchMap = { - { wxT( "WARNING" ), NETSYNCH::WARNING }, ////////////////////////////////////////// - { wxT( "FULL" ), NETSYNCH::FULL } ////////////////////////////////////////// + { wxT( "WARNING" ), NETSYNCH::WARNING }, + { wxT( "FULL" ), NETSYNCH::FULL } }; wxString nsString = GetXmlAttributeIDString( cNode, 0 ); diff --git a/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.h b/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.h index 458d0c0b52..01630c4173 100644 --- a/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.h +++ b/pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.h @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it @@ -236,6 +236,7 @@ public: BELOW }; + struct LAYER { LAYER_ID ID; @@ -280,6 +281,7 @@ public: DOT }; + struct LINECODE { LINECODE_ID ID; @@ -380,6 +382,7 @@ public: void Parse( XNODE* aNode ); }; + struct SPACINGCODE { struct REASSIGN @@ -611,7 +614,6 @@ public: void Parse( XNODE* aNode ); }; - /** * @brief From CADSTAR Help: "Text Alignment enables you to define the position of an alignment * origin for all text items in CADSTAR. The alignment origin is a point on or within the text @@ -643,6 +645,7 @@ public: BOTTOMRIGHT }; + static ALIGNMENT ParseAlignment( XNODE* aNode ); /** @@ -661,6 +664,7 @@ public: RIGHT }; + static JUSTIFICATION ParseJustification( XNODE* aNode ); /** @@ -677,6 +681,7 @@ public: TOP_TO_BOTTOM ///< When text is vertical, show it rotated 90 degrees clockwise }; + static READABILITY ParseReadability( XNODE* aNode ); @@ -699,6 +704,7 @@ public: void Parse( XNODE* aNode ); }; + struct ATTRIBUTE_VALUE { ATTRIBUTE_ID AttributeID; @@ -783,10 +789,12 @@ public: void Parse( XNODE* aNode ); }; + //................................. // ASSIGNMENTS -> TECHNOLOGY //................................. + enum class UNITS { THOU, @@ -797,8 +805,10 @@ public: METER }; + static UNITS ParseUnits( XNODE* aNode ); + struct TECHNOLOGY_SECTION { UNITS Units; ///< Units to display for linear dimensions @@ -836,10 +846,12 @@ public: void Parse( XNODE* aNode ); }; + //................................. // ASSIGNMENTS -> GRIDS //................................. + enum class GRID_TYPE { FRACTIONALGRID, ///< Param1 = Units, Param2 = Divisor. The grid is equal in X and Y @@ -891,7 +903,6 @@ public: void Parse( XNODE* aNode ); }; - /** * @brief Corresponds to "Display when" Item property. From CADSTAR * Help: "This parameter enables you to make the visibility of @@ -909,8 +920,10 @@ public: BOTH ///< Always display (Mirrored and Unmirrored) }; + static SWAP_RULE ParseSwapRule( XNODE* aNode ); + struct REUSEBLOCK { REUSEBLOCK_ID ID; @@ -1008,7 +1021,6 @@ public: void Parse( XNODE* aNode ); }; - /** * @brief From CADSTAR Help: "This parameter indicates the physical layers on which the selected * pad is placed. Note: When you change the Side parameter in PCB Design, the Side assigned to the @@ -1023,7 +1035,6 @@ public: THROUGH_HOLE ///< All physical layers currently defined }; - /** * @brief From CADSTAR help: "For specifying the directions in which routes can enter or exit the * pad. There are eight pre-defined directions to choose from, North, South, East, West, @@ -1138,6 +1149,7 @@ public: RADIANS }; + static ANGUNITS ParseAngunits( XNODE* aNode ); /** @@ -1152,6 +1164,7 @@ public: ANGLEDIM ///< Angular Dimension }; + enum class SUBTYPE { ORTHOGONAL, ///< An orthogonal dimension (either x or y measurement) @@ -1166,6 +1179,7 @@ public: ANGULAR ///< token=DIMENSION_ANGULAR }; + struct ARROW //"DIMARROW" { enum class STYLE @@ -1277,7 +1291,6 @@ public: void Parse( XNODE* aNode ); }; - TYPE Type; DIMENSION_ID ID; ///< Some ID (doesn't seem to be used) subnode="DIMREF" LAYER_ID LayerID; ///< ID on which to draw this [param1] @@ -1401,6 +1414,7 @@ public: void Parse( XNODE* aNode ); }; + struct PART { enum class PIN_TYPE @@ -1417,8 +1431,10 @@ public: TRISTATE_DRIVER ///< Tristate output pin }; + static PIN_TYPE GetPinType( XNODE* aNode ); + struct DEFINITION ///< "PARTDEFINITION" node name { struct GATE ///< "GATEDEFINITION" node name @@ -1484,6 +1500,7 @@ public: void Parse( XNODE* aNode ); }; + struct PIN_EQUIVALENCE ///< "PINEQUIVALENCE" Node name (represents "Equivalence") { std::vector PinIDs; ///< All the pins in this vector are @@ -1502,6 +1519,7 @@ public: void Parse( XNODE* aNode ); }; + struct SWAP_GROUP { wxString GateName = @@ -1583,6 +1601,7 @@ public: void Parse( XNODE* aNode ); }; + struct PARTS { std::map PartDefinitions; @@ -1659,6 +1678,7 @@ public: void Parse( XNODE* aNode ); }; + struct COMPONENT { COMPONENT_ID ID; @@ -1720,6 +1740,7 @@ public: void Parse( XNODE* aNode ); }; + enum class TESTLAND_SIDE { NONE, @@ -1731,6 +1752,7 @@ public: static TESTLAND_SIDE ParseTestlandSide( XNODE* aNode ); + struct NET { struct PIN ///< "PIN" nodename (represents a PAD in a PCB component) diff --git a/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.cpp b/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.cpp index 30292e3b9c..572c3cc02c 100644 --- a/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.cpp +++ b/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.cpp @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it diff --git a/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.h b/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.h index ce3c295b72..8a69ea64bb 100644 --- a/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.h +++ b/pcbnew/plugins/cadstar/cadstar_pcb_archive_plugin.h @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2020 Roberto Fernandez Bautista <@Qbort> + * Copyright (C) 2020 Roberto Fernandez Bautista * Copyright (C) 2020 KiCad Developers, see AUTHORS.txt for contributors. * * This program is free software: you can redistribute it and/or modify it