From 7e79113c223dfa45cd9536d34a9212b1b3a1995b Mon Sep 17 00:00:00 2001 From: CHARRAS Date: Thu, 20 Sep 2007 06:45:17 +0000 Subject: [PATCH] pcbnew bug fix in place via (partial drc was made) (old bug) --- change_log.txt | 2 + pcbnew/editrack-part2.cpp | 82 +++++++++++++++++++++------------------ pcbnew/hotkeys.cpp | 4 +- pcbnew/pcbframe.cpp | 5 ++- 4 files changed, 53 insertions(+), 40 deletions(-) diff --git a/change_log.txt b/change_log.txt index c57e25d850..7996d7beb9 100644 --- a/change_log.txt +++ b/change_log.txt @@ -8,6 +8,8 @@ email address. ================================================================================ + all * hotkeys handling finished ++ pcbnew + * bug fix: a subtle bug in place via : partial drc only was made. 2007-Sep-14 UPDATE Dick Hollenbeck diff --git a/pcbnew/editrack-part2.cpp b/pcbnew/editrack-part2.cpp index 7cd1bffb89..d6e9902075 100644 --- a/pcbnew/editrack-part2.cpp +++ b/pcbnew/editrack-part2.cpp @@ -162,6 +162,8 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC ) * if a track is in progress : * put (if possible, i.e. if no DRC problem) a Via on the end of the current * track, swap the current active layer and start a new trac segment on the new layer + * @param track = track in progress, or NULL + * @param DC = current device context */ { TRACK* pt_segm; @@ -191,20 +193,27 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC ) return; } - /* Is the current segment Ok (no DRC error) */ + /* Is the current segment Ok (no DRC error) ? */ if( Drc_On ) + { if( Drc( this, DC, g_CurrentTrackSegment, m_Pcb->m_Track, 1 ) == BAD_DRC ) - /* DRC error, the change layer is not made */ + /* DRC error, the change layer is not made */ return; + if( g_TwoSegmentTrackBuild && g_CurrentTrackSegment->Back() ) // We must handle 2 segments + { + if( Drc( this, DC, g_CurrentTrackSegment->Back(), m_Pcb->m_Track, 1 ) == BAD_DRC ) + return; + } + } /* Saving current state before placing a via. - If the via canot be placed this current state will be reused */ + * If the via canot be placed this current state will be reused */ itmp = g_TrackSegmentCount; Begin_Route( g_CurrentTrackSegment, DC ); DrawPanel->ManageCurseur( DrawPanel, DC, FALSE ); - /* create the via */ + /* create the via */ Via = new SEGVIA( m_Pcb ); Via->m_Flags = IS_NEW; Via->m_Width = g_DesignSettings.m_CurrentViaSize; @@ -220,7 +229,7 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC ) else GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_BOTTOM; - /* Adjust the via layer pair */ + /* Adjust the via layer pair */ if( (Via->m_Shape & 15) == VIA_ENTERREE ) { Via->SetLayer( old_layer | GetScreen()->m_Active_Layer << 4 ); @@ -230,10 +239,10 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC ) Via->SetLayer( old_layer | GetScreen()->m_Active_Layer << 4 ); } else - Via->SetLayer( 0x0F ); // Usual via is from copper to component; layer pair is 0 and 0x0F + Via->SetLayer( 0x0F ); // Usual via is from copper to component; layer pair is 0 and 0x0F if( Drc_On &&( Drc( this, DC, Via, m_Pcb->m_Track, 1 ) == BAD_DRC ) ) - { + { /* DRC fault: the Via cannot be placed here ... */ delete Via; GetScreen()->m_Active_Layer = old_layer; @@ -242,39 +251,39 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC ) } /* A new via was created. It was Ok. - Put it in linked list, after the g_CurrentTrackSegment */ + * Put it in linked list, after the g_CurrentTrackSegment */ Via->Pback = g_CurrentTrackSegment; g_CurrentTrackSegment->Pnext = Via; g_TrackSegmentCount++; - /* The g_CurrentTrackSegment is now in linked list and we need a new track segment - after the via, starting at via location. - it will become the new curren segment (from via to the mouse cursor) - */ - g_CurrentTrackSegment = g_CurrentTrackSegment->Copy(); /* create a new segment - from the last entered segment, with the current width, flags, netcode, etc... values - layer, start and end point are not correct, and will be modified next */ - - g_CurrentTrackSegment->SetLayer( GetScreen()->m_Active_Layer ); // set the layer to the new value - - /* the start point is the via position, - and the end point is the cursor which also is on the via (will change when moving mouse) - */ + /* The g_CurrentTrackSegment is now in linked list and we need a new track segment + * after the via, starting at via location. + * it will become the new curren segment (from via to the mouse cursor) + */ + g_CurrentTrackSegment = g_CurrentTrackSegment->Copy(); /* create a new segment + * from the last entered segment, with the current width, flags, netcode, etc... values + * layer, start and end point are not correct, and will be modified next */ + + g_CurrentTrackSegment->SetLayer( GetScreen()->m_Active_Layer ); // set the layer to the new value + + /* the start point is the via position, + * and the end point is the cursor which also is on the via (will change when moving mouse) + */ g_CurrentTrackSegment->m_Start = g_CurrentTrackSegment->m_End = Via->m_Start; - + g_TrackSegmentCount++; - + g_CurrentTrackSegment->Pback = Via; - + Via->Pnext = g_CurrentTrackSegment; - + if( g_TwoSegmentTrackBuild ) - { + { // Create a second segment (we must have 2 track segments to adjust) TRACK* track = g_CurrentTrackSegment; - + g_CurrentTrackSegment = track->Copy(); - + g_TrackSegmentCount++; g_CurrentTrackSegment->Pback = track; track->Pnext = g_CurrentTrackSegment; @@ -324,7 +333,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) MODULE* Module = NULL; if( g_Show_Ratsnest ) - return; // Deja Affich� + return; // Deja Affich� if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 ) { @@ -338,7 +347,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) pt_pad = (D_PAD*) item; Module = (MODULE*) pt_pad->m_Parent; } - + if( pt_pad ) /* Affichage du chevelu du net correspondant */ { pt_pad->Display_Infos( this ); @@ -352,7 +361,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) pt_chevelu->status |= CH_VISIBLE; if( (pt_chevelu->status & CH_ACTIF) == 0 ) continue; - + GRSetDrawMode( DC, GR_XOR ); GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x, pt_chevelu->pad_start->m_Pos.y, @@ -370,12 +379,11 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) if( item->m_Parent && (item->m_Parent->Type() == TYPEMODULE) ) Module = (MODULE*) item->m_Parent; } - else if( item->Type() == TYPEMODULE ) { Module = (MODULE*) item; } - + if( Module ) { Module->Display_Infos( this ); @@ -390,11 +398,11 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) { if( pt_chevelu->status & CH_VISIBLE ) continue; - + pt_chevelu->status |= CH_VISIBLE; if( (pt_chevelu->status & CH_ACTIF) == 0 ) continue; - + GRSetDrawMode( DC, GR_XOR ); GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x, pt_chevelu->pad_start->m_Pos.y, @@ -405,7 +413,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) } } } - + pt_pad = NULL; } } @@ -417,7 +425,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) { DrawGeneralRatsnest( DC ); pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest; - + for( ii = m_Pcb->GetNumRatsnests(); (ii > 0) && pt_chevelu; pt_chevelu++, ii-- ) pt_chevelu->status &= ~CH_VISIBLE; } diff --git a/pcbnew/hotkeys.cpp b/pcbnew/hotkeys.cpp index 89039fccc0..8c563fc2eb 100644 --- a/pcbnew/hotkeys.cpp +++ b/pcbnew/hotkeys.cpp @@ -373,7 +373,7 @@ void WinEDA_PcbFrame::OnHotKey( wxDC* DC, int hotkey, case HK_ADD_VIA: // Switch to alternate layer and Place a via if a track is in progress if( m_ID_current_state != ID_TRACK_BUTT ) return; - if( ItemFree ) + if( ItemFree ) // no track in progress: switch layer only { Other_Layer_Route( NULL, DC ); break; @@ -382,7 +382,7 @@ void WinEDA_PcbFrame::OnHotKey( wxDC* DC, int hotkey, return; if( (GetCurItem()->m_Flags & IS_NEW) == 0 ) return; - Other_Layer_Route( (TRACK*) GetCurItem(), DC ); + Other_Layer_Route( (TRACK*) GetCurItem(), DC ); // place via and switch layer if( DisplayOpt.ContrastModeDisplay ) GetScreen()->SetRefreshReq(); break; diff --git a/pcbnew/pcbframe.cpp b/pcbnew/pcbframe.cpp index 9731305466..36d2d21a87 100644 --- a/pcbnew/pcbframe.cpp +++ b/pcbnew/pcbframe.cpp @@ -67,13 +67,16 @@ BEGIN_EVENT_TABLE( WinEDA_PcbFrame, WinEDA_BasePcbFrame ) EVT_MENU_RANGE(ID_CONFIG_AND_PREFERENCES_START, ID_CONFIG_AND_PREFERENCES_END, WinEDA_PcbFrame::Process_Config) + EVT_MENU( ID_COLORS_SETUP, WinEDA_PcbFrame::Process_Config ) + EVT_MENU( ID_OPTIONS_SETUP, WinEDA_PcbFrame::Process_Config ) EVT_MENU( ID_PCB_TRACK_SIZE_SETUP, WinEDA_PcbFrame::Process_Config ) EVT_MENU( ID_PCB_DRAWINGS_WIDTHS_SETUP, WinEDA_PcbFrame::Process_Config ) EVT_MENU( ID_PCB_PAD_SETUP, WinEDA_PcbFrame::Process_Config ) EVT_MENU( ID_PCB_LOOK_SETUP, WinEDA_PcbFrame::Process_Config ) EVT_MENU( ID_CONFIG_SAVE, WinEDA_PcbFrame::Process_Config ) EVT_MENU( ID_CONFIG_READ, WinEDA_PcbFrame::Process_Config ) - EVT_MENU( ID_PCB_USER_GRID_SETUP, WinEDA_PcbFrame::Process_Special_Functions ) + + EVT_MENU( ID_PCB_USER_GRID_SETUP, WinEDA_PcbFrame::Process_Special_Functions ) EVT_MENU_RANGE( ID_LANGUAGE_CHOICE, ID_LANGUAGE_CHOICE_END, WinEDA_DrawFrame::SetLanguage )