From 88fca0ed039808b273493a4ad78d3a5be5870b53 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=EA=B0=95=EB=AA=85=EA=B5=AC?= Date: Thu, 12 Aug 2021 03:50:05 +0000 Subject: [PATCH] Translated using Weblate (Korean) Currently translated at 83.7% (5883 of 7022 strings) Translation: KiCad EDA/master source Translate-URL: https://hosted.weblate.org/projects/kicad/master-source/ko/ --- translation/pofiles/ko.po | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/translation/pofiles/ko.po b/translation/pofiles/ko.po index 4fd3002394..39fec02266 100644 --- a/translation/pofiles/ko.po +++ b/translation/pofiles/ko.po @@ -16,7 +16,7 @@ msgstr "" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2021-07-19 08:40-0700\n" "PO-Revision-Date: 2021-08-12 08:20+0000\n" -"Last-Translator: 킴슨김랑기 \n" +"Last-Translator: 강명구 \n" "Language-Team: Korean \n" "Language: ko\n" @@ -20292,9 +20292,9 @@ msgid "All dielectric thickness layers are locked" msgstr "모든 유전체층의 두께가 조정되었습니다" #: pcbnew/board_stackup_manager/panel_board_stackup.cpp:279 -#, c-format, fuzzy +#, c-format msgid "Layer '%s' (sublayer %d/%d)" -msgstr "레이어 '%s'(하위 레이어 %d/%d)" +msgstr "레이어 '%s' (서브레이어 %d/%d)" #: pcbnew/board_stackup_manager/panel_board_stackup.cpp:294 #, fuzzy