From 97b273905af7cba47573d0f1c7aa0a952caefab0 Mon Sep 17 00:00:00 2001
From: Jeff Young <jeff@rokeby.ie>
Date: Sun, 26 Mar 2023 21:06:24 +0100
Subject: [PATCH] Manual cherry-pick of
 a214ac03107003c7c84687a4f806c7bc66a5df15.

---
 pcbnew/drc/drc_engine.cpp              | 7 +++++++
 pcbnew/tools/board_inspection_tool.cpp | 6 +++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/pcbnew/drc/drc_engine.cpp b/pcbnew/drc/drc_engine.cpp
index f938ca1635..aa6b576bae 100644
--- a/pcbnew/drc/drc_engine.cpp
+++ b/pcbnew/drc/drc_engine.cpp
@@ -1389,6 +1389,13 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRules( DRC_CONSTRAINT_T aConstraintType, const BO
             constraint.m_Value.SetMin( m_designSettings->m_MinClearance );
         }
 
+        if( a_is_non_copper || b_is_non_copper )
+        {
+            REPORT( _( "Board and netclass clearances apply only between copper items." ) );
+            constraint.m_Type = NULL_CONSTRAINT;
+            constraint.m_DisallowFlags = 0;
+        }
+
         return constraint;
     }
     else if( aConstraintType == DIFF_PAIR_GAP_CONSTRAINT )
diff --git a/pcbnew/tools/board_inspection_tool.cpp b/pcbnew/tools/board_inspection_tool.cpp
index fddecf600f..86e8048f0a 100644
--- a/pcbnew/tools/board_inspection_tool.cpp
+++ b/pcbnew/tools/board_inspection_tool.cpp
@@ -766,7 +766,11 @@ int BOARD_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
         {
             // Different nets (or one or both unconnected)....
             constraint = drcEngine.EvalRules( CLEARANCE_CONSTRAINT, a, b, layer, r );
-            clearance = constraint.m_Value.Min();
+
+            if( constraint.IsNull() )
+                clearance = 0;
+            else
+                clearance = constraint.m_Value.Min();
 
             if( compileError )
                 reportCompileError( r );