diff --git a/pcbnew/pad.cpp b/pcbnew/pad.cpp
index 38df192e09..c54530ebf4 100644
--- a/pcbnew/pad.cpp
+++ b/pcbnew/pad.cpp
@@ -811,26 +811,33 @@ void PAD::SetAttribute( PAD_ATTRIB aAttribute )
         switch( aAttribute )
         {
         case PAD_ATTRIB::PTH:
+            // Plump up to all copper layers
             m_layerMask |= LSET::AllCuMask();
             break;
 
         case PAD_ATTRIB::SMD:
         case PAD_ATTRIB::CONN:
-            if( m_layerMask.test( F_Cu ) )
+        {
+            // Trim down to no more than one copper layer
+            LSET copperLayers = m_layerMask & LSET::AllCuMask();
+
+            if( copperLayers.count() > 1 )
             {
                 m_layerMask &= ~LSET::AllCuMask();
-                m_layerMask.set( F_Cu );
-            }
-            else
-            {
-                m_layerMask &= ~LSET::AllCuMask();
-                m_layerMask.set( B_Cu );
+
+                if( copperLayers.test( B_Cu ) )
+                    m_layerMask.set( B_Cu );
+                else
+                    m_layerMask.set( copperLayers.Seq().front() );
             }
 
+            // No hole
             m_drill = VECTOR2I( 0, 0 );
             break;
+        }
 
         case PAD_ATTRIB::NPTH:
+            // No number; no net
             m_number = wxEmptyString;
             SetNetCode( NETINFO_LIST::UNCONNECTED );
             break;
diff --git a/pcbnew/pad.h b/pcbnew/pad.h
index b811030c76..ad1cee1236 100644
--- a/pcbnew/pad.h
+++ b/pcbnew/pad.h
@@ -816,8 +816,8 @@ private:
                                     //   one end and half expands the other.  It is only valid
                                     //   to have a single axis be non-0.
 
-    PAD_ATTRIB  m_attribute;        // PAD_ATTRIB_NORMAL, PAD_ATTRIB::SMD, PAD_ATTRIB::CONN,
-                                    //   PAD_ATTRIB::NPTH
+    PAD_ATTRIB  m_attribute = PAD_ATTRIB::PTH;
+
     PAD_PROP    m_property;         // Property in fab files (BGA, FIDUCIAL, TESTPOINT, etc.)
 
     EDA_ANGLE   m_orient;