From 9e80eff90a1072e9689c59e692a4f7ab8de07d63 Mon Sep 17 00:00:00 2001
From: Maciej Suminski <maciej.suminski@cern.ch>
Date: Fri, 16 Feb 2018 19:29:47 +0100
Subject: [PATCH] Eagle importer: two stage netlist update

After Eagle project import, schematic and board netlists are inconsistent:
footprints do not have sheetpaths assigned, schematics are unannotated.

One can update netlist either by references or timestamps, but timestamps
are empty in pcbnew, and updating by reference must by preceded by
annotation which may lead to broken links between board and schematics
(Eagle does not require references to end with a number, so KiCad annotater
will add numbers in such cases).

To fix the problem, there is a two step netlist update:
- update by reference without the annotation step, to assign
correct sheetpaths to footprints
- update by timestamp, after symbols are annotated, in order to
update references in the board

Fixes: lp:1748502
* https://bugs.launchpad.net/kicad/+bug/1748502
---
 eeschema/sch_edit_frame.h |  2 +-
 include/kiway_player.h    | 30 ------------------------------
 kicad/import_project.cpp  | 26 +++++++-------------------
 pcbnew/pcb_edit_frame.h   |  2 +-
 4 files changed, 9 insertions(+), 51 deletions(-)

diff --git a/eeschema/sch_edit_frame.h b/eeschema/sch_edit_frame.h
index 861a6106d7..d6732dd371 100644
--- a/eeschema/sch_edit_frame.h
+++ b/eeschema/sch_edit_frame.h
@@ -550,7 +550,7 @@ public:
                         const wxString& aFullFileName,
                         unsigned        aNetlistOptions,
                         REPORTER*       aReporter = NULL,
-                        bool silent = false ) override;
+                        bool silent = false );
 
     /**
      * Create a netlist file.
diff --git a/include/kiway_player.h b/include/kiway_player.h
index 613a41ab8e..3bf0e97b82 100644
--- a/include/kiway_player.h
+++ b/include/kiway_player.h
@@ -192,36 +192,6 @@ public:
         return false;
     }
 
-    /**
-     * Function ReadPcbNetlist
-     *  provides access to PcbNew's function ReadPcbNetlist.
-     */
-    VTBL_ENTRY void ReadPcbNetlist( const wxString& aNetlistFileName,
-            const wxString& aCmpFileName,
-            REPORTER* aReporter,
-            bool aChangeFootprint,
-            bool aDeleteBadTracks,
-            bool aDeleteExtraFootprints,
-            bool aSelectByTimestamp,
-            bool aDeleteSinglePadNets,
-            bool aIsDryRun )
-    {
-    };
-
-    /**
-     * Function ReadPcbNetlist
-     *  provides access to Eeschema's function CreateNetlist.
-     */
-    VTBL_ENTRY bool CreateNetlist( int aFormat,
-            const wxString& aFullFileName,
-            unsigned aNetlistOptions,
-            REPORTER* aReporter = NULL,
-            bool silent = false )
-    {
-        return false;
-    };
-
-
     /**
      * Function ShowModal
      * puts up this wxFrame as if it were a modal dialog, with all other instantiated
diff --git a/kicad/import_project.cpp b/kicad/import_project.cpp
index 10b2084985..3727005a53 100644
--- a/kicad/import_project.cpp
+++ b/kicad/import_project.cpp
@@ -115,8 +115,6 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
         }
     }
 
-
-
     wxFileName pcb( sch );
     wxFileName netlist( pro );
     pro.SetExt( ProjectFileExtension );         // enforce extension
@@ -127,9 +125,7 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
         pro.MakeAbsolute();
 
     SetProjectFileName( pro.GetFullPath() );
-
     wxString prj_filename = GetProjectFileName();
-
     wxString sch_filename = sch.GetFullPath();
 
     if( sch.FileExists() )
@@ -162,10 +158,9 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
             schframe->Iconize( false );
 
         schframe->Raise();
-
-        schframe->CreateNetlist( NET_TYPE_PCBNEW, netlist.GetFullPath(), 0, NULL,  true );
     }
 
+
     if( pcb.FileExists() )
     {
         PCB_EDIT_FRAME* pcbframe = (PCB_EDIT_FRAME*) Kiway.Player( FRAME_PCB, false );
@@ -189,7 +184,7 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
         // if the frame is not visible, the board is not yet loaded
         if( !pcbframe->IsVisible() )
         {
-            pcbframe->ImportFile(  pcb.GetFullPath(), IO_MGR::EAGLE );
+            pcbframe->ImportFile( pcb.GetFullPath(), IO_MGR::EAGLE );
             pcbframe->Show( true );
         }
 
@@ -199,18 +194,11 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
 
         pcbframe->Raise();
 
-        if( netlist.FileExists() )
-        {
-            pcbframe->ReadPcbNetlist( netlist.GetFullPath(),
-                    wxEmptyString,
-                    NULL,
-                    false,
-                    false,
-                    false,
-                    false,
-                    false,
-                    false );
-        }
+        // Two stage project update:
+        // - first, assign valid timestamps to footprints
+        // - second, perform schematic annotation and update footprint references
+        pcbframe->Kiway().ExpressMail( FRAME_SCH, MAIL_SCH_PCB_UPDATE_REQUEST, "no-annotate;by-reference", this );
+        pcbframe->Kiway().ExpressMail( FRAME_SCH, MAIL_SCH_PCB_UPDATE_REQUEST, "quiet-annotate;by-timestamp", this );
     }
 
     ReCreateTreePrj();
diff --git a/pcbnew/pcb_edit_frame.h b/pcbnew/pcb_edit_frame.h
index 8b53d9570e..1fef5e26a8 100644
--- a/pcbnew/pcb_edit_frame.h
+++ b/pcbnew/pcb_edit_frame.h
@@ -1550,7 +1550,7 @@ public:
                          bool             aDeleteExtraFootprints,
                          bool             aSelectByTimestamp,
                          bool             aDeleteSinglePadNets,
-                         bool             aIsDryRun ) override;
+                         bool             aIsDryRun );
 
     /**
      * Function RemoveMisConnectedTracks