diff --git a/demos/simulation/rectifier/diode.mod b/demos/simulation/rectifier/diode.mod
new file mode 100644
index 0000000000..73b61653e3
--- /dev/null
+++ b/demos/simulation/rectifier/diode.mod
@@ -0,0 +1,2 @@
+*generic diode model
+.model 1N4148 D
diff --git a/demos/simulation/rectifier/rectifier-cache.lib b/demos/simulation/rectifier/rectifier-cache.lib
index 5af522f8a8..bf2727eda9 100644
--- a/demos/simulation/rectifier/rectifier-cache.lib
+++ b/demos/simulation/rectifier/rectifier-cache.lib
@@ -1,101 +1,101 @@
-EESchema-LIBRARY Version 2.4
-#encoding utf-8
-#
-# C
-#
-DEF C C 0 10 N Y 1 F N
-F0 "C" 25 100 50 H V L CNN
-F1 "C" 25 -100 50 H V L CNN
-F2 "" 38 -150 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
-$FPLIST
- C?
- C_????_*
- C_????
- SMD*_c
- Capacitor*
- Capacitors_ThroughHole:C_Radial_D10_L13_P5
- Capacitors_SMD:C_0805
- Capacitors_SMD:C_1206
-$ENDFPLIST
-DRAW
-P 2 0 1 20 -80 -30 80 -30 N
-P 2 0 1 20 -80 30 80 30 N
-X ~ 1 0 150 110 D 40 40 1 1 P
-X ~ 2 0 -150 110 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# D
-#
-DEF D D 0 40 N N 1 F N
-F0 "D" 0 100 50 H V C CNN
-F1 "D" 0 -100 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
-$FPLIST
- Diode_*
- D-Pak_TO252AA
- *SingleDiode
- *_Diode_*
- *SingleDiode*
-$ENDFPLIST
-DRAW
-P 2 0 1 6 -50 50 -50 -50 N
-P 3 0 1 0 50 50 -50 0 50 -50 F
-X K 1 -150 0 100 R 50 50 1 1 P
-X A 2 150 0 100 L 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# GND
-#
-DEF GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "GND" 0 -123 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
-X GND 1 0 0 0 D 20 30 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 80 0 50 V V C CNN
-F1 "R" 0 0 50 V V C CNN
-F2 "" -70 0 50 V V C CNN
-F3 "" 0 0 50 H V C CNN
-$FPLIST
- R_*
- Resistor_*
-$ENDFPLIST
-DRAW
-S -40 -100 40 100 0 1 10 N
-X ~ 1 0 150 50 D 50 50 1 1 P
-X ~ 2 0 -150 50 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# VSOURCE
-#
-DEF ~VSOURCE V 0 40 Y Y 1 F N
-F0 "V" 200 200 50 H V C CNN
-F1 "VSOURCE" 250 100 50 H I C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
-F4 "Value" 0 0 60 H I C CNN "Fieldname"
-F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
-F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
-DRAW
-C 0 0 100 0 1 0 N
-P 2 0 1 0 0 -75 0 75 N
-P 4 0 1 0 0 75 -25 25 25 25 0 75 F
-X ~ 1 0 200 100 D 50 50 1 1 I
-X ~ 2 0 -200 100 U 50 50 1 1 I
-ENDDRAW
-ENDDEF
-#
-#End Library
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# rectifier_schlib_C
+#
+DEF rectifier_schlib_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "rectifier_schlib_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ C?
+ C_????_*
+ C_????
+ SMD*_c
+ Capacitor*
+ Capacitors_ThroughHole:C_Radial_D10_L13_P5
+ Capacitors_SMD:C_0805
+ Capacitors_SMD:C_1206
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# rectifier_schlib_D
+#
+DEF rectifier_schlib_D D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "rectifier_schlib_D" 0 -100 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ Diode_*
+ D-Pak_TO252AA
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+$ENDFPLIST
+DRAW
+P 2 0 1 6 -50 50 -50 -50 N
+P 3 0 1 0 50 50 -50 0 50 -50 F
+X K 1 -150 0 100 R 50 50 1 1 P
+X A 2 150 0 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# rectifier_schlib_GND
+#
+DEF rectifier_schlib_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "rectifier_schlib_GND" 0 -123 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 20 30 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# rectifier_schlib_R
+#
+DEF rectifier_schlib_R R 0 0 N Y 1 F N
+F0 "R" 80 0 50 V V C CNN
+F1 "rectifier_schlib_R" 0 0 50 V V C CNN
+F2 "" -70 0 50 V V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S -40 -100 40 100 0 1 10 N
+X ~ 1 0 150 50 D 50 50 1 1 P
+X ~ 2 0 -150 50 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# rectifier_schlib_VSOURCE
+#
+DEF rectifier_schlib_VSOURCE V 0 40 Y Y 1 F N
+F0 "V" 200 200 50 H V C CNN
+F1 "rectifier_schlib_VSOURCE" 250 100 50 H I C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+F4 "Value" 0 0 60 H I C CNN "Fieldname"
+F5 "V" 0 0 60 H I C CNN "Spice_Primitive"
+F6 "1 2" -300 200 60 H I C CNN "Spice_Node_Sequence"
+DRAW
+C 0 0 100 0 1 0 N
+P 2 0 1 0 0 -75 0 75 N
+P 4 0 1 0 0 75 -25 25 25 25 0 75 F
+X ~ 1 0 200 100 D 50 50 1 1 I
+X ~ 2 0 -200 100 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/demos/simulation/rectifier/rectifier.sch b/demos/simulation/rectifier/rectifier.sch
index 815cb29928..d1ba00fe53 100644
--- a/demos/simulation/rectifier/rectifier.sch
+++ b/demos/simulation/rectifier/rectifier.sch
@@ -1,129 +1,137 @@
-EESchema Schematic File Version 4
-LIBS:rectifier-cache
-EELAYER 26 0
-EELAYER END
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-F 3 "" H 4400 4050 50  0000 C CNN
-F 4 "Value" H 4400 4050 60  0001 C CNN "Fieldname"
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-F 6 "1 2" H 4100 4250 60  0001 C CNN "Spice_Node_Sequence"
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-$EndComp
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-F 3 "" H 4400 4350 50  0000 C CNN
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-$EndComp
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-F 2 "" V 4580 3700 50  0000 C CNN
-F 3 "" H 4650 3700 50  0000 C CNN
-F 4 "Value" H 4650 3700 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 4650 3700 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 4650 3700 60  0001 C CNN "Spice_Primitive"
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-$EndComp
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-F 4 "Value" H 5100 3700 60  0001 C CNN "Fieldname"
-F 5 "D" H 5100 3700 60  0001 C CNN "Spice_Primitive"
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-$EndComp
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-F 6 "1 2" H 5400 4000 60  0001 C CNN "SpiceMapping"
-	1    5400 4000
-	1    0    0    -1  
-$EndComp
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-F 2 "" V 5680 4000 50  0000 C CNN
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-F 4 "Value" H 5750 4000 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 5750 4000 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 5750 4000 60  0001 C CNN "Spice_Primitive"
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-	-1   0    0    1   
-$EndComp
-Text Notes 4300 4900 0    60   ~ 0
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-Connection ~ 5400 4300
-Wire Wire Line
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-Wire Wire Line
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-Text Label 4400 3700 2    60   ~ 0
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-Text Label 5750 3700 0    60   ~ 0
-rect_out
-Text Notes 4300 5000 0    60   ~ 0
-*.ac dec 10 1 1Meg\n
-$EndSCHEMATC
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
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+U 1 1 57336052
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+F 3 "" H 4400 4050 50  0000 C CNN
+F 4 "Value" H 4400 4050 60  0001 C CNN "Fieldname"
+F 5 "V" H 4400 4050 60  0001 C CNN "Spice_Primitive"
+F 6 "1 2" H 4100 4250 60  0001 C CNN "Spice_Node_Sequence"
+	1    4400 4050
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+$EndComp
+$Comp
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+F 2 "" H 4400 4350 50  0000 C CNN
+F 3 "" H 4400 4350 50  0000 C CNN
+	1    4400 4350
+	1    0    0    -1  
+$EndComp
+$Comp
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+F 2 "" V 4580 3700 50  0000 C CNN
+F 3 "" H 4650 3700 50  0000 C CNN
+F 4 "Value" H 4650 3700 60  0001 C CNN "Fieldname"
+F 5 "1 2" H 4650 3700 60  0001 C CNN "SpiceMapping"
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+$EndComp
+$Comp
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+F 2 "" H 5100 3700 50  0000 C CNN
+F 3 "" H 5100 3700 50  0000 C CNN
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+F 6 "2 1" H 5100 3700 60  0001 C CNN "Spice_Node_Sequence"
+F 7 "1N4148" H 5100 3700 50  0001 C CNN "Spice_Model"
+F 8 "Y" H 5100 3700 50  0001 C CNN "Spice_Netlist_Enabled"
+F 9 "diode.mod" H 5100 3700 50  0001 C CNN "Spice_Lib_File"
+	1    5100 3700
+	-1   0    0    1   
+$EndComp
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+$EndComp
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+F 6 "R" V 5750 4000 60  0001 C CNN "Spice_Primitive"
+	1    5750 4000
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+$EndComp
+Text Notes 4300 4900 0    60   ~ 0
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