diff --git a/pcbnew/board_stackup_manager/board_stackup.cpp b/pcbnew/board_stackup_manager/board_stackup.cpp
index 3428342ad8..97300fe24f 100644
--- a/pcbnew/board_stackup_manager/board_stackup.cpp
+++ b/pcbnew/board_stackup_manager/board_stackup.cpp
@@ -616,6 +616,7 @@ void BOARD_STACKUP::BuildDefaultStackupList( const BOARD_DESIGN_SETTINGS* aSetti
     {
         const BOARD_STACKUP& source_stackup = aSettings->GetStackupDescriptor();
         m_EdgeConnectorConstraints = source_stackup.m_EdgeConnectorConstraints;
+        m_HasDielectricConstrains = source_stackup.m_HasDielectricConstrains;
         m_CastellatedPads = source_stackup.m_CastellatedPads;
         m_EdgePlating     = source_stackup.m_EdgePlating;
         m_FinishType      = source_stackup.m_FinishType;
diff --git a/pcbnew/board_stackup_manager/panel_board_stackup.cpp b/pcbnew/board_stackup_manager/panel_board_stackup.cpp
index 85748beee5..63896cf67e 100644
--- a/pcbnew/board_stackup_manager/panel_board_stackup.cpp
+++ b/pcbnew/board_stackup_manager/panel_board_stackup.cpp
@@ -1271,6 +1271,12 @@ bool PANEL_SETUP_BOARD_STACKUP::TransferDataFromWindow()
         modified = true;
     }
 
+    if( brd_stackup.m_HasDielectricConstrains != m_impedanceControlled->GetValue() )
+    {
+        brd_stackup.m_HasDielectricConstrains = m_impedanceControlled->GetValue();
+        modified = true;
+    }
+
     if( !m_brdSettings->m_HasStackup )
     {
         m_brdSettings->m_HasStackup = true;