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This commit is contained in:
dickelbeck 2008-02-05 05:08:10 +00:00
parent 57c1927121
commit ab01d0f2f2
3 changed files with 41 additions and 26 deletions
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6
change_log.txt
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@ -8,9 +8,9 @@ email address.
2008-Feb-4 UPDATE Dick Hollenbeck <dick@softplc.com> 2008-Feb-4 UPDATE Dick Hollenbeck <dick@softplc.com>
================================================================================ ================================================================================
+pcbnew +pcbnew
specctra_export.cpp now supports blind/buried/microvias. Changed (fixed?) how specctra_export.cpp now supports blind/buried/microvias. Fixed how modules
modules are displayed on back of board. Needs testing with various angles are displayed on back of board. Added a circle keepout for each copper-less
of rotation. through hole.
2008-Feb-3 UPDATE Dick Hollenbeck <dick@softplc.com> 2008-Feb-3 UPDATE Dick Hollenbeck <dick@softplc.com>

33
pcbnew/specctra.h
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@ -988,30 +988,49 @@ public:
void Format( OUTPUTFORMATTER* out, int nestLevel ) throw( IOError ) void Format( OUTPUTFORMATTER* out, int nestLevel ) throw( IOError )
{ {
out->Print( nestLevel, "(%s\n", LEXER::GetTokenText( Type() ) ); const char* newline = "\n";
out->Print( nestLevel, "(%s", LEXER::GetTokenText( Type() ) );
if( name.size() ) if( name.size() )
{ {
const char* quote = out->GetQuoteChar( name.c_str() ); const char* quote = out->GetQuoteChar( name.c_str() );
out->Print( nestLevel+1, "%s%s%s\n", quote, name.c_str(), quote ); out->Print( 0, " %s%s%s", quote, name.c_str(), quote );
} }
if( sequence_number != -1 ) if( sequence_number != -1 )
out->Print( nestLevel+1, "(sequence_number %d)\n", sequence_number ); out->Print( 0, " (sequence_number %d)", sequence_number );
if( shape ) if( shape )
shape->Format( out, nestLevel+1 ); {
out->Print( 0, " " );
shape->Format( out, 0 );
}
if( rules ) if( rules )
{
out->Print( 0, "%s", newline );
newline = "";
rules->Format( out, nestLevel+1 ); rules->Format( out, nestLevel+1 );
}
if( place_rules ) if( place_rules )
{
out->Print( 0, "%s", newline );
newline = "";
place_rules->Format( out, nestLevel+1 ); place_rules->Format( out, nestLevel+1 );
}
for( WINDOWS::iterator i=windows.begin(); i!=windows.end(); ++i ) if( windows.size() )
i->Format( out, nestLevel+1 ); {
out->Print( 0, "%s", newline );
newline = "";
out->Print( nestLevel, ")\n" ); for( WINDOWS::iterator i=windows.begin(); i!=windows.end(); ++i )
i->Format( out, nestLevel+1 );
}
out->Print( 0, ")\n" );
} }
}; };
typedef boost::ptr_vector<KEEPOUT> KEEPOUTS; typedef boost::ptr_vector<KEEPOUT> KEEPOUTS;

24
pcbnew/specctra_export.cpp
View File

@ -316,22 +316,17 @@ IMAGE* SPECCTRA_DB::makeIMAGE( MODULE* aModule )
D_PAD* pad = (D_PAD*) pads[p]; D_PAD* pad = (D_PAD*) pads[p];
// see if this pad is a through hole with no copper on its perimeter // see if this pad is a through hole with no copper on its perimeter
if( !pad->IsOnLayer( LAYER_CMP_N ) && !pad->IsOnLayer( COPPER_LAYER_N ) ) if( pad->m_PadShape==PAD_CIRCLE && pad->m_Drill.x >= pad->m_Size.x )
{ {
if( pad->m_Drill.x != 0 ) KEEPOUT* keepout = new KEEPOUT(image, T_keepout);
{ image->keepouts.push_back( keepout );
KEEPOUT* keepout = new KEEPOUT(image, T_keepout);
image->keepouts.push_back( keepout );
CIRCLE* circle = new CIRCLE(keepout); CIRCLE* circle = new CIRCLE(keepout);
keepout->SetShape( circle ); keepout->SetShape( circle );
circle->SetDiameter( scale(pad->m_Drill.x) ); circle->SetDiameter( scale(pad->m_Drill.x) );
circle->SetVertex( POINT( mapPt( pad->m_Pos0 ) ) ); circle->SetVertex( mapPt( pad->m_Pos0 ) );
circle->layer_id = "signal"; circle->layer_id = "signal";
// ?? the keepout is not affecting the power layers?
}
} }
else else
{ {
@ -471,7 +466,8 @@ void SPECCTRA_DB::makePADSTACKs( BOARD* aBoard, TYPE_COLLECTOR& aPads )
// if pad has no copper presence, then it will be made into // if pad has no copper presence, then it will be made into
// an "image->keepout" later. No copper pad here, it is probably a hole. // an "image->keepout" later. No copper pad here, it is probably a hole.
if( !doLayer[0] && !doLayer[1] ) if( (!doLayer[0] && !doLayer[1])
|| (pad->m_PadShape==PAD_CIRCLE && pad->m_Drill.x >= pad->m_Size.x) )
{ {
// padstacks.size()-1 is the index of the matching padstack in LIBRARY::padstacks // padstacks.size()-1 is the index of the matching padstack in LIBRARY::padstacks
pad->m_logical_connexion = pcb->library->padstacks.size()-1; pad->m_logical_connexion = pcb->library->padstacks.size()-1;