From ab583a32f9db8758c7c3c77da3666d4c5f797eff Mon Sep 17 00:00:00 2001 From: Jeff Young Date: Sun, 26 Dec 2021 13:47:00 +0000 Subject: [PATCH] Better layer handling for DRC markers. Fixes https://gitlab.com/kicad/code/kicad/issues/10126 --- pcbnew/dialogs/dialog_drc.cpp | 2 +- pcbnew/drc/drc_engine.cpp | 5 +- pcbnew/drc/drc_engine.h | 6 ++- pcbnew/drc/drc_test_provider.cpp | 4 +- pcbnew/drc/drc_test_provider.h | 3 +- .../drc/drc_test_provider_annular_width.cpp | 2 +- pcbnew/drc/drc_test_provider_connectivity.cpp | 6 +-- .../drc_test_provider_copper_clearance.cpp | 46 +++++++++---------- .../drc_test_provider_courtyard_clearance.cpp | 19 +++++--- .../drc_test_provider_diff_pair_coupling.cpp | 6 ++- pcbnew/drc/drc_test_provider_disallow.cpp | 4 +- .../drc/drc_test_provider_edge_clearance.cpp | 2 +- pcbnew/drc/drc_test_provider_hole_size.cpp | 4 +- pcbnew/drc/drc_test_provider_hole_to_hole.cpp | 4 +- .../drc/drc_test_provider_library_parity.cpp | 8 ++-- .../drc/drc_test_provider_matched_length.cpp | 9 ++-- ...drc_test_provider_mechanical_clearance.cpp | 26 +++++------ pcbnew/drc/drc_test_provider_misc.cpp | 15 +++--- .../drc_test_provider_schematic_parity.cpp | 14 +++--- .../drc/drc_test_provider_silk_clearance.cpp | 2 +- .../drc/drc_test_provider_sliver_checker.cpp | 2 +- pcbnew/drc/drc_test_provider_solder_mask.cpp | 6 +-- pcbnew/drc/drc_test_provider_text_dims.cpp | 4 +- pcbnew/drc/drc_test_provider_track_width.cpp | 2 +- pcbnew/drc/drc_test_provider_via_diameter.cpp | 2 +- .../drc_test_provider_zone_connections.cpp | 2 +- .../scripting/pcbnew_scripting_helpers.cpp | 2 +- pcbnew/tools/drc_tool.cpp | 3 +- qa/drc_proto/drc_proto.cpp | 2 +- qa/pcbnew/drc/test_custom_rule_severities.cpp | 2 +- qa/pcbnew/drc/test_drc_courtyard_invalid.cpp | 2 +- qa/pcbnew/drc/test_drc_courtyard_overlap.cpp | 2 +- qa/pcbnew/drc/test_drc_regressions.cpp | 4 +- qa/pcbnew/drc/test_solder_mask_bridging.cpp | 2 +- qa/pcbnew/test_tracks_cleaner.cpp | 2 +- qa/pcbnew/test_zone_filler.cpp | 4 +- 36 files changed, 123 insertions(+), 107 deletions(-) diff --git a/pcbnew/dialogs/dialog_drc.cpp b/pcbnew/dialogs/dialog_drc.cpp index a6a5ba6c75..9f96414045 100644 --- a/pcbnew/dialogs/dialog_drc.cpp +++ b/pcbnew/dialogs/dialog_drc.cpp @@ -356,7 +356,7 @@ void DIALOG_DRC::OnDRCItemSelected( wxDataViewEvent& aEvent ) } }; - if( node && item ) + if( node && item && item != DELETED_BOARD_ITEM::GetInstance() ) { PCB_LAYER_ID principalLayer = item->GetLayer(); LSET violationLayers; diff --git a/pcbnew/drc/drc_engine.cpp b/pcbnew/drc/drc_engine.cpp index 77a2e82f5d..3acecac8eb 100644 --- a/pcbnew/drc/drc_engine.cpp +++ b/pcbnew/drc/drc_engine.cpp @@ -1363,12 +1363,13 @@ bool DRC_ENGINE::IsErrorLimitExceeded( int error_code ) } -void DRC_ENGINE::ReportViolation( const std::shared_ptr& aItem, const wxPoint& aPos ) +void DRC_ENGINE::ReportViolation( const std::shared_ptr& aItem, const wxPoint& aPos, + PCB_LAYER_ID aMarkerLayer ) { m_errorLimits[ aItem->GetErrorCode() ] -= 1; if( m_violationHandler ) - m_violationHandler( aItem, aPos ); + m_violationHandler( aItem, aPos, aMarkerLayer ); if( m_reporter ) { diff --git a/pcbnew/drc/drc_engine.h b/pcbnew/drc/drc_engine.h index c8305ef1eb..699e741d37 100644 --- a/pcbnew/drc/drc_engine.h +++ b/pcbnew/drc/drc_engine.h @@ -65,7 +65,7 @@ class DRC_CONSTRAINT; typedef std::function& aItem, - const wxPoint& aPos )> DRC_VIOLATION_HANDLER; + const wxPoint& aPos, PCB_LAYER_ID aLayer )> DRC_VIOLATION_HANDLER; /** @@ -164,7 +164,9 @@ public: bool RulesValid() { return m_rulesValid; } - void ReportViolation( const std::shared_ptr& aItem, const wxPoint& aPos ); + void ReportViolation( const std::shared_ptr& aItem, const wxPoint& aPos, + PCB_LAYER_ID aMarkerLayer ); + bool ReportProgress( double aProgress ); bool ReportPhase( const wxString& aMessage ); void ReportAux( const wxString& aStr ); diff --git a/pcbnew/drc/drc_test_provider.cpp b/pcbnew/drc/drc_test_provider.cpp index 7807024cc8..76f6c46865 100644 --- a/pcbnew/drc/drc_test_provider.cpp +++ b/pcbnew/drc/drc_test_provider.cpp @@ -54,13 +54,13 @@ const wxString DRC_TEST_PROVIDER::GetDescription() const { return ""; } void DRC_TEST_PROVIDER::reportViolation( std::shared_ptr& item, - const wxPoint& aMarkerPos ) + const wxPoint& aMarkerPos, PCB_LAYER_ID aMarkerLayer ) { if( item->GetViolatingRule() ) accountCheck( item->GetViolatingRule() ); item->SetViolatingTest( this ); - m_drcEngine->ReportViolation( item, aMarkerPos ); + m_drcEngine->ReportViolation( item, aMarkerPos, aMarkerLayer ); } diff --git a/pcbnew/drc/drc_test_provider.h b/pcbnew/drc/drc_test_provider.h index c029a01543..5ee9bbf99e 100644 --- a/pcbnew/drc/drc_test_provider.h +++ b/pcbnew/drc/drc_test_provider.h @@ -94,7 +94,8 @@ protected: const std::function& aFunc ); virtual void reportAux( wxString fmt, ... ); - virtual void reportViolation( std::shared_ptr& item, const wxPoint& aMarkerPos ); + virtual void reportViolation( std::shared_ptr& item, const wxPoint& aMarkerPos, + PCB_LAYER_ID aMarkerLayer ); virtual bool reportProgress( int aCount, int aSize, int aDelta ); virtual bool reportPhase( const wxString& aStageName ); diff --git a/pcbnew/drc/drc_test_provider_annular_width.cpp b/pcbnew/drc/drc_test_provider_annular_width.cpp index e96adba124..cb03c60a8d 100644 --- a/pcbnew/drc/drc_test_provider_annular_width.cpp +++ b/pcbnew/drc/drc_test_provider_annular_width.cpp @@ -139,7 +139,7 @@ bool DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run() drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, via->GetPosition() ); + reportViolation( drcItem, via->GetPosition(), via->GetLayer() ); } return true; diff --git a/pcbnew/drc/drc_test_provider_connectivity.cpp b/pcbnew/drc/drc_test_provider_connectivity.cpp index 1409570897..3a3ddb1eba 100644 --- a/pcbnew/drc/drc_test_provider_connectivity.cpp +++ b/pcbnew/drc/drc_test_provider_connectivity.cpp @@ -109,7 +109,7 @@ bool DRC_TEST_PROVIDER_CONNECTIVITY::Run() { std::shared_ptr drcItem = DRC_ITEM::Create( code ); drcItem->SetItems( track ); - reportViolation( drcItem, pos ); + reportViolation( drcItem, pos, track->GetLayer() ); } } @@ -135,7 +135,7 @@ bool DRC_TEST_PROVIDER_CONNECTIVITY::Run() { std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_ZONE_HAS_EMPTY_NET ); drcItem->SetItems( zone ); - reportViolation( drcItem, zone->GetPosition() ); + reportViolation( drcItem, zone->GetPosition(), zone->GetLayer() ); } } @@ -162,7 +162,7 @@ bool DRC_TEST_PROVIDER_CONNECTIVITY::Run() std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_UNCONNECTED_ITEMS ); drcItem->SetItems( edge.GetSourceNode()->Parent(), edge.GetTargetNode()->Parent() ); - reportViolation( drcItem, (wxPoint) edge.GetSourceNode()->Pos() ); + reportViolation( drcItem, (wxPoint) edge.GetSourceNode()->Pos(), UNDEFINED_LAYER ); } reportRuleStatistics(); diff --git a/pcbnew/drc/drc_test_provider_copper_clearance.cpp b/pcbnew/drc/drc_test_provider_copper_clearance.cpp index aa01719817..4c4b085e88 100644 --- a/pcbnew/drc/drc_test_provider_copper_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_copper_clearance.cpp @@ -291,7 +291,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( PCB_TRACK* track, drcItem->SetItems( track, other ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, (wxPoint) intersection.get() ); + reportViolation( drcItem, (wxPoint) intersection.get(), layer ); return m_drcEngine->GetReportAllTrackErrors(); } @@ -312,7 +312,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( PCB_TRACK* track, drce->SetItems( track, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, layer ); if( !m_drcEngine->GetReportAllTrackErrors() ) return false; @@ -360,7 +360,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( PCB_TRACK* track, drce->SetItems( track, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, layer ); if( !m_drcEngine->GetReportAllTrackErrors() ) return false; @@ -446,7 +446,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZone( BOARD_ITEM* aItem, drce->SetItems( aItem, aZone ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); } } @@ -492,7 +492,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZone( BOARD_ITEM* aItem, drce->SetItems( aItem, aZone ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); } } } @@ -566,7 +566,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances() bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* padShape, - PCB_LAYER_ID layer, + PCB_LAYER_ID aLayer, BOARD_ITEM* other ) { bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE ); @@ -595,14 +595,14 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa if( other->Type() == PCB_VIA_T ) otherVia = static_cast( other ); - if( !IsCopperLayer( layer ) ) + if( !IsCopperLayer( aLayer ) ) testClearance = false; // A NPTH has no cylinder, but it may still have pads on some layers - if( pad->GetAttribute() == PAD_ATTRIB::NPTH && !pad->FlashLayer( layer ) ) + if( pad->GetAttribute() == PAD_ATTRIB::NPTH && !pad->FlashLayer( aLayer ) ) testClearance = false; - if( otherPad && otherPad->GetAttribute() == PAD_ATTRIB::NPTH && !otherPad->FlashLayer( layer ) ) + if( otherPad && otherPad->GetAttribute() == PAD_ATTRIB::NPTH && !otherPad->FlashLayer( aLayer ) ) testClearance = false; // Track clearances are tested in testTrackClearances() @@ -630,7 +630,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa if( !testClearance && !testShorting && !testHoles ) return false; - std::shared_ptr otherShape = DRC_ENGINE::GetShape( other, layer ); + std::shared_ptr otherShape = DRC_ENGINE::GetShape( other, aLayer ); DRC_CONSTRAINT constraint; int clearance; int actual; @@ -654,7 +654,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + m_msg ); drce->SetItems( pad, otherPad ); - reportViolation( drce, otherPad->GetPosition() ); + reportViolation( drce, otherPad->GetPosition(), aLayer ); } return true; @@ -662,7 +662,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa if( testClearance ) { - constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, pad, other, layer ); + constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, pad, other, aLayer ); clearance = constraint.GetValue().Min(); if( constraint.GetSeverity() != RPT_SEVERITY_IGNORE && clearance > 0 ) @@ -681,7 +681,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa drce->SetItems( pad, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); testHoles = false; // No need for multiple violations } } @@ -689,14 +689,14 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa if( testHoles ) { - constraint = m_drcEngine->EvalRules( HOLE_CLEARANCE_CONSTRAINT, pad, other, layer ); + constraint = m_drcEngine->EvalRules( HOLE_CLEARANCE_CONSTRAINT, pad, other, aLayer ); clearance = constraint.GetValue().Min(); if( constraint.GetSeverity() == RPT_SEVERITY_IGNORE ) testHoles = false; } - if( testHoles && otherPad && pad->FlashLayer( layer ) && otherPad->GetDrillSize().x ) + if( testHoles && otherPad && pad->FlashLayer( aLayer ) && otherPad->GetDrillSize().x ) { if( clearance > 0 && padShape->Collide( otherPad->GetEffectiveHoleShape(), std::max( 0, clearance - m_drcEpsilon ), @@ -713,12 +713,12 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa drce->SetItems( pad, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); testHoles = false; // No need for multiple violations } } - if( testHoles && otherPad && otherPad->FlashLayer( layer ) && pad->GetDrillSize().x ) + if( testHoles && otherPad && otherPad->FlashLayer( aLayer ) && pad->GetDrillSize().x ) { if( clearance >= 0 && otherShape->Collide( pad->GetEffectiveHoleShape(), std::max( 0, clearance - m_drcEpsilon ), @@ -735,12 +735,12 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa drce->SetItems( pad, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); testHoles = false; // No need for multiple violations } } - if( testHoles && otherVia && otherVia->IsOnLayer( layer ) ) + if( testHoles && otherVia && otherVia->IsOnLayer( aLayer ) ) { pos = otherVia->GetPosition(); otherShape.reset( new SHAPE_SEGMENT( pos, pos, otherVia->GetDrill() ) ); @@ -760,7 +760,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa drce->SetItems( pad, otherVia ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); } } @@ -910,7 +910,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones() drce->SetItems( zoneA, zoneB ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, pt ); + reportViolation( drce, pt, layer ); } } @@ -926,7 +926,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones() drce->SetItems( zoneB, zoneA ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, pt ); + reportViolation( drce, pt, layer ); } } @@ -995,7 +995,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones() drce->SetItems( zoneA, zoneB ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, conflict.first ); + reportViolation( drce, conflict.first, layer ); } } } diff --git a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp index 322d6018bf..317b627652 100644 --- a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp @@ -111,7 +111,7 @@ bool DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions() std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_MALFORMED_COURTYARD ); drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg ); drcItem->SetItems( footprint ); - reportViolation( drcItem, pt ); + reportViolation( drcItem, pt, UNDEFINED_LAYER ); }; // Re-run courtyard tests to generate DRC_ITEMs @@ -128,7 +128,7 @@ bool DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions() std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_MISSING_COURTYARD ); drcItem->SetItems( footprint ); - reportViolation( drcItem, footprint->GetPosition() ); + reportViolation( drcItem, footprint->GetPosition(), UNDEFINED_LAYER ); } else { @@ -217,7 +217,7 @@ bool DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances() } drce->SetItems( fpA, fpB ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, F_CrtYd ); } } } @@ -246,7 +246,7 @@ bool DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances() } drce->SetItems( fpA, fpB ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, B_CrtYd ); } } } @@ -270,12 +270,17 @@ bool DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances() const SHAPE_POLY_SET& front = footprint->GetPolyCourtyard( F_CrtYd ); const SHAPE_POLY_SET& back = footprint->GetPolyCourtyard( B_CrtYd ); - if( ( front.OutlineCount() > 0 && front.Collide( hole, 0 ) ) - || ( back.OutlineCount() > 0 && back.Collide( hole, 0 ) ) ) + if( front.OutlineCount() > 0 && front.Collide( hole, 0 ) ) { std::shared_ptr drce = DRC_ITEM::Create( errorCode ); drce->SetItems( pad, footprint ); - reportViolation( drce, pad->GetPosition() ); + reportViolation( drce, pad->GetPosition(), F_CrtYd ); + } + else if( back.OutlineCount() > 0 && back.Collide( hole, 0 ) ) + { + std::shared_ptr drce = DRC_ITEM::Create( errorCode ); + drce->SetItems( pad, footprint ); + reportViolation( drce, pad->GetPosition(), B_CrtYd ); } }; diff --git a/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp b/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp index 8c04eff4b8..4c7c8068d5 100644 --- a/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp +++ b/pcbnew/drc/drc_test_provider_diff_pair_coupling.cpp @@ -463,7 +463,8 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run() drce->SetViolatingRule( maxUncoupledConstraint->GetParentRule() ); - reportViolation( drce, ( *it.second.itemsP.begin() )->GetPosition() ); + reportViolation( drce, ( *it.second.itemsP.begin() )->GetPosition(), + ( *it.second.itemsP.begin() )->GetLayer() ); } } @@ -497,7 +498,8 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run() drcItem->SetViolatingRule( gapConstraint->GetParentRule() ); - reportViolation( drcItem, cpair.parentP->GetPosition() ); + reportViolation( drcItem, cpair.parentP->GetPosition(), + cpair.parentP->GetLayer() ); } } } diff --git a/pcbnew/drc/drc_test_provider_disallow.cpp b/pcbnew/drc/drc_test_provider_disallow.cpp index ccac12fd01..b47606a7f7 100644 --- a/pcbnew/drc/drc_test_provider_disallow.cpp +++ b/pcbnew/drc/drc_test_provider_disallow.cpp @@ -89,7 +89,7 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run() drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, item->GetPosition() ); + reportViolation( drcItem, item->GetPosition(), item->GetLayer() ); } }; @@ -103,7 +103,7 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run() { std::shared_ptr drc = DRC_ITEM::Create( DRCE_TEXT_ON_EDGECUTS ); drc->SetItems( item ); - reportViolation( drc, item->GetPosition() ); + reportViolation( drc, item->GetPosition(), Edge_Cuts ); } } diff --git a/pcbnew/drc/drc_test_provider_edge_clearance.cpp b/pcbnew/drc/drc_test_provider_edge_clearance.cpp index f61beea459..d1847b6a61 100644 --- a/pcbnew/drc/drc_test_provider_edge_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_edge_clearance.cpp @@ -106,7 +106,7 @@ bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::testAgainstEdge( BOARD_ITEM* item, SHAPE* drce->SetItems( edge->m_Uuid, item->m_Uuid ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, Edge_Cuts ); return false; // don't report violations with multiple edges; one is enough } } diff --git a/pcbnew/drc/drc_test_provider_hole_size.cpp b/pcbnew/drc/drc_test_provider_hole_size.cpp index c98008ab8b..b41b578f69 100644 --- a/pcbnew/drc/drc_test_provider_hole_size.cpp +++ b/pcbnew/drc/drc_test_provider_hole_size.cpp @@ -180,7 +180,7 @@ void DRC_TEST_PROVIDER_HOLE_SIZE::checkPad( PAD* aPad ) drcItem->SetItems( aPad ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, aPad->GetPosition() ); + reportViolation( drcItem, aPad->GetPosition(), UNDEFINED_LAYER ); } } @@ -248,7 +248,7 @@ void DRC_TEST_PROVIDER_HOLE_SIZE::checkVia( PCB_VIA* via, bool aExceedMicro, boo drcItem->SetItems( via ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, via->GetPosition() ); + reportViolation( drcItem, via->GetPosition(), UNDEFINED_LAYER ); } } diff --git a/pcbnew/drc/drc_test_provider_hole_to_hole.cpp b/pcbnew/drc/drc_test_provider_hole_to_hole.cpp index 8f94c8d973..4249168be8 100644 --- a/pcbnew/drc/drc_test_provider_hole_to_hole.cpp +++ b/pcbnew/drc/drc_test_provider_hole_to_hole.cpp @@ -288,7 +288,7 @@ bool DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole( BOARD_ITEM* aItem, SHA { std::shared_ptr drce = DRC_ITEM::Create( DRCE_DRILLED_HOLES_COLOCATED ); drce->SetItems( aItem, aOther ); - reportViolation( drce, (wxPoint) aHole->GetCenter() ); + reportViolation( drce, (wxPoint) aHole->GetCenter(), UNDEFINED_LAYER ); } } else if( reportHole2Hole ) @@ -315,7 +315,7 @@ bool DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole( BOARD_ITEM* aItem, SHA drce->SetItems( aItem, aOther ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) aHole->GetCenter() ); + reportViolation( drce, (wxPoint) aHole->GetCenter(), UNDEFINED_LAYER ); } } diff --git a/pcbnew/drc/drc_test_provider_library_parity.cpp b/pcbnew/drc/drc_test_provider_library_parity.cpp index 8bcf089dfb..d824e058d9 100644 --- a/pcbnew/drc/drc_test_provider_library_parity.cpp +++ b/pcbnew/drc/drc_test_provider_library_parity.cpp @@ -447,7 +447,7 @@ bool DRC_TEST_PROVIDER_LIBRARY_PARITY::Run() libName ); drcItem->SetErrorMessage( msg ); drcItem->SetItems( footprint ); - reportViolation( drcItem, footprint->GetCenter() ); + reportViolation( drcItem, footprint->GetCenter(), UNDEFINED_LAYER ); continue; } @@ -458,7 +458,7 @@ bool DRC_TEST_PROVIDER_LIBRARY_PARITY::Run() libName ); drcItem->SetErrorMessage( msg ); drcItem->SetItems( footprint ); - reportViolation( drcItem, footprint->GetCenter() ); + reportViolation( drcItem, footprint->GetCenter(), UNDEFINED_LAYER ); continue; } @@ -492,7 +492,7 @@ bool DRC_TEST_PROVIDER_LIBRARY_PARITY::Run() libName ); drcItem->SetErrorMessage( msg ); drcItem->SetItems( footprint ); - reportViolation( drcItem, footprint->GetCenter() ); + reportViolation( drcItem, footprint->GetCenter(), UNDEFINED_LAYER ); } else if( footprint->FootprintNeedsUpdate( libFootprint.get() ) ) { @@ -502,7 +502,7 @@ bool DRC_TEST_PROVIDER_LIBRARY_PARITY::Run() libName ); drcItem->SetErrorMessage( msg ); drcItem->SetItems( footprint ); - reportViolation( drcItem, footprint->GetCenter() ); + reportViolation( drcItem, footprint->GetCenter(), UNDEFINED_LAYER ); } } diff --git a/pcbnew/drc/drc_test_provider_matched_length.cpp b/pcbnew/drc/drc_test_provider_matched_length.cpp index 7869ee9297..71722b4864 100644 --- a/pcbnew/drc/drc_test_provider_matched_length.cpp +++ b/pcbnew/drc/drc_test_provider_matched_length.cpp @@ -136,7 +136,8 @@ void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengths( DRC_CONSTRAINT& aConstraint drcItem->SetViolatingRule( aConstraint.GetParentRule() ); - reportViolation( drcItem, (*ent.items.begin() )->GetPosition() ); + reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(), + ( *ent.items.begin() )->GetLayer() ); } } } @@ -172,7 +173,8 @@ void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkews( DRC_CONSTRAINT& aConstraint, drcItem->SetViolatingRule( aConstraint.GetParentRule() ); - reportViolation( drcItem, (*ent.items.begin() )->GetPosition() ); + reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(), + ( *ent.items.begin() )->GetLayer() ); } } } @@ -199,7 +201,8 @@ void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkViaCounts( DRC_CONSTRAINT& aConstrai drcItem->SetViolatingRule( aConstraint.GetParentRule() ); - reportViolation( drcItem, (*ent.items.begin() )->GetPosition() ); + reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(), + ( *ent.items.begin() )->GetLayer() ); } } } diff --git a/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp b/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp index cc3860f868..b2e9fea504 100644 --- a/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp @@ -76,7 +76,7 @@ private: void testItemAgainstZones( BOARD_ITEM* aItem, PCB_LAYER_ID aLayer ); - void testShapeLineChain( const SHAPE_LINE_CHAIN& aOutline, int aLineWidth, + void testShapeLineChain( const SHAPE_LINE_CHAIN& aOutline, int aLineWidth, PCB_LAYER_ID aLayer, BOARD_ITEM* aParentItem, DRC_CONSTRAINT& aConstraint ); void testZoneLayer( ZONE* aZone, PCB_LAYER_ID aLayer, DRC_CONSTRAINT& aConstraint ); @@ -297,7 +297,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::Run() { case SHAPE_T::POLY: testShapeLineChain( shape->GetPolyShape().Outline( 0 ), - shape->GetWidth(), item, c ); + shape->GetWidth(), layer, item, c ); break; case SHAPE_T::BEZIER: @@ -309,7 +309,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::Run() for( const wxPoint& pt : shape->GetBezierPoints() ) asPoly.Append( pt ); - testShapeLineChain( asPoly, shape->GetWidth(), item, c ); + testShapeLineChain( asPoly, shape->GetWidth(), layer, item, c ); break; } @@ -333,7 +333,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::Run() asPoly.Append( pt ); } - testShapeLineChain( asPoly, shape->GetWidth(), item, c ); + testShapeLineChain( asPoly, shape->GetWidth(), layer, item, c ); break; } @@ -359,7 +359,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::Run() void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testShapeLineChain( const SHAPE_LINE_CHAIN& aOutline, - int aLineWidth, + int aLineWidth, PCB_LAYER_ID aLayer, BOARD_ITEM* aParentItem, DRC_CONSTRAINT& aConstraint ) { @@ -495,7 +495,7 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testShapeLineChain( const SHAPE_LIN drce->SetItems( aParentItem ); drce->SetViolatingRule( aConstraint.GetParentRule() ); - reportViolation( drce, (wxPoint) collision.first ); + reportViolation( drce, (wxPoint) collision.first, aLayer ); } } @@ -542,7 +542,7 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testZoneLayer( ZONE* aZone, PCB_LAY drce->SetItems( aZone ); drce->SetViolatingRule( aConstraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); } } } @@ -551,7 +551,7 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testZoneLayer( ZONE* aZone, PCB_LAY for( int holeIdx = 0; holeIdx < fill.HoleCount( outlineIdx ); ++holeIdx ) { - testShapeLineChain( fill.Hole( outlineIdx, holeIdx ), 0, aZone, aConstraint ); + testShapeLineChain( fill.Hole( outlineIdx, holeIdx ), 0, aLayer, aZone, aConstraint ); } } } @@ -592,7 +592,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstItem( BOARD_ITEM* it drce->SetItems( item, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, layer ); } } @@ -656,7 +656,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstItem( BOARD_ITEM* it drce->SetItems( item, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, layer ); } if( otherHoleShape && otherHoleShape->Collide( itemShape, clearance, &actual, &pos ) ) @@ -672,7 +672,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstItem( BOARD_ITEM* it drce->SetItems( item, other ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, layer ); } } } @@ -761,7 +761,7 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstZones( BOARD_ITEM* a drce->SetItems( aItem, zone ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); } } @@ -807,7 +807,7 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstZones( BOARD_ITEM* a drce->SetItems( aItem, zone ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aLayer ); } } } diff --git a/pcbnew/drc/drc_test_provider_misc.cpp b/pcbnew/drc/drc_test_provider_misc.cpp index 7c5c71d1bc..c618b8c73a 100644 --- a/pcbnew/drc/drc_test_provider_misc.cpp +++ b/pcbnew/drc/drc_test_provider_misc.cpp @@ -90,7 +90,7 @@ void DRC_TEST_PROVIDER_MISC::testOutline() drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg ); drcItem->SetItems( itemA, itemB ); - reportViolation( drcItem, pt ); + reportViolation( drcItem, pt, Edge_Cuts ); errorHandled = true; }; @@ -114,7 +114,7 @@ void DRC_TEST_PROVIDER_MISC::testOutline() drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( m_board ); - reportViolation( drcItem, m_board->GetBoundingBox().Centre() ); + reportViolation( drcItem, m_board->GetBoundingBox().Centre(), Edge_Cuts ); } } } @@ -201,7 +201,7 @@ void DRC_TEST_PROVIDER_MISC::testDisabledLayers() drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg ); drcItem->SetItems( item ); - reportViolation( drcItem, item->GetPosition() ); + reportViolation( drcItem, item->GetPosition(), UNDEFINED_LAYER ); } return true; @@ -244,7 +244,7 @@ void DRC_TEST_PROVIDER_MISC::testAssertions() + c->GetName() + wxS( ")" ) ); drcItem->SetItems( item ); - reportViolation( drcItem, item->GetPosition() ); + reportViolation( drcItem, item->GetPosition(), item->GetLayer() ); } ); return true; @@ -279,14 +279,15 @@ void DRC_TEST_PROVIDER_MISC::testTextVars() if( !reportProgress( ii++, items, delta ) ) return false; - EDA_TEXT* text = dynamic_cast( item ); + BOARD_ITEM* boardItem = dynamic_cast( item ); + EDA_TEXT* text = dynamic_cast( boardItem ); if( text && text->GetShownText().Matches( wxT( "*${*}*" ) ) ) { std::shared_ptrdrcItem = DRC_ITEM::Create( DRCE_UNRESOLVED_VARIABLE ); drcItem->SetItems( item ); - reportViolation( drcItem, item->GetPosition() ); + reportViolation( drcItem, boardItem->GetPosition(), boardItem->GetLayer() ); } return true; }; @@ -321,7 +322,7 @@ void DRC_TEST_PROVIDER_MISC::testTextVars() std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_UNRESOLVED_VARIABLE ); drcItem->SetItems( text ); - reportViolation( drcItem, text->GetPosition() ); + reportViolation( drcItem, text->GetPosition(), UNDEFINED_LAYER ); } } } diff --git a/pcbnew/drc/drc_test_provider_schematic_parity.cpp b/pcbnew/drc/drc_test_provider_schematic_parity.cpp index fa21057422..42ad22b694 100644 --- a/pcbnew/drc/drc_test_provider_schematic_parity.cpp +++ b/pcbnew/drc/drc_test_provider_schematic_parity.cpp @@ -97,7 +97,7 @@ void DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist( NETLIST& aNetlist ) std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_DUPLICATE_FOOTPRINT ); drcItem->SetItems( footprint, *ins.first ); - reportViolation( drcItem, footprint->GetPosition() ); + reportViolation( drcItem, footprint->GetPosition(), UNDEFINED_LAYER ); } } @@ -119,7 +119,7 @@ void DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist( NETLIST& aNetlist ) std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_MISSING_FOOTPRINT ); drcItem->SetErrorMessage( m_msg ); - reportViolation( drcItem, wxPoint() ); + reportViolation( drcItem, wxPoint(), UNDEFINED_LAYER ); } else { @@ -141,7 +141,7 @@ void DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist( NETLIST& aNetlist ) std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_NET_CONFLICT ); drcItem->SetErrorMessage( m_msg ); drcItem->SetItems( pad ); - reportViolation( drcItem, footprint->GetPosition() ); + reportViolation( drcItem, footprint->GetPosition(), UNDEFINED_LAYER ); } else if( pcb_netname.IsEmpty() && !sch_net.GetNetName().IsEmpty() ) { @@ -151,7 +151,7 @@ void DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist( NETLIST& aNetlist ) std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_NET_CONFLICT ); drcItem->SetErrorMessage( m_msg ); drcItem->SetItems( pad ); - reportViolation( drcItem, footprint->GetPosition() ); + reportViolation( drcItem, footprint->GetPosition(), UNDEFINED_LAYER ); } else if( pcb_netname != sch_net.GetNetName() ) { @@ -162,7 +162,7 @@ void DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist( NETLIST& aNetlist ) std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_NET_CONFLICT ); drcItem->SetErrorMessage( m_msg ); drcItem->SetItems( pad ); - reportViolation( drcItem, footprint->GetPosition() ); + reportViolation( drcItem, footprint->GetPosition(), UNDEFINED_LAYER ); } } @@ -181,7 +181,7 @@ void DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist( NETLIST& aNetlist ) std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_NET_CONFLICT ); drcItem->SetErrorMessage( m_msg ); drcItem->SetItems( footprint ); - reportViolation( drcItem, footprint->GetPosition() ); + reportViolation( drcItem, footprint->GetPosition(), UNDEFINED_LAYER ); } } } @@ -201,7 +201,7 @@ void DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist( NETLIST& aNetlist ) std::shared_ptr drcItem = DRC_ITEM::Create( DRCE_EXTRA_FOOTPRINT ); drcItem->SetItems( footprint ); - reportViolation( drcItem, footprint->GetPosition() ); + reportViolation( drcItem, footprint->GetPosition(), UNDEFINED_LAYER ); } } } diff --git a/pcbnew/drc/drc_test_provider_silk_clearance.cpp b/pcbnew/drc/drc_test_provider_silk_clearance.cpp index 8393093fa7..997a324fc3 100644 --- a/pcbnew/drc/drc_test_provider_silk_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_silk_clearance.cpp @@ -233,7 +233,7 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run() drcItem->SetItems( aRefItem->parent, aTestItem->parent ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, (wxPoint) pos ); + reportViolation( drcItem, (wxPoint) pos, aLayers.second ); *aCollisionDetected = true; } diff --git a/pcbnew/drc/drc_test_provider_sliver_checker.cpp b/pcbnew/drc/drc_test_provider_sliver_checker.cpp index 3f26fd0000..9f3b130287 100644 --- a/pcbnew/drc/drc_test_provider_sliver_checker.cpp +++ b/pcbnew/drc/drc_test_provider_sliver_checker.cpp @@ -151,7 +151,7 @@ bool DRC_TEST_PROVIDER_SLIVER_CHECKER::Run() { std::shared_ptr drce = DRC_ITEM::Create( DRCE_COPPER_SLIVER ); drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + layerDesc( layer ) ); - reportViolation( drce, (wxPoint) pt ); + reportViolation( drce, (wxPoint) pt, layer ); } } } diff --git a/pcbnew/drc/drc_test_provider_solder_mask.cpp b/pcbnew/drc/drc_test_provider_solder_mask.cpp index 5403004f71..85257c12b8 100644 --- a/pcbnew/drc/drc_test_provider_solder_mask.cpp +++ b/pcbnew/drc/drc_test_provider_solder_mask.cpp @@ -278,7 +278,7 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testSilkToMaskClearance() drce->SetItems( item ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, layer ); } } @@ -388,7 +388,7 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testItemAgainstItems( BOARD_ITEM* aItem, drce->SetItems( aItem, other ); drce->SetViolatingRule( &m_bridgeRule ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aTargetLayer ); } return true; @@ -453,7 +453,7 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testMaskItemAgainstZones( BOARD_ITEM* aItem, drce->SetItems( aItem, zone ); drce->SetViolatingRule( &m_bridgeRule ); - reportViolation( drce, (wxPoint) pos ); + reportViolation( drce, (wxPoint) pos, aTargetLayer ); } } } diff --git a/pcbnew/drc/drc_test_provider_text_dims.cpp b/pcbnew/drc/drc_test_provider_text_dims.cpp index a8cbb0370e..f059e5d270 100644 --- a/pcbnew/drc/drc_test_provider_text_dims.cpp +++ b/pcbnew/drc/drc_test_provider_text_dims.cpp @@ -156,7 +156,7 @@ bool DRC_TEST_PROVIDER_TEXT_DIMS::Run() drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, item->GetPosition() ); + reportViolation( drcItem, item->GetPosition(), item->GetLayer() ); } } @@ -207,7 +207,7 @@ bool DRC_TEST_PROVIDER_TEXT_DIMS::Run() drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, item->GetPosition() ); + reportViolation( drcItem, item->GetPosition(), item->GetLayer() ); } } diff --git a/pcbnew/drc/drc_test_provider_track_width.cpp b/pcbnew/drc/drc_test_provider_track_width.cpp index 7018e0334b..4683bdb333 100644 --- a/pcbnew/drc/drc_test_provider_track_width.cpp +++ b/pcbnew/drc/drc_test_provider_track_width.cpp @@ -146,7 +146,7 @@ bool DRC_TEST_PROVIDER_TRACK_WIDTH::Run() drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, p0 ); + reportViolation( drcItem, p0, item->GetLayer() ); } return true; diff --git a/pcbnew/drc/drc_test_provider_via_diameter.cpp b/pcbnew/drc/drc_test_provider_via_diameter.cpp index a50e68b5d3..b1fc3e9c39 100644 --- a/pcbnew/drc/drc_test_provider_via_diameter.cpp +++ b/pcbnew/drc/drc_test_provider_via_diameter.cpp @@ -136,7 +136,7 @@ bool DRC_TEST_PROVIDER_VIA_DIAMETER::Run() drcItem->SetItems( item ); drcItem->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drcItem, via->GetPosition() ); + reportViolation( drcItem, via->GetPosition(), via->GetLayer() ); } return true; diff --git a/pcbnew/drc/drc_test_provider_zone_connections.cpp b/pcbnew/drc/drc_test_provider_zone_connections.cpp index 151e244d54..8658570439 100644 --- a/pcbnew/drc/drc_test_provider_zone_connections.cpp +++ b/pcbnew/drc/drc_test_provider_zone_connections.cpp @@ -170,7 +170,7 @@ bool DRC_TEST_PROVIDER_ZONE_CONNECTIONS::Run() drce->SetItems( zone, pad ); drce->SetViolatingRule( constraint.GetParentRule() ); - reportViolation( drce, pad->GetPosition() ); + reportViolation( drce, pad->GetPosition(), UNDEFINED_LAYER ); } } } diff --git a/pcbnew/python/scripting/pcbnew_scripting_helpers.cpp b/pcbnew/python/scripting/pcbnew_scripting_helpers.cpp index e640c92e41..d2eb6c080c 100644 --- a/pcbnew/python/scripting/pcbnew_scripting_helpers.cpp +++ b/pcbnew/python/scripting/pcbnew_scripting_helpers.cpp @@ -475,7 +475,7 @@ bool WriteDRCReport( BOARD* aBoard, const wxString& aFileName, EDA_UNITS aUnits, engine->SetProgressReporter( nullptr ); engine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { if( aItem->GetErrorCode() == DRCE_MISSING_FOOTPRINT || aItem->GetErrorCode() == DRCE_DUPLICATE_FOOTPRINT diff --git a/pcbnew/tools/drc_tool.cpp b/pcbnew/tools/drc_tool.cpp index 1150713757..da695f3275 100644 --- a/pcbnew/tools/drc_tool.cpp +++ b/pcbnew/tools/drc_tool.cpp @@ -172,9 +172,10 @@ void DRC_TOOL::RunTests( PROGRESS_REPORTER* aProgressReporter, bool aRefillZones m_drcEngine->SetProgressReporter( aProgressReporter ); m_drcEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { PCB_MARKER* marker = new PCB_MARKER( aItem, aPos ); + marker->SetLayer( aLayer ); commit.Add( marker ); } ); diff --git a/qa/drc_proto/drc_proto.cpp b/qa/drc_proto/drc_proto.cpp index 2e9ff08a98..c1f8a8ea72 100644 --- a/qa/drc_proto/drc_proto.cpp +++ b/qa/drc_proto/drc_proto.cpp @@ -114,7 +114,7 @@ int runDRCProto( PROJECT_CONTEXT project, std::shared_ptr a drcEngine->SetProgressReporter( new CONSOLE_PROGRESS_REPORTER ( &consoleLog ) ); drcEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { // fixme } ); diff --git a/qa/pcbnew/drc/test_custom_rule_severities.cpp b/qa/pcbnew/drc/test_custom_rule_severities.cpp index 9098fa09fb..2ca4b60c66 100644 --- a/qa/pcbnew/drc/test_custom_rule_severities.cpp +++ b/qa/pcbnew/drc/test_custom_rule_severities.cpp @@ -54,7 +54,7 @@ BOOST_FIXTURE_TEST_CASE( DRCCustomRuleSeverityTest, DRC_REGRESSION_TEST_FIXTURE BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings(); bds.m_DRCEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { PCB_MARKER temp( aItem, aPos ); diff --git a/qa/pcbnew/drc/test_drc_courtyard_invalid.cpp b/qa/pcbnew/drc/test_drc_courtyard_invalid.cpp index d13ffa0bb5..dd809b4605 100644 --- a/qa/pcbnew/drc/test_drc_courtyard_invalid.cpp +++ b/qa/pcbnew/drc/test_drc_courtyard_invalid.cpp @@ -304,7 +304,7 @@ void DoCourtyardInvalidTest( const COURTYARD_INVALID_CASE& aCase, drcEngine.InitEngine( wxFileName() ); drcEngine.SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { if( aItem->GetErrorCode() == DRCE_OVERLAPPING_FOOTPRINTS || aItem->GetErrorCode() == DRCE_MALFORMED_COURTYARD diff --git a/qa/pcbnew/drc/test_drc_courtyard_overlap.cpp b/qa/pcbnew/drc/test_drc_courtyard_overlap.cpp index 676ac6413a..d41e06cbc1 100644 --- a/qa/pcbnew/drc/test_drc_courtyard_overlap.cpp +++ b/qa/pcbnew/drc/test_drc_courtyard_overlap.cpp @@ -460,7 +460,7 @@ static void DoCourtyardOverlapTest( const COURTYARD_OVERLAP_TEST_CASE& aCase, drcEngine.InitEngine( wxFileName() ); drcEngine.SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { if( aItem->GetErrorCode() == DRCE_OVERLAPPING_FOOTPRINTS || aItem->GetErrorCode() == DRCE_MALFORMED_COURTYARD diff --git a/qa/pcbnew/drc/test_drc_regressions.cpp b/qa/pcbnew/drc/test_drc_regressions.cpp index d876cd32cf..b098e29c75 100644 --- a/qa/pcbnew/drc/test_drc_regressions.cpp +++ b/qa/pcbnew/drc/test_drc_regressions.cpp @@ -69,7 +69,7 @@ BOOST_FIXTURE_TEST_CASE( DRCFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTUR bds.m_DRCSeverities[ DRCE_UNCONNECTED_ITEMS ] = SEVERITY::RPT_SEVERITY_IGNORE; bds.m_DRCEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR ) violations.push_back( *aItem ); @@ -125,7 +125,7 @@ BOOST_FIXTURE_TEST_CASE( DRCFalseNegativeRegressions, DRC_REGRESSION_TEST_FIXTUR BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings(); bds.m_DRCEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { PCB_MARKER temp( aItem, aPos ); diff --git a/qa/pcbnew/drc/test_solder_mask_bridging.cpp b/qa/pcbnew/drc/test_solder_mask_bridging.cpp index 3ba17ad00a..645a8ce2c9 100644 --- a/qa/pcbnew/drc/test_solder_mask_bridging.cpp +++ b/qa/pcbnew/drc/test_solder_mask_bridging.cpp @@ -50,7 +50,7 @@ BOOST_FIXTURE_TEST_CASE( DRCSolderMaskBridgingTest, DRC_REGRESSION_TEST_FIXTURE BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings(); bds.m_DRCEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { PCB_MARKER temp( aItem, aPos ); diff --git a/qa/pcbnew/test_tracks_cleaner.cpp b/qa/pcbnew/test_tracks_cleaner.cpp index e1e69e7630..a885726526 100644 --- a/qa/pcbnew/test_tracks_cleaner.cpp +++ b/qa/pcbnew/test_tracks_cleaner.cpp @@ -171,7 +171,7 @@ BOOST_FIXTURE_TEST_CASE( TrackCleanerRegressionTests, TRACK_CLEANER_TEST_FIXTURE BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings(); bds.m_DRCEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { if( aItem->GetErrorCode() == DRCE_UNCONNECTED_ITEMS ) violations.push_back( *aItem ); diff --git a/qa/pcbnew/test_zone_filler.cpp b/qa/pcbnew/test_zone_filler.cpp index d293a4503b..0bc6ad3b1c 100644 --- a/qa/pcbnew/test_zone_filler.cpp +++ b/qa/pcbnew/test_zone_filler.cpp @@ -98,7 +98,7 @@ BOOST_FIXTURE_TEST_CASE( BasicZoneFills, ZONE_FILL_TEST_FIXTURE ) bds.m_DRCEngine->InitEngine( wxFileName() ); // Just to be sure to be sure bds.m_DRCEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { if( aItem->GetErrorCode() == DRCE_CLEARANCE ) { @@ -204,7 +204,7 @@ BOOST_FIXTURE_TEST_CASE( RegressionZoneFillTests, ZONE_FILL_TEST_FIXTURE ) std::vector violations; bds.m_DRCEngine->SetViolationHandler( - [&]( const std::shared_ptr& aItem, wxPoint aPos ) + [&]( const std::shared_ptr& aItem, wxPoint aPos, PCB_LAYER_ID aLayer ) { if( aItem->GetErrorCode() == DRCE_CLEARANCE ) violations.push_back( *aItem );