diff --git a/libs/kimath/src/geometry/shape_line_chain.cpp b/libs/kimath/src/geometry/shape_line_chain.cpp index c4b40202a2..e2603b46cf 100644 --- a/libs/kimath/src/geometry/shape_line_chain.cpp +++ b/libs/kimath/src/geometry/shape_line_chain.cpp @@ -143,8 +143,9 @@ void SHAPE_LINE_CHAIN::fixIndicesRotation() std::rotate( m_points.rbegin(), m_points.rbegin() + 1, m_points.rend() ); std::rotate( m_shapes.rbegin(), m_shapes.rbegin() + 1, m_shapes.rend() ); - // Sanity check - avoid infinite loops - wxCHECK( rotations++ <= m_shapes.size(), /* void */ ); + // Sanity check - avoid infinite loops (NB: wxCHECK is not thread-safe) + if( rotations++ > m_shapes.size() ) + return; } } diff --git a/pcbnew/drc/drc_engine.cpp b/pcbnew/drc/drc_engine.cpp index 32bbbbc1b0..a1a7942fb4 100644 --- a/pcbnew/drc/drc_engine.cpp +++ b/pcbnew/drc/drc_engine.cpp @@ -23,6 +23,7 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ +#include #include #include #include @@ -602,59 +603,78 @@ void DRC_ENGINE::RunTests( EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aT m_errorLimits[ ii ] = ERROR_LIMIT; } + DRC_TEST_PROVIDER::Init(); + m_board->IncrementTimeStamp(); // Invalidate all caches if( !ReportPhase( _( "Tessellating copper zones..." ) ) ) return; - // Number of zones between progress bar updates - int delta = 5; - std::vector copperZones; - - for( ZONE* zone : m_board->Zones() ) - { - zone->CacheBoundingBox(); - zone->CacheTriangulation(); - - if( ( zone->GetLayerSet() & LSET::AllCuMask() ).any() && !zone->GetIsRuleArea() ) - copperZones.push_back( zone ); - } + // Cache zone bounding boxes, triangulation, copper zone rtrees, and footprint courtyards + // before we start. + // + std::vector allZones = m_board->Zones(); for( FOOTPRINT* footprint : m_board->Footprints() ) { for( ZONE* zone : footprint->Zones() ) - { - zone->CacheBoundingBox(); - zone->CacheTriangulation(); - - if( ( zone->GetLayerSet() & LSET::AllCuMask() ).any() && !zone->GetIsRuleArea() ) - copperZones.push_back( zone ); - } + allZones.push_back( zone ); footprint->BuildPolyCourtyards(); } - int zoneCount = copperZones.size(); + size_t count = allZones.size(); + std::atomic next( 0 ); + std::atomic done( 0 ); + std::atomic threads_finished( 0 ); + size_t parallelThreadCount = std::max( std::thread::hardware_concurrency(), 2 ); - for( int ii = 0; ii < zoneCount; ++ii ) + for( size_t ii = 0; ii < parallelThreadCount; ++ii ) { - ZONE* zone = copperZones[ ii ]; + std::thread t = std::thread( + [ this, &allZones, &done, &threads_finished, &next, count ]( ) + { + for( size_t i = next.fetch_add( 1 ); i < count; i = next.fetch_add( 1 ) ) + { + ZONE* zone = allZones[ i ]; - if( ( ii % delta ) == 0 || ii == zoneCount - 1 ) - { - if( !ReportProgress( (double) ii / (double) zoneCount ) ) - return; - } + zone->CacheBoundingBox(); + zone->CacheTriangulation(); - m_board->m_CopperZoneRTrees[ zone ] = std::make_unique(); + if( !zone->GetIsRuleArea() && zone->IsOnCopperLayer() ) + { + std::unique_ptr rtree = std::make_unique(); - for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() ) - { - if( IsCopperLayer( layer ) ) - m_board->m_CopperZoneRTrees[ zone ]->Insert( zone, layer ); - } + for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() ) + { + if( IsCopperLayer( layer ) ) + rtree->Insert( zone, layer ); + } + + std::unique_lock cacheLock( m_board->m_CachesMutex ); + m_board->m_CopperZoneRTrees[ zone ] = std::move( rtree ); + } + + if( IsCancelled() ) + break; + + done.fetch_add( 1 ); + } + + threads_finished.fetch_add( 1 ); + } ); + + t.detach(); } + while( threads_finished < parallelThreadCount ) + { + ReportProgress( (double) done / (double) count ); + std::this_thread::sleep_for( std::chrono::milliseconds( 100 ) ); + } + + // Now run the tests. + // for( DRC_TEST_PROVIDER* provider : m_testProviders ) { ReportAux( wxString::Format( wxT( "Run DRC provider: '%s'" ), provider->GetName() ) ); @@ -1422,6 +1442,12 @@ bool DRC_ENGINE::ReportPhase( const wxString& aMessage ) } +bool DRC_ENGINE::IsCancelled() const +{ + return m_progressReporter && m_progressReporter->IsCancelled(); +} + + bool DRC_ENGINE::HasRulesForConstraintType( DRC_CONSTRAINT_T constraintID ) { //drc_dbg(10,"hascorrect id %d size %d\n", ruleID, m_ruleMap[ruleID]->sortedRules.size( ) ); diff --git a/pcbnew/drc/drc_engine.h b/pcbnew/drc/drc_engine.h index 1f23d65d4d..1af61c5ace 100644 --- a/pcbnew/drc/drc_engine.h +++ b/pcbnew/drc/drc_engine.h @@ -170,6 +170,7 @@ public: bool ReportProgress( double aProgress ); bool ReportPhase( const wxString& aMessage ); void ReportAux( const wxString& aStr ); + bool IsCancelled() const; bool QueryWorstConstraint( DRC_CONSTRAINT_T aRuleId, DRC_CONSTRAINT& aConstraint ); diff --git a/pcbnew/drc/drc_test_provider.cpp b/pcbnew/drc/drc_test_provider.cpp index daafc9001c..11d7f659e7 100644 --- a/pcbnew/drc/drc_test_provider.cpp +++ b/pcbnew/drc/drc_test_provider.cpp @@ -49,6 +49,24 @@ DRC_TEST_PROVIDER::DRC_TEST_PROVIDER() : } +void DRC_TEST_PROVIDER::Init() +{ + if( s_allBasicItems.size() == 0 ) + { + for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ ) + { + if( i != PCB_FOOTPRINT_T && i != PCB_GROUP_T ) + { + s_allBasicItems.push_back( (KICAD_T) i ); + + if( i != PCB_ZONE_T && i != PCB_FP_ZONE_T ) + s_allBasicItemsButZones.push_back( (KICAD_T) i ); + } + } + } +} + + const wxString DRC_TEST_PROVIDER::GetName() const { return ""; } const wxString DRC_TEST_PROVIDER::GetDescription() const { return ""; } @@ -143,20 +161,6 @@ int DRC_TEST_PROVIDER::forEachGeometryItem( const std::vector& aTypes, std::bitset typeMask; int n = 0; - if( s_allBasicItems.size() == 0 ) - { - for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ ) - { - if( i != PCB_FOOTPRINT_T && i != PCB_GROUP_T ) - { - s_allBasicItems.push_back( (KICAD_T) i ); - - if( i != PCB_ZONE_T && i != PCB_FP_ZONE_T ) - s_allBasicItemsButZones.push_back( (KICAD_T) i ); - } - } - } - if( aTypes.size() == 0 ) { for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ ) diff --git a/pcbnew/drc/drc_test_provider.h b/pcbnew/drc/drc_test_provider.h index 6cc1bc7fec..fc2899a5e6 100644 --- a/pcbnew/drc/drc_test_provider.h +++ b/pcbnew/drc/drc_test_provider.h @@ -75,6 +75,8 @@ public: DRC_TEST_PROVIDER (); virtual ~DRC_TEST_PROVIDER() = default; + static void Init(); + void SetDRCEngine( DRC_ENGINE *engine ) { m_drcEngine = engine; diff --git a/pcbnew/drc/drc_test_provider_annular_width.cpp b/pcbnew/drc/drc_test_provider_annular_width.cpp index cb03c60a8d..0bc6aab5ef 100644 --- a/pcbnew/drc/drc_test_provider_annular_width.cpp +++ b/pcbnew/drc/drc_test_provider_annular_width.cpp @@ -151,15 +151,15 @@ bool DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run() for( PCB_TRACK* item : board->Tracks() ) { if( !reportProgress( ii++, board->Tracks().size(), delta ) ) - break; + return false; // DRC cancelled if( !checkAnnularWidth( item ) ) - return false; // DRC cancelled + break; } reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_connectivity.cpp b/pcbnew/drc/drc_test_provider_connectivity.cpp index 0424f14beb..67827c0d74 100644 --- a/pcbnew/drc/drc_test_provider_connectivity.cpp +++ b/pcbnew/drc/drc_test_provider_connectivity.cpp @@ -177,7 +177,7 @@ bool DRC_TEST_PROVIDER_CONNECTIVITY::Run() reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_copper_clearance.cpp b/pcbnew/drc/drc_test_provider_copper_clearance.cpp index 03b5281f08..692f770e96 100644 --- a/pcbnew/drc/drc_test_provider_copper_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_copper_clearance.cpp @@ -251,7 +251,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run() reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } @@ -372,7 +372,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( PCB_TRACK* track, } } - return true; + return !m_drcEngine->IsCancelled(); } @@ -562,7 +562,12 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances() m_largestClearance ); for( ZONE* zone : m_copperZones ) + { testItemAgainstZone( track, zone, layer ); + + if( m_drcEngine->IsCancelled() ) + break; + } } } } @@ -660,7 +665,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa reportViolation( drce, otherPad->GetPosition(), aLayer ); } - return true; + return !m_drcEngine->IsCancelled(); } if( testClearance ) @@ -767,7 +772,7 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa } } - return true; + return !m_drcEngine->IsCancelled(); } @@ -789,9 +794,6 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( ) { for( PAD* pad : footprint->Pads() ) { - if( !reportProgress( ii++, count, delta ) ) - break; - for( PCB_LAYER_ID layer : pad->GetLayerSet().Seq() ) { std::shared_ptr padShape = pad->GetEffectiveShape( layer ); @@ -826,9 +828,20 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( ) m_largestClearance ); for( ZONE* zone : m_copperZones ) + { testItemAgainstZone( pad, zone, layer ); + + if( m_drcEngine->IsCancelled() ) + return; + } } + + if( !reportProgress( ii++, count, delta ) ) + return; } + + if( m_drcEngine->IsCancelled() ) + return; } } @@ -865,7 +878,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones() for( size_t ia = 0; ia < m_copperZones.size(); ia++ ) { if( !reportProgress( layer_id * m_copperZones.size() + ia, B_Cu * m_copperZones.size(), delta ) ) - break; + return; // DRC cancelled ZONE* zoneA = m_copperZones[ia]; @@ -1000,6 +1013,9 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones() reportViolation( drce, conflict.first, layer ); } + + if( m_drcEngine->IsCancelled() ) + return; } } } diff --git a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp index f91a9b518a..2d11208948 100644 --- a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp @@ -137,7 +137,7 @@ bool DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions() } } - return true; + return !m_drcEngine->IsCancelled(); } @@ -297,10 +297,13 @@ bool DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances() for( const PAD* padA : fpA->Pads() ) testPadAgainstCourtyards( padA, fpB ); } + + if( m_drcEngine->IsCancelled() ) + return false; } } - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_disallow.cpp b/pcbnew/drc/drc_test_provider_disallow.cpp index ab96d99d37..57739ba308 100644 --- a/pcbnew/drc/drc_test_provider_disallow.cpp +++ b/pcbnew/drc/drc_test_provider_disallow.cpp @@ -21,7 +21,10 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ +#include #include +#include +#include #include #include #include @@ -29,6 +32,7 @@ #include #include + /* "Disallow" test. Goes through all items, matching types/conditions drop errors. Errors generated: @@ -66,9 +70,117 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run() if( !reportPhase( _( "Checking keepouts & disallow constraints..." ) ) ) return false; // DRC cancelled - int count = 0; - int delta = 10; - int ii = 0; + BOARD* board = m_drcEngine->GetBoard(); + int epsilon = board->GetDesignSettings().GetDRCEpsilon(); + + // First build out the board's cache of copper-keepout to copper-zone caches. This is where + // the bulk of the time is spent, and we can do this in parallel. + // + std::vector antiCopperKeepouts; + std::vector copperZones; + std::vector> toCache; + int totalCount = 0; + + forEachGeometryItem( {}, LSET::AllLayersMask(), + [&]( BOARD_ITEM* item ) -> bool + { + ZONE* zone = dynamic_cast( item ); + + if( zone && zone->GetIsRuleArea() && zone->GetDoNotAllowCopperPour() ) + antiCopperKeepouts.push_back( zone ); + else if( zone && zone->IsOnCopperLayer() ) + copperZones.push_back( zone ); + + totalCount++; + + return true; + } ); + + for( ZONE* ruleArea : antiCopperKeepouts ) + { + for( ZONE* copperZone : copperZones ) + { + toCache.push_back( { ruleArea, copperZone } ); + totalCount++; + } + } + + std::atomic next( 0 ); + std::atomic done( 0 ); + std::atomic threads_finished( 0 ); + size_t parallelThreadCount = std::max( std::thread::hardware_concurrency(), 2 ); + + for( size_t ii = 0; ii < parallelThreadCount; ++ii ) + { + std::thread t = std::thread( + [&]() + { + for( size_t i = next.fetch_add( 1 ); i < toCache.size(); i = next.fetch_add( 1 ) ) + { + ZONE* ruleArea = toCache[i].first; + ZONE* copperZone = toCache[i].second; + EDA_RECT areaBBox = ruleArea->GetCachedBoundingBox(); + EDA_RECT copperBBox = copperZone->GetCachedBoundingBox(); + bool isInside = false; + + if( copperZone->IsFilled() && areaBBox.Intersects( copperBBox ) ) + { + // Collisions include touching, so we need to deflate outline by + // enough to exclude it. This is particularly important for detecting + // copper fills as they will be exactly touching along the entire + // exclusion border. + SHAPE_POLY_SET areaPoly = *ruleArea->Outline(); + areaPoly.Deflate( epsilon, 0, SHAPE_POLY_SET::ALLOW_ACUTE_CORNERS ); + + DRC_RTREE* zoneRTree = board->m_CopperZoneRTrees[ copperZone ].get(); + + if( zoneRTree ) + { + for( PCB_LAYER_ID layer : ruleArea->GetLayerSet().Seq() ) + { + if( zoneRTree->QueryColliding( areaBBox, &areaPoly, layer ) ) + { + isInside = true; + break; + } + + if( m_drcEngine->IsCancelled() ) + break; + } + } + } + + if( m_drcEngine->IsCancelled() ) + break; + + std::pair key( ruleArea, copperZone ); + { + std::unique_lock cacheLock( board->m_CachesMutex ); + board->m_InsideAreaCache[ key ] = isInside; + } + done.fetch_add( 1 ); + } + + threads_finished.fetch_add( 1 ); + } ); + + t.detach(); + } + + while( threads_finished < parallelThreadCount ) + { + m_drcEngine->ReportProgress( (double) done / (double) totalCount ); + std::this_thread::sleep_for( std::chrono::milliseconds( 100 ) ); + } + + if( m_drcEngine->IsCancelled() ) + return false; + + // Now go through all the board objects calling the DRC_ENGINE to run the actual dissallow + // tests. These should be reasonably quick using the caches generated above. + // + int delta = 100; + int ii = done; auto checkTextOnEdgeCuts = [&]( BOARD_ITEM* item ) @@ -106,27 +218,6 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run() } }; - forEachGeometryItem( {}, LSET::AllLayersMask(), - [&]( BOARD_ITEM* item ) -> bool - { - ZONE* zone = dynamic_cast( item ); - - if( zone && zone->GetIsRuleArea() ) - return true; - - // Report progress on zone copper layers only. Everything else is in the noise. - if( zone ) - { - for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() ) - { - if( IsCopperLayer( layer ) ) - count++; - } - } - - return true; - } ); - forEachGeometryItem( {}, LSET::AllLayersMask(), [&]( BOARD_ITEM* item ) -> bool { @@ -141,20 +232,6 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run() if( zone && zone->GetIsRuleArea() ) return true; - // Report progress on zone copper layers only. Everything else is in the - // noise. - if( zone ) - { - for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() ) - { - if( IsCopperLayer( layer ) ) - { - if( !reportProgress( ii++, count, delta ) ) - return false; // DRC cancelled - } - } - } - item->ClearFlags( HOLE_PROXY ); // Just in case checkDisallow( item ); @@ -178,12 +255,15 @@ bool DRC_TEST_PROVIDER_DISALLOW::Run() } } + if( !reportProgress( ii++, totalCount, delta ) ) + return false; + return true; } ); reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_hole_to_hole.cpp b/pcbnew/drc/drc_test_provider_hole_to_hole.cpp index dba31f38d2..d158b697d1 100644 --- a/pcbnew/drc/drc_test_provider_hole_to_hole.cpp +++ b/pcbnew/drc/drc_test_provider_hole_to_hole.cpp @@ -256,11 +256,14 @@ bool DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run() m_largestClearance ); } } + + if( m_drcEngine->IsCancelled() ) + return false; } reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } @@ -315,7 +318,7 @@ bool DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole( BOARD_ITEM* aItem, SHA } } - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp b/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp index 89b679f8fe..a73b73abef 100644 --- a/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_mechanical_clearance.cpp @@ -352,18 +352,19 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::Run() } if( zone ) - { testZoneLayer( static_cast( item ), layer, c ); - } } + + if( m_drcEngine->IsCancelled() ) + return false; } - return true; + return !m_drcEngine->IsCancelled(); } ); reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } @@ -555,6 +556,9 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testZoneLayer( ZONE* aZone, PCB_LAY reportViolation( drce, pos, aLayer ); } } + + if( m_drcEngine->IsCancelled() ) + return; } // Step two: interior hole clearance violations @@ -562,6 +566,9 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testZoneLayer( ZONE* aZone, PCB_LAY for( int holeIdx = 0; holeIdx < fill.HoleCount( outlineIdx ); ++holeIdx ) { testShapeLineChain( fill.Hole( outlineIdx, holeIdx ), 0, aLayer, aZone, aConstraint ); + + if( m_drcEngine->IsCancelled() ) + return; } } } @@ -687,7 +694,7 @@ bool DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstItem( BOARD_ITEM* it } } - return true; + return !m_drcEngine->IsCancelled(); } @@ -822,6 +829,9 @@ void DRC_TEST_PROVIDER_MECHANICAL_CLEARANCE::testItemAgainstZones( BOARD_ITEM* a } } } + + if( m_drcEngine->IsCancelled() ) + return; } } diff --git a/pcbnew/drc/drc_test_provider_misc.cpp b/pcbnew/drc/drc_test_provider_misc.cpp index 17814f974d..3e82e33e5d 100644 --- a/pcbnew/drc/drc_test_provider_misc.cpp +++ b/pcbnew/drc/drc_test_provider_misc.cpp @@ -317,6 +317,9 @@ void DRC_TEST_PROVIDER_MISC::testTextVars() if( m_drcEngine->IsErrorLimitExceeded( DRCE_UNRESOLVED_VARIABLE ) ) break; + if( m_drcEngine->IsCancelled() ) + return; + DS_DRAW_ITEM_TEXT* text = dynamic_cast( item ); if( text && text->GetShownText().Matches( wxT( "*${*}*" ) ) ) @@ -366,7 +369,7 @@ bool DRC_TEST_PROVIDER_MISC::Run() testAssertions(); } - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_silk_clearance.cpp b/pcbnew/drc/drc_test_provider_silk_clearance.cpp index ef18e61749..fba6f4e08d 100644 --- a/pcbnew/drc/drc_test_provider_silk_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_silk_clearance.cpp @@ -248,7 +248,7 @@ bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run() reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_sliver_checker.cpp b/pcbnew/drc/drc_test_provider_sliver_checker.cpp index 1a9a621c28..9139950263 100644 --- a/pcbnew/drc/drc_test_provider_sliver_checker.cpp +++ b/pcbnew/drc/drc_test_provider_sliver_checker.cpp @@ -1,7 +1,7 @@ /* * This program source code file is part of KiCad, a free EDA CAD application. * - * Copyright (C) 2021 KiCad Developers. + * Copyright (C) 2021-2022 KiCad Developers. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -21,6 +21,7 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ +#include #include #include #include @@ -84,14 +85,14 @@ bool DRC_TEST_PROVIDER_SLIVER_CHECKER::Run() int widthTolerance = Millimeter2iu( ADVANCED_CFG::GetCfg().m_SliverWidthTolerance ); double angleTolerance = ADVANCED_CFG::GetCfg().m_SliverAngleTolerance; int testLength = widthTolerance / ( 2 * sin( DEG2RAD( angleTolerance / 2 ) ) ); - LSET copperLayers = m_drcEngine->GetBoard()->GetEnabledLayers() & LSET::AllCuMask(); + LSET copperLayerSet = m_drcEngine->GetBoard()->GetEnabledLayers() & LSET::AllCuMask(); + LSEQ copperLayers = copperLayerSet.Seq(); + int layerCount = copperLayers.size(); // Report progress on board zones only. Everything else is in the noise. int zoneLayerCount = 0; - int delta = 5; - int ii = 0; - for( PCB_LAYER_ID layer : copperLayers.Seq() ) + for( PCB_LAYER_ID layer : copperLayers ) { for( ZONE* zone : m_drcEngine->GetBoard()->Zones() ) { @@ -100,42 +101,84 @@ bool DRC_TEST_PROVIDER_SLIVER_CHECKER::Run() } } - for( PCB_LAYER_ID layer : copperLayers.Seq() ) + std::vector layerPolys; + layerPolys.resize( layerCount ); + + std::atomic next( 0 ); + std::atomic done( 0 ); + std::atomic threads_finished( 0 ); + size_t parallelThreadCount = std::max( std::thread::hardware_concurrency(), 2 ); + + for( size_t ii = 0; ii < parallelThreadCount; ++ii ) { - if( m_drcEngine->IsErrorLimitExceeded( DRCE_COPPER_SLIVER ) ) - continue; - - SHAPE_POLY_SET poly; - - forEachGeometryItem( s_allBasicItems, LSET().set( layer ), - [&]( BOARD_ITEM* item ) -> bool + std::thread t = std::thread( + [&]( ) { - if( item->Type() == PCB_ZONE_T || item->Type() == PCB_FP_ZONE_T ) + for( int i = next.fetch_add( 1 ); i < layerCount; i = next.fetch_add( 1 ) ) { - ZONE* zone = static_cast( item ); + PCB_LAYER_ID layer = copperLayers[i]; + SHAPE_POLY_SET& poly = layerPolys[i]; - poly.BooleanAdd( *zone->GetFilledPolysList( layer ), - SHAPE_POLY_SET::PM_FAST ); - } - else - { - item->TransformShapeWithClearanceToPolygon( poly, layer, 0, ARC_LOW_DEF, - ERROR_OUTSIDE ); + forEachGeometryItem( s_allBasicItems, LSET().set( layer ), + [&]( BOARD_ITEM* item ) -> bool + { + if( dynamic_cast( item) ) + { + ZONE* zone = static_cast( item ); + + if( !zone->GetIsRuleArea() ) + { + SHAPE_POLY_SET layerPoly = *zone->GetFill( layer ); + layerPoly.Unfracture( SHAPE_POLY_SET::PM_FAST ); + poly.BooleanAdd( layerPoly, SHAPE_POLY_SET::PM_FAST ); + + // Report progress on board zones only. Everything + // else is in the noise. + done.fetch_add( 1 ); + } + } + else + { + item->TransformShapeWithClearanceToPolygon( poly, layer, 0, + ARC_LOW_DEF, + ERROR_OUTSIDE ); + } + + if( m_drcEngine->IsCancelled() ) + return false; + + return true; + } ); + + poly.Simplify( SHAPE_POLY_SET::PM_FAST ); + + // Sharpen corners + poly.Deflate( widthTolerance / 2, ARC_LOW_DEF, + SHAPE_POLY_SET::ALLOW_ACUTE_CORNERS ); + + if( m_drcEngine->IsCancelled() ) + break; } - if( item->Type() == PCB_ZONE_T ) - { - if( !reportProgress( ii++, zoneLayerCount, delta ) ) - return false; // DRC cancelled - } - - return true; + threads_finished.fetch_add( 1 ); } ); - poly.Simplify( SHAPE_POLY_SET::PM_FAST ); + t.detach(); + } - // Sharpen corners - poly.Deflate( widthTolerance / 2, ARC_LOW_DEF, SHAPE_POLY_SET::CHAMFER_ACUTE_CORNERS ); + while( threads_finished < parallelThreadCount ) + { + m_drcEngine->ReportProgress( (double) done / (double) zoneLayerCount ); + std::this_thread::sleep_for( std::chrono::milliseconds( 100 ) ); + } + + for( int ii = 0; ii < layerCount; ++ii ) + { + PCB_LAYER_ID layer = copperLayers[ii]; + SHAPE_POLY_SET& poly = layerPolys[ii]; + + if( m_drcEngine->IsErrorLimitExceeded( DRCE_COPPER_SLIVER ) ) + continue; // Frequently, in filled areas, some points of the polygons are very near (dist is only // a few internal units, like 2 or 3 units. @@ -152,29 +195,25 @@ bool DRC_TEST_PROVIDER_SLIVER_CHECKER::Run() for( int kk = 0; kk < ptCount; ++kk ) { VECTOR2I pt = pts[ kk ]; - VECTOR2I ptBefore = pts[ ( ptCount + kk - 1 ) % ptCount ]; - VECTOR2I vBefore = ( ptBefore - pt ); + VECTOR2I ptPrior = pts[ ( ptCount + kk - 1 ) % ptCount ]; + VECTOR2I vPrior = ( ptPrior - pt ); - if( std::abs( vBefore.x ) < min_len - && std::abs( vBefore.y ) < min_len - && ptCount > 5) + if( std::abs( vPrior.x ) < min_len && std::abs( vPrior.y ) < min_len && ptCount > 5) { - ptBefore = pts[ ( ptCount + kk - 2 ) % ptCount ]; - vBefore = ( ptBefore - pt ); + ptPrior = pts[ ( ptCount + kk - 2 ) % ptCount ]; + vPrior = ( ptPrior - pt ); } VECTOR2I ptAfter = pts[ ( kk + 1 ) % ptCount ]; VECTOR2I vAfter = ( ptAfter - pt ); - if( std::abs( vAfter.x ) < min_len - && std::abs( vAfter.y ) < min_len - && ptCount > 5 ) + if( std::abs( vAfter.x ) < min_len && std::abs( vAfter.y ) < min_len && ptCount > 5 ) { ptAfter = pts[ ( kk + 2 ) % ptCount ]; vAfter = ( ptAfter - pt ); } - VECTOR2I vIncluded = vBefore.Resize( testLength ) - vAfter.Resize( testLength ); + VECTOR2I vIncluded = vPrior.Resize( testLength ) - vAfter.Resize( testLength ); if( vIncluded.SquaredEuclideanNorm() < SEG::Square( widthTolerance ) ) { diff --git a/pcbnew/drc/drc_test_provider_solder_mask.cpp b/pcbnew/drc/drc_test_provider_solder_mask.cpp index 5d5a4820a1..b8f0f8f5bb 100644 --- a/pcbnew/drc/drc_test_provider_solder_mask.cpp +++ b/pcbnew/drc/drc_test_provider_solder_mask.cpp @@ -458,7 +458,7 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testItemAgainstItems( BOARD_ITEM* aItem, reportViolation( drce, pos, aTargetLayer ); } - return true; + return !m_drcEngine->IsCancelled(); }, m_largestClearance ); } @@ -547,6 +547,9 @@ void DRC_TEST_PROVIDER_SOLDER_MASK::testMaskItemAgainstZones( BOARD_ITEM* aItem, reportViolation( drce, pos, aTargetLayer ); } } + + if( m_drcEngine->IsCancelled() ) + return; } } @@ -658,7 +661,7 @@ bool DRC_TEST_PROVIDER_SOLDER_MASK::Run() reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_text_dims.cpp b/pcbnew/drc/drc_test_provider_text_dims.cpp index b299bfa4a1..96002164fd 100644 --- a/pcbnew/drc/drc_test_provider_text_dims.cpp +++ b/pcbnew/drc/drc_test_provider_text_dims.cpp @@ -304,7 +304,7 @@ bool DRC_TEST_PROVIDER_TEXT_DIMS::Run() reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_track_width.cpp b/pcbnew/drc/drc_test_provider_track_width.cpp index 9629015e73..c56f3a81c7 100644 --- a/pcbnew/drc/drc_test_provider_track_width.cpp +++ b/pcbnew/drc/drc_test_provider_track_width.cpp @@ -165,7 +165,7 @@ bool DRC_TEST_PROVIDER_TRACK_WIDTH::Run() reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_via_diameter.cpp b/pcbnew/drc/drc_test_provider_via_diameter.cpp index b1fc3e9c39..606951be9b 100644 --- a/pcbnew/drc/drc_test_provider_via_diameter.cpp +++ b/pcbnew/drc/drc_test_provider_via_diameter.cpp @@ -155,7 +155,7 @@ bool DRC_TEST_PROVIDER_VIA_DIAMETER::Run() reportRuleStatistics(); - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/drc/drc_test_provider_zone_connections.cpp b/pcbnew/drc/drc_test_provider_zone_connections.cpp index aebb43660a..fd60ed075e 100644 --- a/pcbnew/drc/drc_test_provider_zone_connections.cpp +++ b/pcbnew/drc/drc_test_provider_zone_connections.cpp @@ -106,6 +106,9 @@ bool DRC_TEST_PROVIDER_ZONE_CONNECTIONS::Run() if( m_drcEngine->IsErrorLimitExceeded( DRCE_STARVED_THERMAL ) ) return true; + if( m_drcEngine->IsCancelled() ) + return false; + // Quick tests for "connected": // if( !pad->FlashLayer( layer ) ) @@ -189,7 +192,7 @@ bool DRC_TEST_PROVIDER_ZONE_CONNECTIONS::Run() } } - return true; + return !m_drcEngine->IsCancelled(); } diff --git a/pcbnew/pcb_expr_evaluator.cpp b/pcbnew/pcb_expr_evaluator.cpp index 1c5c6ce714..95545a63f3 100644 --- a/pcbnew/pcb_expr_evaluator.cpp +++ b/pcbnew/pcb_expr_evaluator.cpp @@ -542,8 +542,6 @@ bool calcIsInsideArea( BOARD_ITEM* aItem, const EDA_RECT& aItemBBox, PCB_EXPR_CO DRC_RTREE* zoneRTree = board->m_CopperZoneRTrees[ zone ].get(); - std::vector shapes; - if( zoneRTree ) { for( PCB_LAYER_ID layer : aArea->GetLayerSet().Seq() )