diff --git a/pcbnew/ratsnest_data.cpp b/pcbnew/ratsnest_data.cpp
index af5f6932fd..7bb7fad2a5 100644
--- a/pcbnew/ratsnest_data.cpp
+++ b/pcbnew/ratsnest_data.cpp
@@ -801,26 +801,40 @@ void RN_DATA::ProcessBoard()
 {
     m_nets.clear();
     m_nets.resize( m_board->GetNetCount() );
+    int netCode;
 
     // Iterate over all items that may need to be connected
     for( MODULE* module = m_board->m_Modules; module; module = module->Next() )
     {
         for( D_PAD* pad = module->Pads().GetFirst(); pad; pad = pad->Next() )
-            m_nets[pad->GetNet()].AddItem( pad );
+        {
+            netCode = pad->GetNet();
+
+            if( netCode > 0 )
+                m_nets[netCode].AddItem( pad );
+        }
     }
 
     for( TRACK* track = m_board->m_Track; track; track = track->Next() )
     {
-        if( track->Type() == PCB_VIA_T )
-            m_nets[track->GetNet()].AddItem( static_cast<SEGVIA*>( track ) );
-        else if( track->Type() == PCB_TRACE_T )
-            m_nets[track->GetNet()].AddItem( track );
+        netCode = track->GetNet();
+
+        if( netCode > 0 )
+        {
+            if( track->Type() == PCB_VIA_T )
+                m_nets[netCode].AddItem( static_cast<SEGVIA*>( track ) );
+            else if( track->Type() == PCB_TRACE_T )
+                m_nets[netCode].AddItem( track );
+        }
     }
 
     for( int i = 0; i < m_board->GetAreaCount(); ++i )
     {
         ZONE_CONTAINER* zone = m_board->GetArea( i );
-        m_nets[zone->GetNet()].AddItem( zone );
+        netCode = zone->GetNet();
+
+        if( netCode > 0 )
+            m_nets[netCode].AddItem( zone );
     }
 }