From bb3995605714b1071e27d5c0b65662939c292d6f Mon Sep 17 00:00:00 2001 From: jean-pierre charras Date: Wed, 18 Sep 2013 21:21:11 +0200 Subject: [PATCH] Fix minor bugs in cleanup dialog options and plot solder mask function (thanks to Lorenzo to locate these bugs) --- pcbnew/class_board.cpp | 6 ++++- pcbnew/class_board.h | 6 +++-- pcbnew/clean.cpp | 27 ++++++++++++------- .../dialogs/dialog_cleaning_options_base.fbp | 12 ++++----- pcbnew/dialogs/dialog_cleaning_options_base.h | 3 --- pcbnew/editrack.cpp | 5 +++- pcbnew/plot_board_layers.cpp | 6 ++--- 7 files changed, 40 insertions(+), 25 deletions(-) diff --git a/pcbnew/class_board.cpp b/pcbnew/class_board.cpp index d7e8dcb6cd..97d8b0b622 100644 --- a/pcbnew/class_board.cpp +++ b/pcbnew/class_board.cpp @@ -1500,7 +1500,8 @@ void BOARD::RedrawFilledAreas( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDr ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos, LAYER_NUM aStartLayer, - LAYER_NUM aEndLayer ) + LAYER_NUM aEndLayer, + int aNetCode ) { if( aEndLayer < 0 ) aEndLayer = aStartLayer; @@ -1520,6 +1521,9 @@ ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos, if( area->GetState( BUSY ) ) continue; + if( aNetCode >= 0 && area->GetNet() != aNetCode ) + continue; + if( area->HitTestFilledArea( aRefPos ) ) return area; } diff --git a/pcbnew/class_board.h b/pcbnew/class_board.h index 5ba5c2174d..b234a1cd3d 100644 --- a/pcbnew/class_board.h +++ b/pcbnew/class_board.h @@ -1079,12 +1079,14 @@ public: * Note: if a zone has its flag BUSY (in .m_State) is set, it is ignored. * @param aRefPos A wxPoint to test * @param aStartLayer the first layer to test - * @param aEndLayer the last layer (-1 to ignore it) to test + * @param aEndLayer the last layer to test + * @param aNetCode = the netcode used to filter zones (-1 to to test all zones) * @return ZONE_CONTAINER* return a pointer to the ZONE_CONTAINER found, else NULL */ ZONE_CONTAINER* HitTestForAnyFilledArea( const wxPoint& aRefPos, LAYER_NUM aStartLayer, - LAYER_NUM aEndLayer = UNDEFINED_LAYER ); + LAYER_NUM aEndLayer, + int aNetCode ); /** * Function RedrawAreasOutlines diff --git a/pcbnew/clean.cpp b/pcbnew/clean.cpp index dc426d0c6c..2fdd6e9975 100644 --- a/pcbnew/clean.cpp +++ b/pcbnew/clean.cpp @@ -117,9 +117,9 @@ void PCB_EDIT_FRAME::Clean_Pcb() wxBusyCursor( dummy ); TRACKS_CLEANER cleaner( GetBoard() ); - cleaner.SetdeleteUnconnectedTracksOpt( dlg.deleteUnconnectedSegm ); - cleaner.SetMergeSegmentsOpt( dlg.mergeSegments ); - cleaner.SetCleanViasOpt( dlg.cleanVias ); + cleaner.SetdeleteUnconnectedTracksOpt( dlg.m_deleteUnconnectedSegm ); + cleaner.SetMergeSegmentsOpt( dlg.m_mergeSegments ); + cleaner.SetCleanViasOpt( dlg.m_cleanVias ); if( cleaner.CleanupBoard() ) { @@ -321,13 +321,16 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks() if( track->Type() != PCB_VIA_T ) { zone = m_Brd->HitTestForAnyFilledArea( track->GetStart(), - track->GetLayer() ); + track->GetLayer(), + track->GetLayer(), + track->GetNet() ); } else { ((SEGVIA*)track)->ReturnLayerPair( &top_layer, &bottom_layer ); zone = m_Brd->HitTestForAnyFilledArea( track->GetStart(), - top_layer, bottom_layer ); + top_layer, bottom_layer, + track->GetNet() ); } } @@ -354,7 +357,9 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks() { via->ReturnLayerPair( &top_layer, &bottom_layer ); zone = m_Brd->HitTestForAnyFilledArea( via->GetStart(), - bottom_layer, top_layer ); + bottom_layer, + top_layer, + via->GetNet() ); } if( (other == NULL) && (zone == NULL) ) @@ -376,13 +381,16 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks() if( track->Type() != PCB_VIA_T ) { zone = m_Brd->HitTestForAnyFilledArea( track->GetEnd(), - track->GetLayer() ); + track->GetLayer(), + track->GetLayer(), + track->GetNet() ); } else { ((SEGVIA*)track)->ReturnLayerPair( &top_layer, &bottom_layer ); zone = m_Brd->HitTestForAnyFilledArea( track->GetEnd(), - top_layer, bottom_layer ); + top_layer, bottom_layer, + track->GetNet() ); } } @@ -410,7 +418,8 @@ bool TRACKS_CLEANER::deleteUnconnectedTracks() { via->ReturnLayerPair( &top_layer, &bottom_layer ); zone = m_Brd->HitTestForAnyFilledArea( via->GetEnd(), - bottom_layer, top_layer ); + bottom_layer, top_layer, + via->GetNet() ); } if( (other == NULL) && (zone == NULL) ) diff --git a/pcbnew/dialogs/dialog_cleaning_options_base.fbp b/pcbnew/dialogs/dialog_cleaning_options_base.fbp index 049bec3cf1..c58c091a28 100644 --- a/pcbnew/dialogs/dialog_cleaning_options_base.fbp +++ b/pcbnew/dialogs/dialog_cleaning_options_base.fbp @@ -155,10 +155,10 @@ 0 remove vias on pads with a through hole - bool + wxFILTER_NUMERIC wxDefaultValidator - cleanVias + @@ -243,10 +243,10 @@ 0 merge aligned track segments, and remove null segments - bool + wxFILTER_NUMERIC wxDefaultValidator - mergeSegments + @@ -331,10 +331,10 @@ 0 delete track segment having a dangling end - bool + wxFILTER_NUMERIC wxDefaultValidator - deleteUnconnectedSegm + diff --git a/pcbnew/dialogs/dialog_cleaning_options_base.h b/pcbnew/dialogs/dialog_cleaning_options_base.h index 7ec1ebe541..deb7df99b4 100644 --- a/pcbnew/dialogs/dialog_cleaning_options_base.h +++ b/pcbnew/dialogs/dialog_cleaning_options_base.h @@ -50,9 +50,6 @@ class DIALOG_CLEANING_OPTIONS_BASE : public DIALOG_SHIM public: - bool cleanVias; - bool mergeSegments; - bool deleteUnconnectedSegm; DIALOG_CLEANING_OPTIONS_BASE( wxWindow* parent, wxWindowID id = wxID_ANY, const wxString& title = _("Cleaning Options"), const wxPoint& pos = wxDefaultPosition, const wxSize& size = wxSize( 243,146 ), long style = wxDEFAULT_DIALOG_STYLE|wxRESIZE_BORDER ); ~DIALOG_CLEANING_OPTIONS_BASE(); diff --git a/pcbnew/editrack.cpp b/pcbnew/editrack.cpp index b3ea13790d..9c39eaf228 100644 --- a/pcbnew/editrack.cpp +++ b/pcbnew/editrack.cpp @@ -147,7 +147,10 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC ) // Not a starting point, but a filled zone area can exist. This is also a // good starting point. ZONE_CONTAINER* zone; - zone = GetBoard()->HitTestForAnyFilledArea( pos, GetScreen()-> m_Active_Layer ); + zone = GetBoard()->HitTestForAnyFilledArea( pos, + GetScreen()-> m_Active_Layer, + GetScreen()-> m_Active_Layer, + -1 ); if( zone ) GetBoard()->SetHighLightNet( zone->GetNet() ); diff --git a/pcbnew/plot_board_layers.cpp b/pcbnew/plot_board_layers.cpp index eab18aa97f..8ba01ab009 100644 --- a/pcbnew/plot_board_layers.cpp +++ b/pcbnew/plot_board_layers.cpp @@ -58,7 +58,7 @@ * unless the minimum thickness is 0. */ static void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter, - long aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt, + LAYER_MSK aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt, int aMinThickness ); /* Creates the plot for silkscreen layers @@ -463,7 +463,7 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, * (shapes will be better, and calculations faster) */ void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter, - long aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt, + LAYER_MSK aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt, int aMinThickness ) { LAYER_NUM layer = ( aLayerMask & SOLDERMASK_LAYER_BACK ) ? @@ -480,7 +480,7 @@ void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter, { for( BOARD_ITEM* item = module->GraphicalItems(); item; item = item->Next() ) { - if( aLayerMask != item->GetLayer() ) + if( layer != item->GetLayer() ) continue; switch( item->Type() )