From cd93dbd324e6e8de9a727e0d61d910eedbc95e6c Mon Sep 17 00:00:00 2001 From: Jeff Young Date: Wed, 28 Oct 2020 12:24:10 +0000 Subject: [PATCH] Naming cleanup. --- .../drc_test_provider_copper_clearance.cpp | 21 ++++++++++--------- .../drc/drc_test_provider_hole_clearance.cpp | 10 ++++----- pcbnew/tools/drc_tool.cpp | 2 -- 3 files changed, 16 insertions(+), 17 deletions(-) diff --git a/pcbnew/drc/drc_test_provider_copper_clearance.cpp b/pcbnew/drc/drc_test_provider_copper_clearance.cpp index d828cb7b45..7bcf4803c4 100644 --- a/pcbnew/drc/drc_test_provider_copper_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_copper_clearance.cpp @@ -81,11 +81,12 @@ public: int GetNumPhases() const override; private: - bool testTrackAgainst( TRACK* track, SHAPE* trackShape, PCB_LAYER_ID layer, BOARD_ITEM* other ); + bool testTrackAgainstItem( TRACK* track, SHAPE* trackShape, PCB_LAYER_ID layer, + BOARD_ITEM* other ); void testTrackClearances(); - bool testPadAgainst( D_PAD* pad, SHAPE* padShape, PCB_LAYER_ID layer, BOARD_ITEM* other ); + bool testPadAgainstItem( D_PAD* pad, SHAPE* padShape, PCB_LAYER_ID layer, BOARD_ITEM* other ); void testPadClearances(); @@ -204,8 +205,9 @@ static std::shared_ptr getShape( BOARD_ITEM* aItem, PCB_LAYER_ID aLayer ) } -bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainst( TRACK* track, SHAPE* trackShape, - PCB_LAYER_ID layer, BOARD_ITEM* other ) +bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( TRACK* track, SHAPE* trackShape, + PCB_LAYER_ID layer, + BOARD_ITEM* other ) { if( m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE ) ) return false; @@ -404,7 +406,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances() }, [&]( BOARD_ITEM* other, int ) -> bool { - return testTrackAgainst( track, trackShape.get(), layer, other ); + return testTrackAgainstItem( track, trackShape.get(), layer, other ); }, m_largestClearance ); @@ -417,8 +419,9 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances() } -bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainst( D_PAD* pad, SHAPE* padShape, - PCB_LAYER_ID layer, BOARD_ITEM* other ) +bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( D_PAD* pad, SHAPE* padShape, + PCB_LAYER_ID layer, + BOARD_ITEM* other ) { bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE ); bool testShorting = !m_drcEngine->IsErrorLimitExceeded( DRCE_SHORTING_ITEMS ); @@ -561,7 +564,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( ) }, [&]( BOARD_ITEM* other, int ) -> bool { - return testPadAgainst( pad, padShape.get(), layer, other ); + return testPadAgainstItem( pad, padShape.get(), layer, other ); }, m_largestClearance ); } @@ -582,8 +585,6 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZones() if( m_board->GetBoardPolygonOutlines( buffer ) ) boardOutline = &buffer; - // Test copper areas for valid netcodes -> fixme, goes to connectivity checks - for( int layer_id = F_Cu; layer_id <= B_Cu; ++layer_id ) { PCB_LAYER_ID layer = static_cast( layer_id ); diff --git a/pcbnew/drc/drc_test_provider_hole_clearance.cpp b/pcbnew/drc/drc_test_provider_hole_clearance.cpp index e03ed57bf9..4f02b83e57 100644 --- a/pcbnew/drc/drc_test_provider_hole_clearance.cpp +++ b/pcbnew/drc/drc_test_provider_hole_clearance.cpp @@ -70,7 +70,7 @@ public: int GetNumPhases() const override; private: - bool testHoleAgainst( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, BOARD_ITEM* aOther ); + bool testHoleAgainstHole( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, BOARD_ITEM* aOther ); BOARD* m_board; DRC_RTREE m_holeTree; @@ -187,7 +187,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() }, [&]( BOARD_ITEM* other, int ) -> bool { - return testHoleAgainst( via, holeShape.get(), other ); + return testHoleAgainstHole( via, holeShape.get(), other ); }, m_largestClearance ); @@ -213,7 +213,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() }, [&]( BOARD_ITEM* other, int ) -> bool { - return testHoleAgainst( pad, holeShape.get(), other ); + return testHoleAgainstHole( pad, holeShape.get(), other ); }, m_largestClearance ); @@ -227,8 +227,8 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run() } -bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::testHoleAgainst( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, - BOARD_ITEM* aOther ) +bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::testHoleAgainstHole( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, + BOARD_ITEM* aOther ) { if( m_drcEngine->IsErrorLimitExceeded( DRCE_DRILLED_HOLES_TOO_CLOSE ) ) return false; diff --git a/pcbnew/tools/drc_tool.cpp b/pcbnew/tools/drc_tool.cpp index 91fd53a8f6..1677840a31 100644 --- a/pcbnew/tools/drc_tool.cpp +++ b/pcbnew/tools/drc_tool.cpp @@ -220,8 +220,6 @@ void DRC_TOOL::RunTests( PROGRESS_REPORTER* aProgressReporter, bool aTestTracksA } commit.Push( _( "DRC" ), false ); - aProgressReporter->AdvancePhase( _( "Formatting results..." ) ); - wxSafeYield(); m_drcRunning = false;