diff --git a/pcbnew/class_module.cpp b/pcbnew/class_module.cpp
index 3b21e3077b..fef9924f6d 100644
--- a/pcbnew/class_module.cpp
+++ b/pcbnew/class_module.cpp
@@ -919,9 +919,14 @@ void MODULE::ViewGetLayers( int aLayers[], int& aCount ) const
 
 unsigned int MODULE::ViewGetLOD( int aLayer ) const
 {
-    // Currently there is only one layer, so there is nothing to check
-//    if( aLayer == ITEM_GAL_LAYER( ANCHOR_VISIBLE ) )
+    int layer = ( m_Layer == F_Cu ) ? MOD_FR_VISIBLE :
+                ( m_Layer == B_Cu ) ? MOD_BK_VISIBLE : ANCHOR_VISIBLE;
+
+    // Currently it is only for anchor layer
+    if( m_view->IsLayerVisible( ITEM_GAL_LAYER( layer ) ) )
         return 30;
+
+    return std::numeric_limits<unsigned int>::max();
 }
 
 
diff --git a/pcbnew/pcb_draw_panel_gal.cpp b/pcbnew/pcb_draw_panel_gal.cpp
index e7f2cfac46..75ca9f01f4 100644
--- a/pcbnew/pcb_draw_panel_gal.cpp
+++ b/pcbnew/pcb_draw_panel_gal.cpp
@@ -416,6 +416,7 @@ void PCB_DRAW_PANEL_GAL::setDefaultLayerDeps()
     m_view->SetRequired( F_Mask, ITEM_GAL_LAYER( PAD_FR_VISIBLE ) );
     m_view->SetRequired( F_CrtYd, ITEM_GAL_LAYER( MOD_FR_VISIBLE ) );
     m_view->SetRequired( F_Fab, ITEM_GAL_LAYER( MOD_FR_VISIBLE ) );
+    m_view->SetRequired( F_SilkS, ITEM_GAL_LAYER( MOD_FR_VISIBLE ) );
 
     // Back modules
     m_view->SetRequired( ITEM_GAL_LAYER( PAD_BK_VISIBLE ), ITEM_GAL_LAYER( MOD_BK_VISIBLE ) );
@@ -426,6 +427,7 @@ void PCB_DRAW_PANEL_GAL::setDefaultLayerDeps()
     m_view->SetRequired( B_Mask, ITEM_GAL_LAYER( PAD_BK_VISIBLE ) );
     m_view->SetRequired( B_CrtYd, ITEM_GAL_LAYER( MOD_BK_VISIBLE ) );
     m_view->SetRequired( B_Fab, ITEM_GAL_LAYER( MOD_BK_VISIBLE ) );
+    m_view->SetRequired( B_SilkS, ITEM_GAL_LAYER( MOD_BK_VISIBLE ) );
 
     m_view->SetLayerTarget( ITEM_GAL_LAYER( GP_OVERLAY ), KIGFX::TARGET_OVERLAY );
     m_view->SetLayerDisplayOnly( ITEM_GAL_LAYER( GP_OVERLAY ) );