diff --git a/pcbnew/class_board_design_settings.cpp b/pcbnew/class_board_design_settings.cpp index 2714a85d70..49b3de0df0 100644 --- a/pcbnew/class_board_design_settings.cpp +++ b/pcbnew/class_board_design_settings.cpp @@ -63,13 +63,16 @@ BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS() : m_DrawSegmentWidth = Millimeter2iu( DEFAULT_GRAPHIC_THICKNESS ); // current graphic line width (not EDGE layer) m_EdgeSegmentWidth = Millimeter2iu( DEFAULT_PCB_EDGE_THICKNESS ); // current graphic line width (EDGE layer only) - m_PcbTextWidth = Millimeter2iu(DEFAULT_TEXT_PCB_THICKNESS ); // current Pcb (not module) Text width + m_PcbTextWidth = Millimeter2iu( DEFAULT_TEXT_PCB_THICKNESS ); // current Pcb (not module) Text width m_PcbTextSize = wxSize( Millimeter2iu( DEFAULT_TEXT_PCB_SIZE ), Millimeter2iu( DEFAULT_TEXT_PCB_SIZE ) ); // current Pcb (not module) Text size m_useCustomTrackVia = false; m_customTrackWidth = Millimeter2iu( DEFAULT_CUSTOMTRACKWIDTH ); + m_customViaSize.m_Diameter = Millimeter2iu( DEFAULT_VIASMINSIZE ); + m_customViaSize.m_Drill = Millimeter2iu( DEFAULT_VIASMINDRILL ); + m_TrackMinWidth = Millimeter2iu( DEFAULT_TRACKMINWIDTH ); // track min width m_ViasMinSize = Millimeter2iu( DEFAULT_VIASMINSIZE ); // via (not uvia) min diam m_ViasMinDrill = Millimeter2iu( DEFAULT_VIASMINDRILL ); // via (not uvia) min drill diam @@ -204,14 +207,22 @@ bool BOARD_DESIGN_SETTINGS::SetCurrentNetClass( const wxString& aNetClassName ) * are always the Netclass values */ if( m_ViasDimensionsList[0].m_Diameter != netClass->GetViaDiameter() ) + { lists_sizes_modified = true; + m_ViasDimensionsList[0].m_Diameter = netClass->GetViaDiameter(); + } - m_ViasDimensionsList[0].m_Diameter = netClass->GetViaDiameter(); + if( m_ViasDimensionsList[0].m_Drill != netClass->GetViaDrill() ) + { + lists_sizes_modified = true; + m_ViasDimensionsList[0].m_Drill = netClass->GetViaDrill(); + } if( m_TrackWidthList[0] != netClass->GetTrackWidth() ) + { lists_sizes_modified = true; - - m_TrackWidthList[0] = netClass->GetTrackWidth(); + m_TrackWidthList[0] = netClass->GetTrackWidth(); + } if( GetViaSizeIndex() >= m_ViasDimensionsList.size() ) SetViaSizeIndex( m_ViasDimensionsList.size() ); diff --git a/pcbnew/class_netclass.cpp b/pcbnew/class_netclass.cpp index 03aa0bedbf..1dfeac03a1 100644 --- a/pcbnew/class_netclass.cpp +++ b/pcbnew/class_netclass.cpp @@ -151,6 +151,7 @@ NETCLASSPTR NETCLASSES::Find( const wxString& aName ) const void BOARD::SynchronizeNetsAndNetClasses() { NETCLASSES& netClasses = m_designSettings.m_NetClasses; + NETCLASSPTR defaultNetClass = netClasses.GetDefault(); // set all NETs to the default NETCLASS, then later override some // as we go through the NETCLASSes. @@ -158,7 +159,7 @@ void BOARD::SynchronizeNetsAndNetClasses() for( NETINFO_LIST::iterator net( m_NetInfo.begin() ), netEnd( m_NetInfo.end() ); net != netEnd; ++net ) { - net->SetClass( netClasses.GetDefault() ); + net->SetClass( defaultNetClass ); } // Add netclass name and pointer to nets. If a net is in more than one netclass, @@ -196,7 +197,7 @@ void BOARD::SynchronizeNetsAndNetClasses() netclass->Clear(); } - netClasses.GetDefault()->Clear(); + defaultNetClass->Clear(); for( NETINFO_LIST::iterator net( m_NetInfo.begin() ), netEnd( m_NetInfo.end() ); net != netEnd; ++net ) @@ -211,6 +212,12 @@ void BOARD::SynchronizeNetsAndNetClasses() netclass->Add( net->GetNetname() ); } + + // Set initial values for custom track width & via size to match the default netclass settings + m_designSettings.UseCustomTrackViaSize( false ); + m_designSettings.SetCustomTrackWidth( defaultNetClass->GetTrackWidth() ); + m_designSettings.SetCustomViaSize( defaultNetClass->GetViaDiameter() ); + m_designSettings.SetCustomViaDrill( defaultNetClass->GetViaDrill() ); } diff --git a/pcbnew/dialogs/dialog_track_via_size.cpp b/pcbnew/dialogs/dialog_track_via_size.cpp index 26da63d2e3..062ecbe6d7 100644 --- a/pcbnew/dialogs/dialog_track_via_size.cpp +++ b/pcbnew/dialogs/dialog_track_via_size.cpp @@ -59,13 +59,33 @@ DIALOG_TRACK_VIA_SIZE::DIALOG_TRACK_VIA_SIZE( wxWindow* aParent, BOARD_DESIGN_SE bool DIALOG_TRACK_VIA_SIZE::check() { - // Wrong input - if( m_trackWidth.GetValue() < 0 || m_viaDiameter.GetValue() < 0 || m_viaDrill.GetValue() < 0 ) + if( m_trackWidth.GetValue() < 0 ) + { + DisplayError( GetParent(), _( "Invalid track width" ) ); + m_trackWidthText->SetFocus(); return false; + } - // Via drill should be smaller than via diameter - if( m_viaDrill.GetValue() >= m_viaDiameter.GetValue() ) + if( m_viaDiameter.GetValue() < 0 ) + { + DisplayError( GetParent(), _( "Invalid via diameter" ) ); + m_viaDiameterText->SetFocus(); return false; + } + + if( m_viaDrill.GetValue() < 0 ) + { + DisplayError( GetParent(), _( "Invalid via drill size" ) ); + m_viaDrillText->SetFocus(); + return false; + } + + if( m_viaDrill.GetValue() >= m_viaDiameter.GetValue() ) + { + DisplayError( GetParent(), _( "Via drill size has to be smaller than via diameter" ) ); + m_viaDrillText->SetFocus(); + return false; + } return true; } @@ -87,11 +107,6 @@ void DIALOG_TRACK_VIA_SIZE::onOkClick( wxCommandEvent& aEvent ) m_settings.SetCustomViaDrill( m_viaDrill.GetValue() ); EndModal( 1 ); } - else - { - DisplayError( GetParent(), _( "Settings are incorrect" ) ); - m_trackWidthText->SetFocus(); - } } diff --git a/pcbnew/router/pns_router.cpp b/pcbnew/router/pns_router.cpp index b235286d6c..a8bde81c21 100644 --- a/pcbnew/router/pns_router.cpp +++ b/pcbnew/router/pns_router.cpp @@ -64,11 +64,11 @@ static PNS_ROUTER* theRouter; -PNS_PCBNEW_CLEARANCE_FUNC::PNS_PCBNEW_CLEARANCE_FUNC( PNS_ROUTER *aRouter ) : +PNS_PCBNEW_CLEARANCE_FUNC::PNS_PCBNEW_CLEARANCE_FUNC( PNS_ROUTER* aRouter ) : m_router( aRouter ) { - BOARD *brd = m_router->GetBoard(); - PNS_NODE *world = m_router->GetWorld(); + BOARD* brd = m_router->GetBoard(); + PNS_NODE* world = m_router->GetWorld(); PNS_TOPOLOGY topo( world ); m_clearanceCache.resize( brd->GetNetCount() );