diff --git a/common/view/view_group.cpp b/common/view/view_group.cpp
index b38577d4d8..be21369929 100644
--- a/common/view/view_group.cpp
+++ b/common/view/view_group.cpp
@@ -41,7 +41,7 @@
 using namespace KIGFX;
 
 VIEW_GROUP::VIEW_GROUP( VIEW* aView ) :
-    m_layer( LAYER_GP_OVERLAY )
+    m_layer( LAYER_SELECT_OVERLAY )
 {
 }
 
diff --git a/include/layers_id_colors_and_visibility.h b/include/layers_id_colors_and_visibility.h
index e75cd410e8..801f40f2ef 100644
--- a/include/layers_id_colors_and_visibility.h
+++ b/include/layers_id_colors_and_visibility.h
@@ -193,9 +193,10 @@ enum GAL_LAYER_ID: int
     LAYER_DRC,                  ///< drc markers
     LAYER_WORKSHEET,            ///< worksheet frame
     LAYER_GP_OVERLAY,           ///< general purpose overlay
+    LAYER_SELECT_OVERLAY,       ///< currently selected items overlay
     LAYER_PCB_BACKGROUND,       ///< PCB background color
     LAYER_CURSOR,               ///< PCB cursor
-    LAYER_AUX_ITEMS,            ///< Auxillary items (guides, rule, etc)
+    LAYER_AUX_ITEMS,            ///< Auxiliary items (guides, rule, etc)
 
     /// This is the end of the layers used for visibility bitmasks in Pcbnew
     /// There can be at most 32 layers above here.
@@ -305,6 +306,7 @@ enum GERBVIEW_LAYER_ID: int
 #define MIN_VISIBILITY_MASK int( ( 1 << GAL_LAYER_INDEX( LAYER_PADS_PLATEDHOLES ) ) +\
                  ( 1 << GAL_LAYER_INDEX( LAYER_VIAS_HOLES ) ) +\
                  ( 1 << GAL_LAYER_INDEX( LAYER_DRC ) ) +\
+                 ( 1 << GAL_LAYER_INDEX( LAYER_SELECT_OVERLAY ) ) +\
                  ( 1 << GAL_LAYER_INDEX( LAYER_GP_OVERLAY ) ) )
 
 
diff --git a/pcbnew/pcb_draw_panel_gal.cpp b/pcbnew/pcb_draw_panel_gal.cpp
index a7510666f9..58af02ce22 100644
--- a/pcbnew/pcb_draw_panel_gal.cpp
+++ b/pcbnew/pcb_draw_panel_gal.cpp
@@ -49,6 +49,7 @@ const LAYER_NUM GAL_LAYER_ORDER[] =
     LAYER_GP_OVERLAY,
     LAYER_DRC,
     LAYER_PADS_NETNAMES, LAYER_VIAS_NETNAMES,
+    LAYER_SELECT_OVERLAY,
     Dwgs_User, Cmts_User, Eco1_User, Eco2_User, Edge_Cuts,
 
     LAYER_MOD_TEXT_FR,
@@ -212,8 +213,8 @@ void PCB_DRAW_PANEL_GAL::SetHighContrastLayer( PCB_LAYER_ID aLayer )
                 GetNetnameLayer( aLayer ),
                 LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES,
                 LAYER_PADS_TH, LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES,
-                LAYER_NON_PLATEDHOLES, LAYER_GP_OVERLAY, LAYER_RATSNEST,
-                LAYER_CURSOR
+                LAYER_NON_PLATEDHOLES, LAYER_SELECT_OVERLAY, LAYER_GP_OVERLAY,
+                LAYER_RATSNEST, LAYER_CURSOR
         };
 
         for( unsigned int i = 0; i < sizeof( layers ) / sizeof( LAYER_NUM ); ++i )
@@ -248,8 +249,8 @@ void PCB_DRAW_PANEL_GAL::SetTopLayer( PCB_LAYER_ID aLayer )
     const LAYER_NUM layers[] = {
             LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES,
             LAYER_PADS_TH, LAYER_PADS_PLATEDHOLES, LAYER_PADS_NETNAMES,
-            LAYER_NON_PLATEDHOLES, LAYER_GP_OVERLAY, LAYER_RATSNEST,
-            LAYER_DRC
+            LAYER_NON_PLATEDHOLES, LAYER_SELECT_OVERLAY, LAYER_GP_OVERLAY,
+            LAYER_RATSNEST, LAYER_DRC
     };
 
     for( unsigned int i = 0; i < sizeof( layers ) / sizeof( LAYER_NUM ); ++i )
@@ -312,6 +313,7 @@ void PCB_DRAW_PANEL_GAL::SyncLayersVisibility( const BOARD* aBoard )
     m_view->SetLayerVisible( LAYER_PADS_PLATEDHOLES, true );
     m_view->SetLayerVisible( LAYER_VIAS_HOLES, true );
     m_view->SetLayerVisible( LAYER_GP_OVERLAY, true );
+    m_view->SetLayerVisible( LAYER_SELECT_OVERLAY, true );
 }
 
 
@@ -454,6 +456,8 @@ void PCB_DRAW_PANEL_GAL::setDefaultLayerDeps()
     m_view->SetRequired( LAYER_MOD_TEXT_BK, LAYER_MOD_BK );
     m_view->SetRequired( LAYER_PAD_BK_NETNAMES, LAYER_PAD_BK );
 
+    m_view->SetLayerTarget( LAYER_SELECT_OVERLAY , KIGFX::TARGET_OVERLAY );
+    m_view->SetLayerDisplayOnly( LAYER_SELECT_OVERLAY ) ;
     m_view->SetLayerTarget( LAYER_GP_OVERLAY , KIGFX::TARGET_OVERLAY );
     m_view->SetLayerDisplayOnly( LAYER_GP_OVERLAY ) ;
     m_view->SetLayerTarget( LAYER_RATSNEST, KIGFX::TARGET_OVERLAY );
diff --git a/pcbnew/router/pns_kicad_iface.cpp b/pcbnew/router/pns_kicad_iface.cpp
index f00d9be3e9..560b649cb3 100644
--- a/pcbnew/router/pns_kicad_iface.cpp
+++ b/pcbnew/router/pns_kicad_iface.cpp
@@ -376,7 +376,7 @@ public:
             return;
 
         m_items = new KIGFX::VIEW_GROUP( m_view );
-        m_items->SetLayer( LAYER_GP_OVERLAY ) ;
+        m_items->SetLayer( LAYER_SELECT_OVERLAY ) ;
         m_view->Add( m_items );
     }
 
@@ -1218,7 +1218,7 @@ void PNS_KICAD_IFACE::SetView( KIGFX::VIEW* aView )
 
     m_view = aView;
     m_previewItems = new KIGFX::VIEW_GROUP( m_view );
-    m_previewItems->SetLayer( LAYER_GP_OVERLAY ) ;
+    m_previewItems->SetLayer( LAYER_SELECT_OVERLAY ) ;
     m_view->Add( m_previewItems );
 
     delete m_debugDecorator;
diff --git a/pcbnew/router/router_preview_item.cpp b/pcbnew/router/router_preview_item.cpp
index fa42eb2153..ac344ae6de 100644
--- a/pcbnew/router/router_preview_item.cpp
+++ b/pcbnew/router/router_preview_item.cpp
@@ -43,7 +43,7 @@ ROUTER_PREVIEW_ITEM::ROUTER_PREVIEW_ITEM( const PNS::ITEM* aItem, KIGFX::VIEW* a
 
     m_shape = NULL;
     m_clearance = -1;
-    m_originLayer = m_layer = LAYER_GP_OVERLAY ;
+    m_originLayer = m_layer = LAYER_SELECT_OVERLAY ;
 
     m_showTrackClearance = false;
     m_showViaClearance = false;
diff --git a/pcbnew/tools/selection_tool.cpp b/pcbnew/tools/selection_tool.cpp
index d0d9843dd9..26a8c7827b 100644
--- a/pcbnew/tools/selection_tool.cpp
+++ b/pcbnew/tools/selection_tool.cpp
@@ -1411,7 +1411,7 @@ BOARD_ITEM* SELECTION_TOOL::doSelectionMenu( GENERAL_COLLECTOR* aCollector,
     SELECTION highlightGroup;
     CONTEXT_MENU menu;
 
-    highlightGroup.SetLayer( LAYER_GP_OVERLAY );
+    highlightGroup.SetLayer( LAYER_SELECT_OVERLAY );
     getView()->Add( &highlightGroup );
 
     int limit = std::min( 9, aCollector->GetCount() );