diff --git a/demos/simulation/laser_driver/laser_driver-cache.lib b/demos/simulation/laser_driver/laser_driver-cache.lib
index 7acac78e16..f44ec2907a 100644
--- a/demos/simulation/laser_driver/laser_driver-cache.lib
+++ b/demos/simulation/laser_driver/laser_driver-cache.lib
@@ -6,17 +6,14 @@ EESchema-LIBRARY Version 2.3
 DEF C C 0 10 N Y 1 F N
 F0 "C" 25 100 50 H V L CNN
 F1 "C" 25 -100 50 H V L CNN
-F2 "" 38 -150 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
 $FPLIST
  C?
  C_????_*
  C_????
  SMD*_c
  Capacitor*
- Capacitors_ThroughHole:C_Radial_D10_L13_P5
- Capacitors_SMD:C_0805
- Capacitors_SMD:C_1206
 $ENDFPLIST
 DRAW
 P 2 0 1 20 -80 -30 80 -30 N
@@ -31,8 +28,8 @@ ENDDEF
 DEF GND #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -250 50 H I C CNN
 F1 "GND" 0 -150 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
@@ -61,11 +58,16 @@ ENDDEF
 DEF LED D 0 40 Y N 1 F N
 F0 "D" 0 100 50 H V C CNN
 F1 "LED" 0 -100 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 $FPLIST
- LED-*
- LED_*
+ LED-3MM
+ LED-5MM
+ LED-10MM
+ LED-0603
+ LED-0805
+ LED-1206
+ LEDV
 $ENDFPLIST
 DRAW
 P 2 0 1 0 -50 50 -50 -50 N
@@ -82,8 +84,8 @@ ENDDEF
 DEF Q_NPN_CBE Q 0 0 Y N 1 F N
 F0 "Q" 300 50 50 H V R CNN
 F1 "Q_NPN_CBE" 600 -50 50 H V R CNN
-F2 "" 200 100 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 C 50 0 111 0 1 10 N
 P 2 0 1 0 25 25 100 100 N
@@ -101,16 +103,16 @@ ENDDEF
 DEF R R 0 0 N Y 1 F N
 F0 "R" 80 0 50 V V C CNN
 F1 "R" 0 0 50 V V C CNN
-F2 "" -70 0 50 V V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" -70 0 30 V V C CNN
+F3 "" 0 0 30 H V C CNN
 $FPLIST
  R_*
  Resistor_*
 $ENDFPLIST
 DRAW
 S -40 -100 40 100 0 1 10 N
-X ~ 1 0 150 50 D 50 50 1 1 P
-X ~ 2 0 -150 50 U 50 50 1 1 P
+X ~ 1 0 150 50 D 60 60 1 1 P
+X ~ 2 0 -150 50 U 60 60 1 1 P
 ENDDRAW
 ENDDEF
 #
@@ -119,8 +121,8 @@ ENDDEF
 DEF VDD #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -150 50 H I C CNN
 F1 "VDD" 0 150 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 C 0 75 25 0 1 0 N
 P 2 0 1 0 0 0 0 50 N
@@ -152,8 +154,8 @@ ENDDEF
 DEF VSS #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -150 50 H I C CNN
 F1 "VSS" 0 150 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 C 0 75 25 0 1 0 N
 P 2 0 1 0 0 0 0 50 N
diff --git a/demos/simulation/laser_driver/laser_driver.pro b/demos/simulation/laser_driver/laser_driver.pro
index 2618b4a71e..e42812d031 100644
--- a/demos/simulation/laser_driver/laser_driver.pro
+++ b/demos/simulation/laser_driver/laser_driver.pro
@@ -29,7 +29,6 @@ version=1
 NetIExt=net
 [eeschema]
 version=1
-LibDir=../../../../kicad-library/library
 [eeschema/libraries]
 LibName1=power
 LibName2=device
diff --git a/demos/simulation/laser_driver/laser_driver.sch b/demos/simulation/laser_driver/laser_driver.sch
index 64858a3c0b..a54f202d01 100644
--- a/demos/simulation/laser_driver/laser_driver.sch
+++ b/demos/simulation/laser_driver/laser_driver.sch
@@ -48,18 +48,16 @@ L VSOURCE V1
 U 1 1 57336052
 P 2650 3550
 F 0 "V1" H 2778 3596 50  0000 L CNN
-F 1 "AC 1" H 2778 3505 50  0000 L CNN
+F 1 "pulse (check properties)" H 2778 3505 50  0000 L CNN
 F 2 "" H 2650 3550 50  0000 C CNN
 F 3 "" H 2650 3550 50  0000 C CNN
-F 4 "Value" H 2650 3550 60  0001 C CNN "Fieldname"
-F 5 "V" H 2650 3550 60  0001 C CNN "Spice_Primitive"
-F 6 "pulse(0 3 100n 1n 1n 20n 100n )" H 2650 3550 60  0001 C CNN "Spice_Model"
-F 7 "Y" H 2650 3550 60  0001 C CNN "Spice_Netlist_Enabled"
+F 4 "V" H 2650 3550 60  0001 C CNN "Spice_Primitive"
+F 5 "pulse(0 3 100n 1n 1n 20n 100n )" H 2650 3550 60  0001 C CNN "Spice_Model"
 	1    2650 3550
 	1    0    0    -1  
 $EndComp
 Text Notes 3150 5400 0    60   ~ 0
-.tran 10p 150n\n
+.tran 10p 150n
 $Comp
 L Generic_Opamp U1
 U 1 1 5788FF9F
@@ -79,29 +77,29 @@ $EndComp
 $Comp
 L VSOURCE V2
 U 1 1 578900BA
-P 9650 1900
-F 0 "V2" H 9778 1946 50  0000 L CNN
-F 1 "DC 10" H 9778 1855 50  0000 L CNN
-F 2 "" H 9650 1900 50  0000 C CNN
-F 3 "" H 9650 1900 50  0000 C CNN
-F 4 "Value" H 9650 1900 60  0001 C CNN "Fieldname"
-F 5 "V" H 9650 1900 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 9350 2100 60  0001 C CNN "Spice_Node_Sequence"
-	1    9650 1900
+P 9650 1850
+F 0 "V2" H 9778 1896 50  0000 L CNN
+F 1 "DC 10" H 9778 1805 50  0000 L CNN
+F 2 "" H 9650 1850 50  0000 C CNN
+F 3 "" H 9650 1850 50  0000 C CNN
+F 4 "Value" H 9650 1850 60  0001 C CNN "Fieldname"
+F 5 "V" H 9650 1850 60  0001 C CNN "Spice_Primitive"
+F 6 "1 2" H 9350 2050 60  0001 C CNN "Spice_Node_Sequence"
+	1    9650 1850
 	1    0    0    -1  
 $EndComp
 $Comp
 L VSOURCE V3
 U 1 1 57890232
-P 9650 2300
-F 0 "V3" H 9778 2346 50  0000 L CNN
-F 1 "DC 10" H 9778 2255 50  0000 L CNN
-F 2 "" H 9650 2300 50  0000 C CNN
-F 3 "" H 9650 2300 50  0000 C CNN
-F 4 "Value" H 9650 2300 60  0001 C CNN "Fieldname"
-F 5 "V" H 9650 2300 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 9350 2500 60  0001 C CNN "Spice_Node_Sequence"
-	1    9650 2300
+P 9650 2350
+F 0 "V3" H 9778 2396 50  0000 L CNN
+F 1 "DC 10" H 9778 2305 50  0000 L CNN
+F 2 "" H 9650 2350 50  0000 C CNN
+F 3 "" H 9650 2350 50  0000 C CNN
+F 4 "Value" H 9650 2350 60  0001 C CNN "Fieldname"
+F 5 "V" H 9650 2350 60  0001 C CNN "Spice_Primitive"
+F 6 "1 2" H 9350 2550 60  0001 C CNN "Spice_Node_Sequence"
+	1    9650 2350
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -118,23 +116,23 @@ $EndComp
 $Comp
 L VDD #PWR8
 U 1 1 578903C0
-P 9650 1700
-F 0 "#PWR8" H 9650 1550 50  0001 C CNN
-F 1 "VDD" H 9667 1873 50  0000 C CNN
-F 2 "" H 9650 1700 50  0000 C CNN
-F 3 "" H 9650 1700 50  0000 C CNN
-	1    9650 1700
+P 9650 1600
+F 0 "#PWR8" H 9650 1450 50  0001 C CNN
+F 1 "VDD" H 9667 1773 50  0000 C CNN
+F 2 "" H 9650 1600 50  0000 C CNN
+F 3 "" H 9650 1600 50  0000 C CNN
+	1    9650 1600
 	1    0    0    -1  
 $EndComp
 $Comp
 L VSS #PWR9
 U 1 1 578903E2
-P 9650 2500
-F 0 "#PWR9" H 9650 2350 50  0001 C CNN
-F 1 "VSS" H 9668 2673 50  0000 C CNN
-F 2 "" H 9650 2500 50  0000 C CNN
-F 3 "" H 9650 2500 50  0000 C CNN
-	1    9650 2500
+P 9650 2600
+F 0 "#PWR9" H 9650 2450 50  0001 C CNN
+F 1 "VSS" H 9668 2773 50  0000 C CNN
+F 2 "" H 9650 2600 50  0000 C CNN
+F 3 "" H 9650 2600 50  0000 C CNN
+	1    9650 2600
 	-1   0    0    1   
 $EndComp
 $Comp
@@ -163,13 +161,10 @@ $Comp
 L C C2
 U 1 1 5789085B
 P 6800 4000
-F 0 "C2" H 6915 4046 50  0000 L CNN
-F 1 "1p" H 6915 3955 50  0000 L CNN
+F 0 "C2" H 6915 3954 50  0000 L CNN
+F 1 "1p" H 6915 4045 50  0000 L CNN
 F 2 "" H 6838 3850 50  0000 C CNN
 F 3 "" H 6800 4000 50  0000 C CNN
-F 4 "Value" H 6800 4000 60  0001 C CNN "Fieldname"
-F 5 "C" H 6800 4000 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 6800 4000 60  0001 C CNN "SpiceMapping"
 	1    6800 4000
 	-1   0    0    1   
 $EndComp
@@ -177,13 +172,10 @@ $Comp
 L R R5
 U 1 1 578EA6D8
 P 6400 4000
-F 0 "R5" V 6193 4000 50  0000 C CNN
-F 1 "2,5" V 6284 4000 50  0000 C CNN
+F 0 "R5" H 6469 3954 50  0000 L CNN
+F 1 "2.5" H 6469 4045 50  0000 L CNN
 F 2 "" V 6330 4000 50  0000 C CNN
 F 3 "" H 6400 4000 50  0000 C CNN
-F 4 "Value" H 6400 4000 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 6400 4000 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 6400 4000 60  0001 C CNN "Spice_Primitive"
 	1    6400 4000
 	-1   0    0    1   
 $EndComp
@@ -195,9 +187,6 @@ F 0 "R1" V 3943 3600 50  0000 C CNN
 F 1 "220" V 4034 3600 50  0000 C CNN
 F 2 "" V 4080 3600 50  0000 C CNN
 F 3 "" H 4150 3600 50  0000 C CNN
-F 4 "Value" H 4150 3600 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 4150 3600 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 4150 3600 60  0001 C CNN "Spice_Primitive"
 	1    4150 3600
 	0    1    1    0   
 $EndComp
@@ -209,9 +198,6 @@ F 0 "R3" V 5193 4150 50  0000 C CNN
 F 1 "220" V 5284 4150 50  0000 C CNN
 F 2 "" V 5330 4150 50  0000 C CNN
 F 3 "" H 5400 4150 50  0000 C CNN
-F 4 "Value" H 5400 4150 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 5400 4150 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 5400 4150 60  0001 C CNN "Spice_Primitive"
 	1    5400 4150
 	0    1    1    0   
 $EndComp
@@ -219,13 +205,10 @@ $Comp
 L C C1
 U 1 1 578EB076
 P 5400 4400
-F 0 "C1" H 5515 4446 50  0000 L CNN
-F 1 "1p" H 5515 4355 50  0000 L CNN
+F 0 "C1" V 5240 4400 50  0000 C CNN
+F 1 "1p" V 5149 4400 50  0000 C CNN
 F 2 "" H 5438 4250 50  0000 C CNN
 F 3 "" H 5400 4400 50  0000 C CNN
-F 4 "Value" H 5400 4400 60  0001 C CNN "Fieldname"
-F 5 "C" H 5400 4400 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 5400 4400 60  0001 C CNN "SpiceMapping"
 	1    5400 4400
 	0    -1   -1   0   
 $EndComp
@@ -265,9 +248,6 @@ F 0 "R4" V 5943 2900 50  0000 C CNN
 F 1 "220" V 6034 2900 50  0000 C CNN
 F 2 "" V 6080 2900 50  0000 C CNN
 F 3 "" H 6150 2900 50  0000 C CNN
-F 4 "Value" H 6150 2900 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 6150 2900 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 6150 2900 60  0001 C CNN "Spice_Primitive"
 	1    6150 2900
 	0    1    1    0   
 $EndComp
@@ -279,9 +259,6 @@ F 0 "R2" V 4143 2900 50  0000 C CNN
 F 1 "160" V 4234 2900 50  0000 C CNN
 F 2 "" V 4280 2900 50  0000 C CNN
 F 3 "" H 4350 2900 50  0000 C CNN
-F 4 "Value" H 4350 2900 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 4350 2900 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 4350 2900 60  0001 C CNN "Spice_Primitive"
 	1    4350 2900
 	0    1    1    0   
 $EndComp
@@ -374,8 +351,8 @@ $Comp
 L Q_NPN_CBE Q1
 U 1 1 578EADCC
 P 6300 3500
-F 0 "Q1" H 6600 3550 50  0000 R CNN
-F 1 "fzt1049a" H 6900 3450 50  0000 R CNN
+F 0 "Q1" H 6491 3546 50  0000 L CNN
+F 1 "fzt1049a" H 6491 3455 50  0000 L CNN
 F 2 "" H 6500 3600 50  0000 C CNN
 F 3 "" H 6300 3500 50  0000 C CNN
 F 4 "Value" H 6300 3500 60  0001 C CNN "Fieldname"
@@ -395,4 +372,11 @@ Wire Wire Line
 Connection ~ 6400 3750
 Text Label 6550 4350 0    60   ~ 0
 out
+Wire Wire Line
+	9650 1600 9650 1650
+Wire Wire Line
+	9650 2600 9650 2550
+Wire Wire Line
+	9650 2050 9650 2150
+Connection ~ 9650 2100
 $EndSCHEMATC
diff --git a/demos/simulation/rectifier/rectifier-cache.lib b/demos/simulation/rectifier/rectifier-cache.lib
index 3d5c8c2b86..ecde26c816 100644
--- a/demos/simulation/rectifier/rectifier-cache.lib
+++ b/demos/simulation/rectifier/rectifier-cache.lib
@@ -6,17 +6,14 @@ EESchema-LIBRARY Version 2.3
 DEF C C 0 10 N Y 1 F N
 F0 "C" 25 100 50 H V L CNN
 F1 "C" 25 -100 50 H V L CNN
-F2 "" 38 -150 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
 $FPLIST
  C?
  C_????_*
  C_????
  SMD*_c
  Capacitor*
- Capacitors_ThroughHole:C_Radial_D10_L13_P5
- Capacitors_SMD:C_0805
- Capacitors_SMD:C_1206
 $ENDFPLIST
 DRAW
 P 2 0 1 20 -80 -30 80 -30 N
@@ -31,8 +28,8 @@ ENDDEF
 DEF D D 0 40 N N 1 F N
 F0 "D" 0 100 50 H V C CNN
 F1 "D" 0 -100 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 $FPLIST
  Diode_*
  D-Pak_TO252AA
@@ -53,8 +50,8 @@ ENDDEF
 DEF GND #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -250 50 H I C CNN
 F1 "GND" 0 -150 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
@@ -66,24 +63,24 @@ ENDDEF
 DEF R R 0 0 N Y 1 F N
 F0 "R" 80 0 50 V V C CNN
 F1 "R" 0 0 50 V V C CNN
-F2 "" -70 0 50 V V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" -70 0 30 V V C CNN
+F3 "" 0 0 30 H V C CNN
 $FPLIST
  R_*
  Resistor_*
 $ENDFPLIST
 DRAW
 S -40 -100 40 100 0 1 10 N
-X ~ 1 0 150 50 D 50 50 1 1 P
-X ~ 2 0 -150 50 U 50 50 1 1 P
+X ~ 1 0 150 50 D 60 60 1 1 P
+X ~ 2 0 -150 50 U 60 60 1 1 P
 ENDDRAW
 ENDDEF
 #
-# VSOURCE
+# VSOURCE-RESCUE-rectifier
 #
-DEF ~VSOURCE V 0 40 Y Y 1 F N
+DEF ~VSOURCE-RESCUE-rectifier V 0 40 Y Y 1 F N
 F0 "V" 200 200 50 H V C CNN
-F1 "VSOURCE" 250 100 50 H I C CNN
+F1 "VSOURCE-RESCUE-rectifier" 250 100 50 H I C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 F4 "Value" 0 0 60 H I C CNN "Fieldname"
diff --git a/demos/simulation/rectifier/rectifier.pro b/demos/simulation/rectifier/rectifier.pro
index d9bf54bb1a..e1eba2d128 100644
--- a/demos/simulation/rectifier/rectifier.pro
+++ b/demos/simulation/rectifier/rectifier.pro
@@ -1,4 +1,4 @@
-update=śro, 11 maj 2016, 18:59:29
+update=Fri 05 Aug 2016 05:56:48 PM CEST
 version=1
 last_client=eeschema
 [general]
@@ -29,35 +29,34 @@ version=1
 NetIExt=net
 [eeschema]
 version=1
-LibDir=/home/twl/Kicad-dev/kicad-library/library
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
-LibName30=pspice
+LibName1=rectifier-rescue
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
diff --git a/demos/simulation/rectifier/rectifier.sch b/demos/simulation/rectifier/rectifier.sch
index 055b7ba0a8..8c69e5b5b6 100644
--- a/demos/simulation/rectifier/rectifier.sch
+++ b/demos/simulation/rectifier/rectifier.sch
@@ -1,4 +1,5 @@
 EESchema Schematic File Version 2
+LIBS:rectifier-rescue
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -28,7 +29,7 @@ LIBS:opto
 LIBS:atmel
 LIBS:contrib
 LIBS:valves
-LIBS:pspice
+LIBS:rectifier-cache
 EELAYER 25 0
 EELAYER END
 $Descr A4 11693 8268
@@ -44,16 +45,13 @@ Comment3 ""
 Comment4 ""
 $EndDescr
 $Comp
-L VSOURCE V1
+L VSOURCE-RESCUE-rectifier V1
 U 1 1 57336052
 P 4400 4050
 F 0 "V1" H 4528 4096 50  0000 L CNN
 F 1 "SINE(0 1.5 1k 0 0 0 0)" H 4528 4005 50  0000 L CNN
 F 2 "" H 4400 4050 50  0000 C CNN
 F 3 "" H 4400 4050 50  0000 C CNN
-F 4 "Value" H 4400 4050 60  0001 C CNN "Fieldname"
-F 5 "V" H 4400 4050 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 4100 4250 60  0001 C CNN "Spice_Node_Sequence"
 	1    4400 4050
 	-1   0    0    1   
 $EndComp
@@ -76,9 +74,6 @@ F 0 "R1" V 4443 3700 50  0000 C CNN
 F 1 "1k" V 4534 3700 50  0000 C CNN
 F 2 "" V 4580 3700 50  0000 C CNN
 F 3 "" H 4650 3700 50  0000 C CNN
-F 4 "Value" H 4650 3700 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 4650 3700 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 4650 3700 60  0001 C CNN "Spice_Primitive"
 	1    4650 3700
 	0    1    1    0   
 $EndComp
@@ -90,9 +85,6 @@ F 0 "D1" H 5100 3485 50  0000 C CNN
 F 1 "1N4148" H 5100 3576 50  0000 C CNN
 F 2 "" H 5100 3700 50  0000 C CNN
 F 3 "" H 5100 3700 50  0000 C CNN
-F 4 "Value" H 5100 3700 60  0001 C CNN "Fieldname"
-F 5 "D" H 5100 3700 60  0001 C CNN "Spice_Primitive"
-F 6 "2 1" H 5100 3700 60  0001 C CNN "Spice_Node_Sequence"
 	1    5100 3700
 	-1   0    0    1   
 $EndComp
@@ -104,9 +96,6 @@ F 0 "C1" H 5515 4046 50  0000 L CNN
 F 1 "100n" H 5515 3955 50  0000 L CNN
 F 2 "" H 5438 3850 50  0000 C CNN
 F 3 "" H 5400 4000 50  0000 C CNN
-F 4 "Value" H 5400 4000 60  0001 C CNN "Fieldname"
-F 5 "C" H 5400 4000 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 5400 4000 60  0001 C CNN "SpiceMapping"
 	1    5400 4000
 	1    0    0    -1  
 $EndComp
@@ -118,9 +107,6 @@ F 0 "R2" H 5680 3954 50  0000 R CNN
 F 1 "100k" H 5680 4045 50  0000 R CNN
 F 2 "" V 5680 4000 50  0000 C CNN
 F 3 "" H 5750 4000 50  0000 C CNN
-F 4 "Value" H 5750 4000 60  0001 C CNN "Fieldname"
-F 5 "1 2" H 5750 4000 60  0001 C CNN "SpiceMapping"
-F 6 "R" V 5750 4000 60  0001 C CNN "Spice_Primitive"
 	1    5750 4000
 	-1   0    0    1   
 $EndComp
@@ -145,7 +131,6 @@ Wire Wire Line
 Connection ~ 5400 4300
 Wire Wire Line
 	4800 3700 4950 3700
-Connection ~ 4900 3700
 Wire Wire Line
 	4400 3850 4400 3700
 Wire Wire Line
diff --git a/demos/simulation/sallen_key/AD8051.lib b/demos/simulation/sallen_key/AD8051.lib
deleted file mode 100644
index 20ac791cd7..0000000000
--- a/demos/simulation/sallen_key/AD8051.lib
+++ /dev/null
@@ -1,112 +0,0 @@
-* AD8051 SPICE Macro-model
-* Description: Amplifier
-* Generic Desc: Single 110 MHz rail-to-rail op amp - 3V
-* Developed by: JCH / ADI
-* Revision History: 08/10/2012 - Updated to new header style
-* 0.0 (09/1998)
-* Copyright 1998, 2012 by Analog Devices, Inc.
-*
-* Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spiceModels/license/spice_general.html for License Statement.  Use of this model
-* indicates your acceptance with the terms and provisions in the License Statement.
-*
-* BEGIN Notes:
-*
-* Not Modeled:
-* CMRR IS NOT MODELED
-*    
-* Parameters modeled include:
-* THIS MODEL IS FOR SINGLE SUPPLY OPERATION (+5V)
-*
-* END Notes
-*	
-* Node assignments
-*                 noninverting input
-*                 |       inverting input  
-*                 |       |       positive supply
-*                 |       |       |       negative supply
-*                 |       |       |       |       output
-*                 |       |       |       |       |
-*                 |       |       |       |       |
-.SUBCKT AD8051  1       2       99      50      45
-*
-* INPUT STAGE
-*
-Q1  4  3  5 QPI
-Q2  6  2  7 QPI
-RC1   50  4 20.5k
-RC2   50  6 20.5k
-RE1    5  8 5k
-RE2    7  8 5k 
-EOS    3  1 POLY(1) 53 98 1.7E-3 1 
-IOS    1  2 0.1u
-FNOI1  1  0 VMEAS2 1E-4
-FNOI2  2  0 VMEAS2 1E-4
-
-CPAR1  3 50 1.7p
-CPAR2  2 50 1.7p
-VCMH1 99  9 1
-VCMH2 99 10 1
-D1     5  9  DX
-D2     7 10 DX
-IBIAS 99  8 73u
-*
-* INTERNAL VOLTAGE REFERENCE
-*
-EREF1 98  0 POLY(2) 99 0 50 0 0 0.5 0.5
-EREF2 97  0 POLY(2)  1 0 2 0 0 0.5 0.5
-GREF2 97 0 97 0 1E-6
-*
-*VOLTAGE NOISE STAGE
-*
-DN1 51 52 DNOI1
-VN1 51 98 0.61
-VMEAS 52 98 0
-RNOI1 52 98 6.5E-3
-
-H1 53 98 VMEAS 1
-RNOI2 53 98 1
-*
-*CURRENT NOISE STAGE
-*
-DN2 61 62 DNOI2
-VN2 61 98 0.545
-VMEAS2 62 98 0
-RNOI3  62 98 2E-4
-*
-* INTERMEDIATE GAIN STAGE WITH POLE = 96MHz
-*
-G1   98 20 4 6 1E-3 
-RP1  98 20 550
-CP1  98 20 3p
-*
-* GAIN STAGE WITH DOMINANT POLE
-*
-G4   98 30 20 98 2.6E-3
-RG1 30 98 155k
-CF1  30 45 13.5p
-D5 31 99 DX
-D6 50 32 DX
-V1 31 30 0.6
-V2 30 32 0.6
-*
-* OUTPUT STAGE
-*
-Q3  45 42 99 QPOX
-Q4  45 44 50 QNOX
-EO3 99 42 POLY(1) 98 30 0.7175 0.5
-EO4 44 50 POLY(1) 30 98 0.7355 0.5
-*
-* MODELS
-*
-.MODEL QPI PNP (IS=8.6E-18,BF=91,VAF=30.6)
-.MODEL QNOX NPN(IS=6.37E-16,BF=100,VAF=90,RC=3)
-.MODEL QPOX PNP(IS=1.19E-15,BF=112,VAF=19.2,RC=6)
-.MODEL DX D(IS=1E-16)
-.MODEL DZ D(IS=1E-14,BV=6.6)
-.MODEL DNOI1 D(KF=9E-10)
-.MODEL DNOI2 D(KF=1E-8)
-.ENDS AD8051
-
-
-
-
diff --git a/demos/simulation/sallen_key/sallen_key-cache.lib b/demos/simulation/sallen_key/sallen_key-cache.lib
index 96a2f7eecf..d299155d9f 100644
--- a/demos/simulation/sallen_key/sallen_key-cache.lib
+++ b/demos/simulation/sallen_key/sallen_key-cache.lib
@@ -6,17 +6,14 @@ EESchema-LIBRARY Version 2.3
 DEF C C 0 10 N Y 1 F N
 F0 "C" 25 100 50 H V L CNN
 F1 "C" 25 -100 50 H V L CNN
-F2 "" 38 -150 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
 $FPLIST
  C?
  C_????_*
  C_????
  SMD*_c
  Capacitor*
- Capacitors_ThroughHole:C_Radial_D10_L13_P5
- Capacitors_SMD:C_0805
- Capacitors_SMD:C_1206
 $ENDFPLIST
 DRAW
 P 2 0 1 20 -80 -30 80 -30 N
@@ -31,8 +28,8 @@ ENDDEF
 DEF GND #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -250 50 H I C CNN
 F1 "GND" 0 -150 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
 X GND 1 0 0 0 D 50 50 1 1 W N
@@ -61,16 +58,16 @@ ENDDEF
 DEF R R 0 0 N Y 1 F N
 F0 "R" 80 0 50 V V C CNN
 F1 "R" 0 0 50 V V C CNN
-F2 "" -70 0 50 V V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" -70 0 30 V V C CNN
+F3 "" 0 0 30 H V C CNN
 $FPLIST
  R_*
  Resistor_*
 $ENDFPLIST
 DRAW
 S -40 -100 40 100 0 1 10 N
-X ~ 1 0 150 50 D 50 50 1 1 P
-X ~ 2 0 -150 50 U 50 50 1 1 P
+X ~ 1 0 150 50 D 60 60 1 1 P
+X ~ 2 0 -150 50 U 60 60 1 1 P
 ENDDRAW
 ENDDEF
 #
@@ -79,8 +76,8 @@ ENDDEF
 DEF VDD #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -150 50 H I C CNN
 F1 "VDD" 0 150 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 C 0 75 25 0 1 0 N
 P 2 0 1 0 0 0 0 50 N
@@ -88,11 +85,11 @@ X VDD 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
-# VSOURCE
+# VSOURCE-RESCUE-sallen_key
 #
-DEF ~VSOURCE V 0 40 Y Y 1 F N
+DEF ~VSOURCE-RESCUE-sallen_key V 0 40 Y Y 1 F N
 F0 "V" 200 200 50 H V C CNN
-F1 "VSOURCE" 250 100 50 H I C CNN
+F1 "VSOURCE-RESCUE-sallen_key" 250 100 50 H I C CNN
 F2 "" 0 0 50 H V C CNN
 F3 "" 0 0 50 H V C CNN
 F4 "Value" 0 0 60 H I C CNN "Fieldname"
@@ -112,8 +109,8 @@ ENDDEF
 DEF VSS #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 -150 50 H I C CNN
 F1 "VSS" 0 150 50 H V C CNN
-F2 "" 0 0 50 H V C CNN
-F3 "" 0 0 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
 DRAW
 C 0 75 25 0 1 0 N
 P 2 0 1 0 0 0 0 50 N
diff --git a/demos/simulation/sallen_key/sallen_key.pro b/demos/simulation/sallen_key/sallen_key.pro
index d91a6573a1..367e9de187 100644
--- a/demos/simulation/sallen_key/sallen_key.pro
+++ b/demos/simulation/sallen_key/sallen_key.pro
@@ -1,4 +1,4 @@
-update=pią, 15 lip 2016, 17:18:36
+update=Fri 05 Aug 2016 05:58:16 PM CEST
 version=1
 last_client=eeschema
 [general]
@@ -27,40 +27,6 @@ ModuleOutlineThickness=0.150000000000
 [cvpcb]
 version=1
 NetIExt=net
-[eeschema]
-version=1
-LibDir=../../kicad-library/library
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
-LibName30=pspice
 [schematic_editor]
 version=1
 PageLayoutDescrFile=
@@ -72,3 +38,36 @@ SpiceForceRefPrefix=0
 SpiceUseNetNumbers=0
 LabSize=60
 ERC_TestSimilarLabels=1
+[eeschema]
+version=1
+[eeschema/libraries]
+LibName1=sallen_key-rescue
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
diff --git a/demos/simulation/sallen_key/sallen_key.sch b/demos/simulation/sallen_key/sallen_key.sch
index 4b0d2e2edd..8eb2e8cf0b 100644
--- a/demos/simulation/sallen_key/sallen_key.sch
+++ b/demos/simulation/sallen_key/sallen_key.sch
@@ -1,4 +1,5 @@
 EESchema Schematic File Version 2
+LIBS:sallen_key-rescue
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -28,7 +29,6 @@ LIBS:opto
 LIBS:atmel
 LIBS:contrib
 LIBS:valves
-LIBS:pspice
 LIBS:sallen_key-cache
 EELAYER 25 0
 EELAYER END
@@ -45,23 +45,16 @@ Comment3 ""
 Comment4 ""
 $EndDescr
 $Comp
-L VSOURCE V1
+L VSOURCE-RESCUE-sallen_key V1
 U 1 1 57336052
 P 6000 4700
 F 0 "V1" H 6128 4746 50  0000 L CNN
 F 1 "AC 1" H 6128 4655 50  0000 L CNN
 F 2 "" H 6000 4700 50  0000 C CNN
 F 3 "" H 6000 4700 50  0000 C CNN
-F 4 "Value" H 6000 4700 60  0001 C CNN "Fieldname"
-F 5 "V" H 6000 4700 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 5700 4900 60  0001 C CNN "Spice_Node_Sequence"
 	1    6000 4700
 	1    0    0    -1  
 $EndComp
-Text Notes 4300 4900 0    60   ~ 0
-*.tran 1u 10m\n
-Text Notes 4300 4800 0    60   ~ 0
-.include diodes.lib\n
 Text Label 8550 4400 0    60   ~ 0
 lowpass
 Text Notes 4300 5000 0    60   ~ 0
@@ -74,40 +67,39 @@ F 0 "U1" H 8191 4446 50  0000 L CNN
 F 1 "AD8051" H 8191 4355 50  0000 L CNN
 F 2 "" H 7750 4300 50  0000 C CNN
 F 3 "" H 7850 4400 50  0000 C CNN
-F 4 "Value" H 7850 4400 60  0001 C CNN "Fieldname"
-F 5 "X" H 7850 4400 60  0001 C CNN "Spice_Primitive"
-F 6 "AD8051" H 7850 4400 60  0001 C CNN "Spice_Model"
+F 4 "X" H 7850 4400 60  0001 C CNN "Spice_Primitive"
+F 5 "AD8051" H 7850 4400 60  0001 C CNN "Spice_Model"
+F 6 "ad8051.lib" H 7850 4400 60  0001 C CNN "Spice_Lib_File"
 F 7 "Y" H 7850 4400 60  0001 C CNN "Spice_Netlist_Enabled"
-F 8 "/home/twl/Kicad-dev/kicad-git/eeschema/AD8051.lib" H 7850 4400 60  0001 C CNN "Spice_Lib_File"
 	1    7850 4400
 	1    0    0    -1  
 $EndComp
 $Comp
-L VSOURCE V2
+L VSOURCE-RESCUE-sallen_key V2
 U 1 1 578900BA
-P 9650 1900
-F 0 "V2" H 9778 1946 50  0000 L CNN
-F 1 "DC 10" H 9778 1855 50  0000 L CNN
-F 2 "" H 9650 1900 50  0000 C CNN
-F 3 "" H 9650 1900 50  0000 C CNN
-F 4 "Value" H 9650 1900 60  0001 C CNN "Fieldname"
-F 5 "V" H 9650 1900 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 9350 2100 60  0001 C CNN "Spice_Node_Sequence"
-	1    9650 1900
+P 9650 1850
+F 0 "V2" H 9778 1896 50  0000 L CNN
+F 1 "DC 10" H 9778 1805 50  0000 L CNN
+F 2 "" H 9650 1850 50  0000 C CNN
+F 3 "" H 9650 1850 50  0000 C CNN
+F 4 "Value" H 9650 1850 60  0001 C CNN "Fieldname"
+F 5 "V" H 9650 1850 60  0001 C CNN "Spice_Primitive"
+F 6 "1 2" H 9350 2050 60  0001 C CNN "Spice_Node_Sequence"
+	1    9650 1850
 	1    0    0    -1  
 $EndComp
 $Comp
-L VSOURCE V3
+L VSOURCE-RESCUE-sallen_key V3
 U 1 1 57890232
-P 9650 2300
-F 0 "V3" H 9778 2346 50  0000 L CNN
-F 1 "DC 10" H 9778 2255 50  0000 L CNN
-F 2 "" H 9650 2300 50  0000 C CNN
-F 3 "" H 9650 2300 50  0000 C CNN
-F 4 "Value" H 9650 2300 60  0001 C CNN "Fieldname"
-F 5 "V" H 9650 2300 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 9350 2500 60  0001 C CNN "Spice_Node_Sequence"
-	1    9650 2300
+P 9650 2350
+F 0 "V3" H 9778 2396 50  0000 L CNN
+F 1 "DC 10" H 9778 2305 50  0000 L CNN
+F 2 "" H 9650 2350 50  0000 C CNN
+F 3 "" H 9650 2350 50  0000 C CNN
+F 4 "Value" H 9650 2350 60  0001 C CNN "Fieldname"
+F 5 "V" H 9650 2350 60  0001 C CNN "Spice_Primitive"
+F 6 "1 2" H 9350 2550 60  0001 C CNN "Spice_Node_Sequence"
+	1    9650 2350
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -124,23 +116,23 @@ $EndComp
 $Comp
 L VDD #PWR6
 U 1 1 578903C0
-P 9650 1700
-F 0 "#PWR6" H 9650 1550 50  0001 C CNN
-F 1 "VDD" H 9667 1873 50  0000 C CNN
-F 2 "" H 9650 1700 50  0000 C CNN
-F 3 "" H 9650 1700 50  0000 C CNN
-	1    9650 1700
+P 9650 1600
+F 0 "#PWR6" H 9650 1450 50  0001 C CNN
+F 1 "VDD" H 9667 1773 50  0000 C CNN
+F 2 "" H 9650 1600 50  0000 C CNN
+F 3 "" H 9650 1600 50  0000 C CNN
+	1    9650 1600
 	1    0    0    -1  
 $EndComp
 $Comp
 L VSS #PWR7
 U 1 1 578903E2
-P 9650 2500
-F 0 "#PWR7" H 9650 2350 50  0001 C CNN
-F 1 "VSS" H 9668 2673 50  0000 C CNN
-F 2 "" H 9650 2500 50  0000 C CNN
-F 3 "" H 9650 2500 50  0000 C CNN
-	1    9650 2500
+P 9650 2600
+F 0 "#PWR7" H 9650 2450 50  0001 C CNN
+F 1 "VSS" H 9668 2773 50  0000 C CNN
+F 2 "" H 9650 2600 50  0000 C CNN
+F 3 "" H 9650 2600 50  0000 C CNN
+	1    9650 2600
 	-1   0    0    1   
 $EndComp
 $Comp
@@ -197,13 +189,10 @@ $Comp
 L C C1
 U 1 1 5789077D
 P 7000 4950
-F 0 "C1" H 7115 4996 50  0000 L CNN
-F 1 "100n" H 7115 4905 50  0000 L CNN
+F 0 "C1" V 6748 4950 50  0000 C CNN
+F 1 "100n" V 6839 4950 50  0000 C CNN
 F 2 "" H 7038 4800 50  0000 C CNN
 F 3 "" H 7000 4950 50  0000 C CNN
-F 4 "Value" H 7000 4950 60  0001 C CNN "Fieldname"
-F 5 "C" H 7000 4950 60  0001 C CNN "Spice_Primitive"
-F 6 "1 2" H 7000 4950 60  0001 C CNN "SpiceMapping"
 	1    7000 4950
 	0    1    1    0   
 $EndComp
@@ -237,25 +226,24 @@ Wire Wire Line
 Wire Wire Line
 	8150 4400 8900 4400
 Wire Wire Line
-	8350 4400 8350 4950
+	8350 4950 8350 4400
 Wire Wire Line
-	8350 4950 7400 4950
+	7150 4950 8350 4950
 Wire Wire Line
 	7400 4950 7400 4500
 Wire Wire Line
 	7400 4500 7550 4500
 Wire Wire Line
-	7550 4300 7100 4300
+	7100 4300 7550 4300
 Wire Wire Line
-	6550 4300 6850 4300
+	6550 4300 6800 4300
 Wire Wire Line
 	6850 4950 6650 4950
 Wire Wire Line
 	6650 4950 6650 4300
-Connection ~ 6800 4300
 Connection ~ 6650 4300
 Wire Wire Line
-	7150 4950 7450 4950
+	7400 4950 7450 4950
 Connection ~ 7400 4950
 Wire Wire Line
 	7350 4150 7350 4300
@@ -279,7 +267,12 @@ F 3 "" H 6000 5000 50  0000 C CNN
 	1    6000 5000
 	1    0    0    -1  
 $EndComp
-Wire Wire Line
-	8900 4400 8900 4450
 Connection ~ 8350 4400
+Wire Wire Line
+	9650 2600 9650 2550
+Wire Wire Line
+	9650 1600 9650 1650
+Wire Wire Line
+	9650 2050 9650 2150
+Connection ~ 9650 2100
 $EndSCHEMATC