diff --git a/common/pcb.keywords b/common/pcb.keywords
index a6f7024e32..e8ffab2b0c 100644
--- a/common/pcb.keywords
+++ b/common/pcb.keywords
@@ -56,6 +56,8 @@ date
descr
die_length
dimension
+diff_pair_width
+diff_pair_gap
drawings
drill
edge
@@ -206,4 +208,4 @@ zone_45_only
zone_clearance
zone_connect
zone_type
-zones
+zones
\ No newline at end of file
diff --git a/pcbnew/class_netclass.cpp b/pcbnew/class_netclass.cpp
index 858175b16c..be1ad8f730 100644
--- a/pcbnew/class_netclass.cpp
+++ b/pcbnew/class_netclass.cpp
@@ -44,6 +44,8 @@ const int NETCLASS::DEFAULT_VIA_DRILL = Millimeter2iu( 0.4 );
const int NETCLASS::DEFAULT_UVIA_DIAMETER = Millimeter2iu( 0.3 );
const int NETCLASS::DEFAULT_UVIA_DRILL = Millimeter2iu( 0.1 );
const int NETCLASS::DEFAULT_TRACK_WIDTH = Millimeter2iu( 0.25 );
+const int NETCLASS::DEFAULT_DIFF_PAIR_WIDTH = Millimeter2iu( 0.2 );
+const int NETCLASS::DEFAULT_DIFF_PAIR_GAP = Millimeter2iu( 0.25 );
NETCLASS::NETCLASS( const wxString& aName ) :
@@ -58,6 +60,8 @@ NETCLASS::NETCLASS( const wxString& aName ) :
SetTrackWidth( DEFAULT_TRACK_WIDTH );
SetViaDiameter( DEFAULT_VIA_DIAMETER );
SetuViaDiameter( DEFAULT_UVIA_DIAMETER );
+ SetDiffPairGap( DEFAULT_DIFF_PAIR_GAP );
+ SetDiffPairWidth( DEFAULT_DIFF_PAIR_WIDTH );
}
@@ -69,6 +73,9 @@ void NETCLASS::SetParams( const NETCLASS& aDefaults )
SetViaDrill( aDefaults.GetViaDrill() );
SetuViaDiameter( aDefaults.GetuViaDiameter() );
SetuViaDrill( aDefaults.GetuViaDrill() );
+ SetDiffPairWidth( aDefaults.GetDiffPairWidth() );
+ SetDiffPairGap( aDefaults.GetDiffPairGap() );
+
}
@@ -257,6 +264,10 @@ void NETCLASS::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControl
aFormatter->Print( aNestLevel+1, "(uvia_dia %s)\n", FMT_IU( GetuViaDiameter() ).c_str() );
aFormatter->Print( aNestLevel+1, "(uvia_drill %s)\n", FMT_IU( GetuViaDrill() ).c_str() );
+ aFormatter->Print( aNestLevel+1, "(diff_pair_gap %s)\n", FMT_IU( GetDiffPairGap() ).c_str() );
+ aFormatter->Print( aNestLevel+1, "(diff_pair_width %s)\n", FMT_IU( GetDiffPairWidth() ).c_str() );
+
+
for( NETCLASS::const_iterator it = begin(); it != end(); ++it )
aFormatter->Print( aNestLevel+1, "(add_net %s)\n", aFormatter->Quotew( *it ).c_str() );
diff --git a/pcbnew/class_netclass.h b/pcbnew/class_netclass.h
index 5f86f9be57..bca0afcfcb 100644
--- a/pcbnew/class_netclass.h
+++ b/pcbnew/class_netclass.h
@@ -59,6 +59,8 @@ private:
static const int DEFAULT_VIA_DIAMETER;
static const int DEFAULT_UVIA_DIAMETER;
static const int DEFAULT_TRACK_WIDTH;
+ static const int DEFAULT_DIFF_PAIR_WIDTH;
+ static const int DEFAULT_DIFF_PAIR_GAP;
protected:
wxString m_Name; ///< Name of the net class
@@ -79,6 +81,9 @@ protected:
int m_uViaDia; ///< microvia diameter
int m_uViaDrill; ///< microvia drill hole diameter
+ int m_diffPairWidth;
+ int m_diffPairGap;
+
public:
static const wxChar Default[]; ///< the name of the default NETCLASS
@@ -179,6 +184,12 @@ public:
int GetuViaDrill() const { return m_uViaDrill; }
void SetuViaDrill( int aSize ) { m_uViaDrill = aSize; }
+ int GetDiffPairWidth() const { return m_diffPairWidth; }
+ void SetDiffPairWidth( int aSize ) { m_diffPairWidth = aSize; }
+
+ int GetDiffPairGap() const { return m_diffPairGap; }
+ void SetDiffPairGap( int aSize ) { m_diffPairGap = aSize; }
+
/**
* Function SetParams
* will set all the parameters by copying them from \a defaults.
diff --git a/pcbnew/dialogs/dialog_design_rules.cpp b/pcbnew/dialogs/dialog_design_rules.cpp
index 26a2f07c83..3f288742d4 100644
--- a/pcbnew/dialogs/dialog_design_rules.cpp
+++ b/pcbnew/dialogs/dialog_design_rules.cpp
@@ -58,7 +58,9 @@ enum {
GRID_VIASIZE,
GRID_VIADRILL,
GRID_uVIASIZE,
- GRID_uVIADRILL
+ GRID_uVIADRILL,
+ GRID_DIFF_PAIR_WIDTH,
+ GRID_DIFF_PAIR_GAP
};
const wxString DIALOG_DESIGN_RULES::wildCard = _( "* (Any)" );
@@ -450,6 +452,13 @@ static void class2gridRow( wxGrid* grid, int row, NETCLASSPTR nc )
msg = StringFromValue( g_UserUnit, nc->GetuViaDrill() );
grid->SetCellValue( row, GRID_uVIADRILL, msg );
+
+ msg = StringFromValue( g_UserUnit, nc->GetDiffPairGap() );
+ grid->SetCellValue( row, GRID_DIFF_PAIR_GAP, msg );
+
+ msg = StringFromValue( g_UserUnit, nc->GetDiffPairWidth() );
+ grid->SetCellValue( row, GRID_DIFF_PAIR_WIDTH, msg );
+
}
@@ -489,6 +498,9 @@ static void gridRow2class( wxGrid* grid, int row, NETCLASSPTR nc )
nc->SetViaDrill( MYCELL( GRID_VIADRILL ) );
nc->SetuViaDiameter( MYCELL( GRID_uVIASIZE ) );
nc->SetuViaDrill( MYCELL( GRID_uVIADRILL ) );
+ nc->SetDiffPairGap( MYCELL( GRID_DIFF_PAIR_GAP ) );
+ nc->SetDiffPairWidth( MYCELL( GRID_DIFF_PAIR_WIDTH ) );
+
}
@@ -924,6 +936,18 @@ bool DIALOG_DESIGN_RULES::TestDataValidity( wxString* aErrorMsg )
errorMsg += msg;
}
+ int dpsize = ValueFromString( g_UserUnit,
+ m_grid->GetCellValue( row, GRID_DIFF_PAIR_WIDTH ) );
+
+ if( dpsize < minTrackWidth )
+ {
+ result = false;
+ msg.Printf( _( "%s: Differential Pair Size < Min Track Size
" ),
+ GetChars( m_grid->GetRowLabelValue( row ) ) );
+ errorMsg += msg;
+ }
+
+
// Test vias
int viadia = ValueFromString( g_UserUnit,
m_grid->GetCellValue( row, GRID_VIASIZE ) );
diff --git a/pcbnew/dialogs/dialog_design_rules_base.cpp b/pcbnew/dialogs/dialog_design_rules_base.cpp
index 7b3c8da36e..c10b757c07 100644
--- a/pcbnew/dialogs/dialog_design_rules_base.cpp
+++ b/pcbnew/dialogs/dialog_design_rules_base.cpp
@@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////////
-// C++ code generated with wxFormBuilder (version Aug 23 2015)
+// C++ code generated with wxFormBuilder (version Jun 17 2015)
// http://www.wxformbuilder.org/
//
// PLEASE DO "NOT" EDIT THIS FILE!
@@ -29,7 +29,7 @@ DIALOG_DESIGN_RULES_BASE::DIALOG_DESIGN_RULES_BASE( wxWindow* parent, wxWindowID
m_grid = new wxGrid( sbSizerUpper->GetStaticBox(), wxID_ANY, wxDefaultPosition, wxDefaultSize, wxHSCROLL|wxSIMPLE_BORDER|wxTAB_TRAVERSAL|wxVSCROLL );
// Grid
- m_grid->CreateGrid( 1, 6 );
+ m_grid->CreateGrid( 1, 8 );
m_grid->EnableEditing( true );
m_grid->EnableGridLines( true );
m_grid->EnableDragGridSize( false );
@@ -51,6 +51,8 @@ DIALOG_DESIGN_RULES_BASE::DIALOG_DESIGN_RULES_BASE( wxWindow* parent, wxWindowID
m_grid->SetColLabelValue( 3, _("Via Drill") );
m_grid->SetColLabelValue( 4, _("uVia Dia") );
m_grid->SetColLabelValue( 5, _("uVia Drill") );
+ m_grid->SetColLabelValue( 6, _("Diff Pair Width") );
+ m_grid->SetColLabelValue( 7, _("Diff Pair Gap") );
m_grid->SetColLabelAlignment( wxALIGN_CENTRE, wxALIGN_CENTRE );
// Rows
diff --git a/pcbnew/dialogs/dialog_design_rules_base.fbp b/pcbnew/dialogs/dialog_design_rules_base.fbp
index 0c2195824f..01c1b2774a 100644
--- a/pcbnew/dialogs/dialog_design_rules_base.fbp
+++ b/pcbnew/dialogs/dialog_design_rules_base.fbp
@@ -298,9 +298,9 @@
1
wxALIGN_CENTRE
40
- "Clearance" "Track Width" "Via Dia" "Via Drill" "uVia Dia" "uVia Drill"
+ "Clearance" "Track Width" "Via Dia" "Via Drill" "uVia Dia" "uVia Drill" "Diff Pair Width" "Diff Pair Gap"
wxALIGN_CENTRE
- 6
+ 8
100,120,84,85,81,90
1
diff --git a/pcbnew/dialogs/dialog_design_rules_base.h b/pcbnew/dialogs/dialog_design_rules_base.h
index 2da23100a5..95c9509c87 100644
--- a/pcbnew/dialogs/dialog_design_rules_base.h
+++ b/pcbnew/dialogs/dialog_design_rules_base.h
@@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////////
-// C++ code generated with wxFormBuilder (version Aug 23 2015)
+// C++ code generated with wxFormBuilder (version Jun 17 2015)
// http://www.wxformbuilder.org/
//
// PLEASE DO "NOT" EDIT THIS FILE!
diff --git a/pcbnew/kicad_plugin.h b/pcbnew/kicad_plugin.h
index f81555f2a3..7b5cdd8f9a 100644
--- a/pcbnew/kicad_plugin.h
+++ b/pcbnew/kicad_plugin.h
@@ -39,8 +39,9 @@ class NETINFO_MAPPING;
/// Current s-expression file format version. 2 was the last legacy format version.
//#define SEXPR_BOARD_FILE_VERSION 3 // first s-expression format, used legacy cu stack
-#define SEXPR_BOARD_FILE_VERSION 4 // reversed cu stack, changed Inner* to In* in reverse order
- // went to 32 Cu layers from 16.
+//#define SEXPR_BOARD_FILE_VERSION 4 // reversed cu stack, changed Inner* to In* in reverse order
+// // went to 32 Cu layers from 16.
+#define SEXPR_BOARD_FILE_VERSION 5 // differential pair settings per net class
#define CTL_STD_LAYER_NAMES (1 << 0) ///< Use English Standard layer names
#define CTL_OMIT_NETS (1 << 1) ///< Omit pads net names (useless in library)
diff --git a/pcbnew/pcb_parser.cpp b/pcbnew/pcb_parser.cpp
index bf83a84b8e..e6413c878d 100644
--- a/pcbnew/pcb_parser.cpp
+++ b/pcbnew/pcb_parser.cpp
@@ -1301,13 +1301,21 @@ void PCB_PARSER::parseNETCLASS() throw( IO_ERROR, PARSE_ERROR )
nc->SetuViaDrill( parseBoardUnits( T_uvia_drill ) );
break;
+ case T_diff_pair_width:
+ nc->SetDiffPairWidth( parseBoardUnits( T_diff_pair_width ) );
+ break;
+
+ case T_diff_pair_gap:
+ nc->SetDiffPairGap( parseBoardUnits( T_diff_pair_gap ) );
+ break;
+
case T_add_net:
NeedSYMBOLorNUMBER();
nc->Add( FromUTF8() );
break;
default:
- Expecting( "clearance, trace_width, via_dia, via_drill, uvia_dia, uvia_drill, or add_net" );
+ Expecting( "clearance, trace_width, via_dia, via_drill, uvia_dia, uvia_drill, diff_pair_width, diff_pair_gap or add_net" );
}
NeedRIGHT();