From e834374ad261e5265ac53aac4b54e41a777d558b Mon Sep 17 00:00:00 2001
From: Seth Hillbrand <seth@kipro-pcb.com>
Date: Tue, 4 Oct 2022 08:22:54 -0700
Subject: [PATCH] Drill size is absolute

Use hole plating size for visibility only, not zone filling, routing or
DRC

(cherry picked from commit b4f3390626e32cd849e579c444d272e0757d1e7e)
---
 pcbnew/drc/drc_engine.cpp                         |  5 -----
 pcbnew/drc/drc_test_provider_copper_clearance.cpp |  5 -----
 pcbnew/pcb_track.cpp                              |  7 +------
 pcbnew/router/pns_kicad_iface.cpp                 |  4 ++--
 pcbnew/zone_filler.cpp                            | 12 +-----------
 5 files changed, 4 insertions(+), 29 deletions(-)

diff --git a/pcbnew/drc/drc_engine.cpp b/pcbnew/drc/drc_engine.cpp
index 4295d33b6a..9427594f4e 100644
--- a/pcbnew/drc/drc_engine.cpp
+++ b/pcbnew/drc/drc_engine.cpp
@@ -1345,12 +1345,7 @@ std::shared_ptr<SHAPE> DRC_ENGINE::GetShape( BOARD_ITEM* aItem, PCB_LAYER_ID aLa
 
         if( aPad->GetAttribute() == PAD_ATTRIB::PTH )
         {
-            BOARD_DESIGN_SETTINGS& bds = aPad->GetBoard()->GetDesignSettings();
-
-            // Note: drill size represents finish size, which means the actual holes size is the
-            // plating thickness larger.
             auto hole = static_cast<SHAPE_SEGMENT*>( aPad->GetEffectiveHoleShape()->Clone() );
-            hole->SetWidth( hole->GetWidth() + bds.GetHolePlatingThickness() );
             return std::make_shared<SHAPE_SEGMENT>( *hole );
         }
 
diff --git a/pcbnew/drc/drc_test_provider_copper_clearance.cpp b/pcbnew/drc/drc_test_provider_copper_clearance.cpp
index 45761cb402..1fe3ce1d8a 100644
--- a/pcbnew/drc/drc_test_provider_copper_clearance.cpp
+++ b/pcbnew/drc/drc_test_provider_copper_clearance.cpp
@@ -449,11 +449,6 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZones( BOARD_ITEM* aItem
                         const SHAPE_SEGMENT* hole = pad->GetEffectiveHoleShape();
                         int                  size = hole->GetWidth();
 
-                        // Note: drill size represents finish size, which means the actual hole
-                        // size is 2x the plating thickness larger.
-                        if( pad->GetAttribute() == PAD_ATTRIB::PTH )
-                            size += 2 * m_board->GetDesignSettings().GetHolePlatingThickness();
-
                         itemShape = std::make_shared<SHAPE_SEGMENT>( hole->GetSeg(), size );
                     }
                 }
diff --git a/pcbnew/pcb_track.cpp b/pcbnew/pcb_track.cpp
index 6ebf78a6a6..de4b6b8b40 100644
--- a/pcbnew/pcb_track.cpp
+++ b/pcbnew/pcb_track.cpp
@@ -1013,12 +1013,7 @@ std::shared_ptr<SHAPE> PCB_VIA::GetEffectiveShape( PCB_LAYER_ID aLayer, FLASHING
     }
     else
     {
-        int radius = GetDrillValue() / 2;
-
-        if( GetBoard() )
-            radius += GetBoard()->GetDesignSettings().GetHolePlatingThickness();
-
-        return std::make_shared<SHAPE_CIRCLE>( m_Start, radius );
+        return std::make_shared<SHAPE_CIRCLE>( m_Start, GetDrillValue() / 2 );
     }
 }
 
diff --git a/pcbnew/router/pns_kicad_iface.cpp b/pcbnew/router/pns_kicad_iface.cpp
index 6c6e1fe5e7..8a848d6dd3 100644
--- a/pcbnew/router/pns_kicad_iface.cpp
+++ b/pcbnew/router/pns_kicad_iface.cpp
@@ -967,7 +967,7 @@ std::unique_ptr<PNS::SOLID> PNS_KICAD_IFACE_BASE::syncPad( PAD* aPad )
         if( aPad->GetAttribute() != PAD_ATTRIB::NPTH )
         {
             BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
-            slot->SetWidth( slot->GetWidth() + bds.GetHolePlatingThickness() * 2 );
+            slot->SetWidth( slot->GetWidth() );
         }
 
         solid->SetHole( slot );
@@ -1044,7 +1044,7 @@ std::unique_ptr<PNS::VIA> PNS_KICAD_IFACE_BASE::syncVia( PCB_VIA* aVia )
 
     BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
     via->SetHole( SHAPE_CIRCLE( aVia->GetPosition(),
-                                aVia->GetDrillValue() / 2 + bds.GetHolePlatingThickness() ) );
+                                aVia->GetDrillValue() / 2 ) );
 
     return via;
 }
diff --git a/pcbnew/zone_filler.cpp b/pcbnew/zone_filler.cpp
index 4c62b3ab20..bee99a031f 100644
--- a/pcbnew/zone_filler.cpp
+++ b/pcbnew/zone_filler.cpp
@@ -582,11 +582,6 @@ void ZONE_FILLER::addKnockout( PAD* aPad, PCB_LAYER_ID aLayer, int aGap, SHAPE_P
  */
 void ZONE_FILLER::addHoleKnockout( PAD* aPad, int aGap, SHAPE_POLY_SET& aHoles )
 {
-    // Note: drill size represents finish size, which means the actual hole size is the plating
-    // thickness larger.
-    if( aPad->GetAttribute() == PAD_ATTRIB::PTH )
-        aGap += aPad->GetBoard()->GetDesignSettings().GetHolePlatingThickness();
-
     aPad->TransformHoleWithClearanceToPolygon( aHoles, aGap, m_maxError, ERROR_OUTSIDE );
 }
 
@@ -657,11 +652,6 @@ void ZONE_FILLER::knockoutThermalReliefs( const ZONE* aZone, PCB_LAYER_ID aLayer
                 if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
                     continue;
 
-                // Note: drill size represents finish size, which means the actual holes size is
-                // the plating thickness larger.
-                if( pad->GetAttribute() == PAD_ATTRIB::PTH )
-                    gap += pad->GetBoard()->GetDesignSettings().GetHolePlatingThickness();
-
                 pad->TransformHoleWithClearanceToPolygon( holes, gap, m_maxError, ERROR_OUTSIDE );
             }
         }
@@ -790,7 +780,7 @@ void ZONE_FILLER::buildCopperItemClearances( const ZONE* aZone, PCB_LAYER_ID aLa
                                                                     aZone, via, aLayer ) );
                         }
 
-                        int radius = via->GetDrillValue() / 2 + bds.GetHolePlatingThickness();
+                        int radius = via->GetDrillValue() / 2;
 
                         TransformCircleToPolygon( aHoles, via->GetPosition(),
                                                   radius + gap + extra_margin,