diff --git a/CHANGELOG.txt b/CHANGELOG.txt index a67395b643..7c02e1f196 100644 --- a/CHANGELOG.txt +++ b/CHANGELOG.txt @@ -1,4 +1,4 @@ -KiCad ChangeLog 2010 +KiCad ChangeLog 2011 ==================== Please add newer entries at the top, list the date and your name with @@ -244,6 +244,9 @@ CvPcb: offending line of bytes. Yes bytes, not even guaranteed to be characters. +KiCad ChangeLog 2010 +==================== + 2010-dec-31 UPDATE Wayne Stambaugh ================================================================================ ++all diff --git a/common/pcbcommon.cpp b/common/pcbcommon.cpp index e41f4c21e9..5b04e63e50 100644 --- a/common/pcbcommon.cpp +++ b/common/pcbcommon.cpp @@ -42,17 +42,27 @@ class MODULE; -/* Look up Table for conversion one layer number -> one bit layer mask: */ -int g_TabOneLayerMask[LAYER_COUNT] = { - 0x00000001, 0x00000002, 0x00000004, 0x00000008, - 0x00000010, 0x00000020, 0x00000040, 0x00000080, - 0x00000100, 0x00000200, 0x00000400, 0x00000800, - 0x00001000, 0x00002000, 0x00004000, 0x00008000, - 0x00010000, 0x00020000, 0x00040000, 0x00080000, - 0x00100000, 0x00200000, 0x00400000, 0x00800000, - 0x01000000, 0x02000000, 0x04000000, 0x08000000, - 0x10000000, 0x20000000, 0x40000000, 0x80000000 -}; +/* return a one bit layer mask from a layer number + * aLayerNumber = the layer number to convert (0 .. LAYER_COUNT-1) + */ +int GetLayerMask( int aLayerNumber ) +{ + // Look up Table for conversion one layer number -> one bit layer mask: + static int tabOneLayerMask[LAYER_COUNT] = + { + 0x00000001, 0x00000002, 0x00000004, 0x00000008, + 0x00000010, 0x00000020, 0x00000040, 0x00000080, + 0x00000100, 0x00000200, 0x00000400, 0x00000800, + 0x00001000, 0x00002000, 0x00004000, 0x00008000, + 0x00010000, 0x00020000, 0x00040000, 0x00080000, + 0x00100000, 0x00200000, 0x00400000, 0x00800000, + 0x01000000, 0x02000000, 0x04000000, 0x08000000, + 0x10000000, 0x20000000, 0x40000000, 0x80000000 + }; + + wxASSERT( aLayerNumber < LAYER_COUNT && aLayerNumber >= 0 ); + return( tabOneLayerMask[aLayerNumber] ); +} /* Look up Table for conversion copper layer count -> general copper layer * mask: */ @@ -63,15 +73,6 @@ int g_TabAllCopperLayerMask[NB_COPPER_LAYERS] = { 0x8FFF, 0x9FFF, 0xCFFF, 0xFFFF }; -wxString g_ViaType_Name[4] = { - _( "??? Via" ), // Not used yet, does not exist currently - _( "Micro Via" ), // from external layer (TOP or BOTTOM) from - // the near neighbor inner layer only - _( "Blind/Buried Via" ), // from inner or external to inner or external - // layer (no restriction) - _( "Through Via" ) // Usual via (from TOP to BOTTOM layer only ) -}; - DISPLAY_OPTIONS DisplayOpt; /* Display options for board items */ diff --git a/include/pcbcommon.h b/include/pcbcommon.h index f2d3e15e5f..42170c05de 100644 --- a/include/pcbcommon.h +++ b/include/pcbcommon.h @@ -23,8 +23,12 @@ class BOARD; class DISPLAY_OPTIONS; -/* Look up Table for conversion one layer number -> one bit layer mask: */ -extern int g_TabOneLayerMask[LAYER_COUNT]; +/** + * Function GetLayerMask + * @return a one bit layer mask from a layer number + * @param aLayerNumber = the layer number to convert (0 .. LAYER_COUNT-1) + */ +int GetLayerMask( int aLayerNumber ); /* Look up Table for conversion copper layer count -> general copper layer mask: */ extern int g_TabAllCopperLayerMask[NB_COPPER_LAYERS]; diff --git a/pcbnew/autoplac.cpp b/pcbnew/autoplac.cpp index 36dca0ea3f..6ec406ff38 100644 --- a/pcbnew/autoplac.cpp +++ b/pcbnew/autoplac.cpp @@ -973,10 +973,10 @@ static void CreateKeepOutRectangle( BOARD* Pcb, DIST_CELL data, LocalKeepOut; int lgain, cgain; - if( aLayerMask & g_TabOneLayerMask[Route_Layer_BOTTOM] ) + if( aLayerMask & GetLayerMask( Route_Layer_BOTTOM ) ) trace = 1; /* Trace on bottom layer. */ - if( ( aLayerMask & g_TabOneLayerMask[Route_Layer_TOP] ) && Nb_Sides ) + if( ( aLayerMask & GetLayerMask( Route_Layer_TOP ) ) && Nb_Sides ) trace |= 2; /* Trace on top layer. */ if( trace == 0 ) diff --git a/pcbnew/block.cpp b/pcbnew/block.cpp index 9b4ba99c70..041cc51082 100644 --- a/pcbnew/block.cpp +++ b/pcbnew/block.cpp @@ -441,7 +441,7 @@ void PCB_EDIT_FRAME::Block_SelectItems() switch( PtStruct->Type() ) { case PCB_LINE_T: - if( (g_TabOneLayerMask[PtStruct->GetLayer()] & layerMask) == 0 ) + if( (GetLayerMask( PtStruct->GetLayer() ) & layerMask) == 0 ) break; if( !PtStruct->HitTest( GetScreen()->m_BlockLocate ) ) @@ -461,7 +461,7 @@ void PCB_EDIT_FRAME::Block_SelectItems() break; case PCB_TARGET_T: - if( ( g_TabOneLayerMask[PtStruct->GetLayer()] & layerMask ) == 0 ) + if( ( GetLayerMask( PtStruct->GetLayer() ) & layerMask ) == 0 ) break; if( !PtStruct->HitTest( GetScreen()->m_BlockLocate ) ) @@ -471,7 +471,7 @@ void PCB_EDIT_FRAME::Block_SelectItems() break; case PCB_DIMENSION_T: - if( ( g_TabOneLayerMask[PtStruct->GetLayer()] & layerMask ) == 0 ) + if( ( GetLayerMask( PtStruct->GetLayer() ) & layerMask ) == 0 ) break; if( !PtStruct->HitTest( GetScreen()->m_BlockLocate ) ) diff --git a/pcbnew/board.cpp b/pcbnew/board.cpp index 5a3894500a..b3209eabad 100644 --- a/pcbnew/board.cpp +++ b/pcbnew/board.cpp @@ -303,7 +303,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag ) ux0 -= dx; uy0 -= dy; - layerMask = g_TabOneLayerMask[PtText->GetLayer()]; + layerMask = GetLayerMask( PtText->GetLayer() ); TraceFilledRectangle( aPcb, ux0 - marge, uy0 - marge, ux1 + marge, uy1 + marge, (int) (PtText->m_Orient), diff --git a/pcbnew/class_board.cpp b/pcbnew/class_board.cpp index b852d9fe3b..1a3546465e 100644 --- a/pcbnew/class_board.cpp +++ b/pcbnew/class_board.cpp @@ -1618,7 +1618,7 @@ D_PAD* BOARD::GetPad( TRACK* aTrace, int aEndPoint ) D_PAD* pad = NULL; wxPoint aPosition; - int aLayerMask = g_TabOneLayerMask[aTrace->GetLayer()]; + int aLayerMask = GetLayerMask( aTrace->GetLayer() ); if( aEndPoint == START ) { @@ -1783,7 +1783,7 @@ TRACK* BOARD::GetTrace( TRACK* aTrace, const wxPoint& aPosition, int aLayerMask } else { - if( (g_TabOneLayerMask[layer] & aLayerMask) == 0 ) + if( (GetLayerMask( layer ) & aLayerMask) == 0 ) continue; /* Segments on different layers. */ if( track->HitTest( aPosition ) ) diff --git a/pcbnew/class_track.cpp b/pcbnew/class_track.cpp index 85deee363e..8bdd03753f 100644 --- a/pcbnew/class_track.cpp +++ b/pcbnew/class_track.cpp @@ -467,14 +467,14 @@ int TRACK::ReturnMaskLayer() const while( bottom_layer <= top_layer ) { - layermask |= g_TabOneLayerMask[bottom_layer++]; + layermask |= GetLayerMask( bottom_layer++ ); } return layermask; } else { - return g_TabOneLayerMask[m_Layer]; + return GetLayerMask( m_Layer ); } } @@ -1059,7 +1059,27 @@ void TRACK::DisplayInfoBase( EDA_DRAW_FRAME* frame ) switch( Type() ) { case PCB_VIA_T: - msg = g_ViaType_Name[Shape()]; + switch( Shape() ) + { + default: + case 0: + msg = _( "??? Via" ); // Not used yet, does not exist currently + break; + + case 1: + msg = _( "Micro Via" ); // from external layer (TOP or BOTTOM) from + // the near neighbor inner layer only + break; + + case 2: + msg = _( "Blind/Buried Via" ); // from inner or external to inner + // or external layer (no restriction) + break; + + case 3: + msg = _( "Through Via" ); // Usual via (from TOP to BOTTOM layer only ) + break; + } break; case PCB_TRACE_T: diff --git a/pcbnew/dialogs/dialog_global_deletion.cpp b/pcbnew/dialogs/dialog_global_deletion.cpp index 6266ecd0ed..b5838b4cbf 100644 --- a/pcbnew/dialogs/dialog_global_deletion.cpp +++ b/pcbnew/dialogs/dialog_global_deletion.cpp @@ -85,7 +85,7 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete( ) for( item = pcb->m_Drawings; item != NULL; item = nextitem ) { nextitem = item->Next(); - bool removeme = (g_TabOneLayerMask[ item->GetLayer()] & masque_layer) != 0; + bool removeme = (GetLayerMask( item->GetLayer() ) & masque_layer) != 0; if( ( item->Type() == PCB_TEXT_T ) && m_DelTexts->GetValue() ) removeme = true; diff --git a/pcbnew/editrack.cpp b/pcbnew/editrack.cpp index 8569b2ba64..799db4c376 100644 --- a/pcbnew/editrack.cpp +++ b/pcbnew/editrack.cpp @@ -96,7 +96,7 @@ static void Abort_Create_Track( EDA_DRAW_PANEL* Panel, wxDC* DC ) TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC ) { TRACK* TrackOnStartPoint = NULL; - int layerMask = g_TabOneLayerMask[( (PCB_SCREEN*) GetScreen() )->m_Active_Layer]; + int layerMask = GetLayerMask( GetScreen()->m_Active_Layer ); BOARD_CONNECTED_ITEM* LockPoint; wxPoint pos = GetScreen()->GetCrossHairPosition(); @@ -269,7 +269,7 @@ TRACK* PCB_EDIT_FRAME::Begin_Route( TRACK* aTrack, wxDC* aDC ) newTrack->m_Start = newTrack->m_End; - newTrack->SetLayer( ( (PCB_SCREEN*) GetScreen() )->m_Active_Layer ); + newTrack->SetLayer( GetScreen()->m_Active_Layer ); if( !GetBoard()->GetDesignSettings().m_UseConnectedTrackWidth ) newTrack->m_Width = GetBoard()->GetCurrentTrackWidth(); @@ -403,7 +403,7 @@ bool PCB_EDIT_FRAME::Add45DegreeSegment( wxDC* aDC ) bool PCB_EDIT_FRAME::End_Route( TRACK* aTrack, wxDC* aDC ) { - int layerMask = g_TabOneLayerMask[( (PCB_SCREEN*) GetScreen() )->m_Active_Layer]; + int layerMask = GetLayerMask( GetScreen()->m_Active_Layer ); if( aTrack == NULL ) return false; diff --git a/pcbnew/graphpcb.cpp b/pcbnew/graphpcb.cpp index 1dca269194..b66cc347ba 100644 --- a/pcbnew/graphpcb.cpp +++ b/pcbnew/graphpcb.cpp @@ -163,10 +163,10 @@ void TraceFilledCircle( BOARD* Pcb, /* Single routing layer on bitmap and BOTTOM * Route_Layer_B = Route_Layer_A */ - if( aLayerMask & g_TabOneLayerMask[Route_Layer_BOTTOM] ) + if( aLayerMask & GetLayerMask( Route_Layer_BOTTOM ) ) trace = 1; /* Trace on BOTTOM */ - if( aLayerMask & g_TabOneLayerMask[Route_Layer_TOP] ) + if( aLayerMask & GetLayerMask( Route_Layer_TOP ) ) if( Nb_Sides ) trace |= 2; /* Trace on TOP */ @@ -525,10 +525,10 @@ void TraceFilledRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, int uy1, void (* WriteCell)( int, int, int, MATRIX_CELL ); - if( aLayerMask & g_TabOneLayerMask[Route_Layer_BOTTOM] ) + if( ( aLayerMask & GetLayerMask( Route_Layer_BOTTOM ) ) ) trace = 1; /* Trace on BOTTOM */ - if( ( aLayerMask & g_TabOneLayerMask[Route_Layer_TOP] ) && Nb_Sides ) + if( ( aLayerMask & GetLayerMask( Route_Layer_TOP ) ) && Nb_Sides ) trace |= 2; /* Trace on TOP */ if( trace == 0 ) @@ -614,10 +614,10 @@ void TraceFilledRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, int uy1, void (* WriteCell)( int, int, int, MATRIX_CELL ); - if( aLayerMask & g_TabOneLayerMask[Route_Layer_BOTTOM] ) + if( aLayerMask & GetLayerMask( Route_Layer_BOTTOM ) ) trace = 1; /* Trace on BOTTOM */ - if( aLayerMask & g_TabOneLayerMask[Route_Layer_TOP] ) + if( aLayerMask & GetLayerMask( Route_Layer_TOP ) ) { if( Nb_Sides ) trace |= 2; /* Trace on TOP */ diff --git a/pcbnew/kicad_plugin.cpp b/pcbnew/kicad_plugin.cpp index feb1707beb..f13485bd41 100644 --- a/pcbnew/kicad_plugin.cpp +++ b/pcbnew/kicad_plugin.cpp @@ -306,7 +306,7 @@ void KICAD_PLUGIN::loadAllSections( bool doAppend ) */ } - THROW_IO_ERROR( "Missing '$EndBOARD'" ); + THROW_IO_ERROR( wxT("Missing '$EndBOARD'") ); } diff --git a/pcbnew/magnetic_tracks_functions.cpp b/pcbnew/magnetic_tracks_functions.cpp index a9e4791471..59ce1ab391 100644 --- a/pcbnew/magnetic_tracks_functions.cpp +++ b/pcbnew/magnetic_tracks_functions.cpp @@ -157,7 +157,7 @@ bool Magnetize( BOARD* m_Pcb, PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize gr if( doPad ) { - int layer_mask = g_TabOneLayerMask[screen->m_Active_Layer]; + int layer_mask = GetLayerMask( screen->m_Active_Layer ); D_PAD* pad = m_Pcb->GetPad( pos, layer_mask ); if( pad ) @@ -196,7 +196,7 @@ bool Magnetize( BOARD* m_Pcb, PCB_EDIT_FRAME* frame, int aCurrentTool, wxSize gr if( !currTrack ) { - int layer_mask = g_TabOneLayerMask[layer]; + int layer_mask = GetLayerMask( layer ); TRACK* track = m_Pcb->GetTrace( m_Pcb->m_Track, pos, layer_mask ); diff --git a/pcbnew/move_or_drag_track.cpp b/pcbnew/move_or_drag_track.cpp index 74d0a08aed..7cadded07d 100644 --- a/pcbnew/move_or_drag_track.cpp +++ b/pcbnew/move_or_drag_track.cpp @@ -1034,7 +1034,7 @@ bool PCB_EDIT_FRAME::PlaceDraggedOrMovedTrackSegment( TRACK* Track, wxDC* DC ) /* Test the connections modified by the move * (only pad connection must be tested, track connection will be * tested by TestNetConnection() ) */ - int layerMask = g_TabOneLayerMask[Track->GetLayer()]; + int layerMask = GetLayerMask( Track->GetLayer() ); Track->start = GetBoard()->GetPadFast( Track->m_Start, layerMask ); if( Track->start ) diff --git a/pcbnew/muonde.cpp b/pcbnew/muonde.cpp index 6cba5d2d9c..bc56d8120f 100644 --- a/pcbnew/muonde.cpp +++ b/pcbnew/muonde.cpp @@ -263,7 +263,7 @@ MODULE* PCB_EDIT_FRAME::Genere_Self( wxDC* DC ) PtPad->m_Pos = Mself.m_End; PtPad->m_Pos0 = PtPad->m_Pos - Module->m_Pos; PtPad->m_Size.x = PtPad->m_Size.y = Mself.m_Width; - PtPad->m_layerMask = g_TabOneLayerMask[Module->GetLayer()]; + PtPad->m_layerMask = GetLayerMask( Module->GetLayer() ); PtPad->m_Attribut = PAD_SMD; PtPad->m_PadShape = PAD_CIRCLE; PtPad->ComputeShapeMaxRadius(); diff --git a/pcbnew/plot_rtn.cpp b/pcbnew/plot_rtn.cpp index ad76580e4d..f780dfc32d 100644 --- a/pcbnew/plot_rtn.cpp +++ b/pcbnew/plot_rtn.cpp @@ -271,7 +271,7 @@ void PlotDimension( PLOTTER* plotter, DIMENSION* Dimension, int aLayerMask, { DRAWSEGMENT* DrawTmp; - if( (g_TabOneLayerMask[Dimension->GetLayer()] & aLayerMask) == 0 ) + if( (GetLayerMask( Dimension->GetLayer() ) & aLayerMask) == 0 ) return; DrawTmp = new DRAWSEGMENT( NULL ); @@ -332,7 +332,7 @@ void PlotPcbTarget( PLOTTER* plotter, PCB_TARGET* Mire, int aLayerMask, GRTraceM DRAWSEGMENT* DrawTmp; int dx1, dx2, dy1, dy2, radius; - if( (g_TabOneLayerMask[Mire->GetLayer()] & aLayerMask) == 0 ) + if( (GetLayerMask( Mire->GetLayer() ) & aLayerMask) == 0 ) return; DrawTmp = new DRAWSEGMENT( NULL ); @@ -389,7 +389,7 @@ void Plot_Edges_Modules( PLOTTER* plotter, BOARD* pcb, int aLayerMask, GRTraceMo if( edge->Type() != PCB_MODULE_EDGE_T ) continue; - if( ( g_TabOneLayerMask[edge->GetLayer()] & aLayerMask ) == 0 ) + if( ( GetLayerMask( edge->GetLayer() ) & aLayerMask ) == 0 ) continue; Plot_1_EdgeModule( plotter, edge, trace_mode ); @@ -485,7 +485,7 @@ void PlotTextePcb( PLOTTER* plotter, TEXTE_PCB* pt_texte, int aLayerMask, GRTrac if( pt_texte->m_Text.IsEmpty() ) return; - if( ( g_TabOneLayerMask[pt_texte->GetLayer()] & aLayerMask ) == 0 ) + if( ( GetLayerMask( pt_texte->GetLayer() ) & aLayerMask ) == 0 ) return; size = pt_texte->m_Size; @@ -620,7 +620,7 @@ void PlotDrawSegment( PLOTTER* plotter, DRAWSEGMENT* pt_segm, int aLayerMask, int thickness; int radius = 0, StAngle = 0, EndAngle = 0; - if( (g_TabOneLayerMask[pt_segm->GetLayer()] & aLayerMask) == 0 ) + if( (GetLayerMask( pt_segm->GetLayer() ) & aLayerMask) == 0 ) return; if( trace_mode == FILAIRE ) @@ -670,7 +670,7 @@ void PCB_BASE_FRAME::Plot_Layer( PLOTTER* plotter, int Layer, GRTraceMode trace_ { // Specify that the contents of the "Edges Pcb" layer are to be plotted // in addition to the contents of the currently specified layer. - int layer_mask = g_TabOneLayerMask[Layer]; + int layer_mask = GetLayerMask( Layer ); if( !g_PcbPlotOptions.m_ExcludeEdgeLayer ) layer_mask |= EDGE_LAYER; @@ -728,11 +728,11 @@ void PCB_BASE_FRAME::Plot_Layer( PLOTTER* plotter, int Layer, GRTraceMode trace_ { if( Layer == SILKSCREEN_N_FRONT ) { - layer_mask = g_TabOneLayerMask[SOLDERMASK_N_FRONT]; + layer_mask = GetLayerMask( SOLDERMASK_N_FRONT ); } else { - layer_mask = g_TabOneLayerMask[SOLDERMASK_N_BACK]; + layer_mask = GetLayerMask( SOLDERMASK_N_BACK ); } // Set layer polarity to negative @@ -802,7 +802,7 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter, switch( item->Type() ) { case PCB_MODULE_EDGE_T: - if( aLayerMask & g_TabOneLayerMask[ item->GetLayer() ] ) + if( aLayerMask & GetLayerMask( item->GetLayer() ) ) Plot_1_EdgeModule( aPlotter, (EDGE_MODULE*) item, aPlotMode ); break; @@ -938,7 +938,7 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter, if( track->Type() == PCB_VIA_T ) continue; - if( (g_TabOneLayerMask[track->GetLayer()] & aLayerMask) == 0 ) + if( (GetLayerMask( track->GetLayer() ) & aLayerMask) == 0 ) continue; size.x = size.y = track->m_Width; @@ -953,7 +953,7 @@ void PCB_BASE_FRAME::Plot_Standard_Layer( PLOTTER* aPlotter, { wxPoint end; - if( (g_TabOneLayerMask[track->GetLayer()] & aLayerMask) == 0 ) + if( (GetLayerMask( track->GetLayer() ) & aLayerMask) == 0 ) continue; size.x = size.y = track->m_Width; diff --git a/pcbnew/print_board_functions.cpp b/pcbnew/print_board_functions.cpp index 5887f5bd76..1771a01331 100644 --- a/pcbnew/print_board_functions.cpp +++ b/pcbnew/print_board_functions.cpp @@ -373,7 +373,7 @@ static void Print_Module( EDA_DRAW_PANEL* aPanel, wxDC* aDC, MODULE* aModule, /* Print footprint graphic shapes */ PtStruct = aModule->m_Drawings; - mlayer = g_TabOneLayerMask[aModule->GetLayer()]; + mlayer = GetLayerMask( aModule->GetLayer() ); if( aModule->GetLayer() == LAYER_N_BACK ) mlayer = SILKSCREEN_LAYER_BACK; @@ -405,7 +405,7 @@ static void Print_Module( EDA_DRAW_PANEL* aPanel, wxDC* aDC, MODULE* aModule, { EDGE_MODULE* edge = (EDGE_MODULE*) PtStruct; - if( ( g_TabOneLayerMask[edge->GetLayer()] & aMasklayer ) == 0 ) + if( ( GetLayerMask( edge->GetLayer() ) & aMasklayer ) == 0 ) break; edge->Draw( aPanel, aDC, aDraw_mode ); diff --git a/pcbnew/sel_layer.cpp b/pcbnew/sel_layer.cpp index 588f1c238c..4d0c043794 100644 --- a/pcbnew/sel_layer.cpp +++ b/pcbnew/sel_layer.cpp @@ -114,7 +114,7 @@ SELECT_LAYER_DIALOG::SELECT_LAYER_DIALOG( PCB_BASE_FRAME* parent, { m_LayerId[ii] = 0; - if( g_TabOneLayerMask[ii] & Masque_Layer ) + if( GetLayerMask( ii ) & Masque_Layer ) { if( min_layer > ii ) continue; @@ -270,7 +270,7 @@ SELECT_LAYERS_PAIR_DIALOG::SELECT_LAYERS_PAIR_DIALOG( PCB_BASE_FRAME* parent ) : { m_LayerId[ii] = 0; - if( (g_TabOneLayerMask[ii] & Masque_Layer) ) + if( (GetLayerMask( ii ) & Masque_Layer) ) { LayerList[LayerCount] = board->GetLayerName( ii ); diff --git a/pcbnew/solve.cpp b/pcbnew/solve.cpp index 36df0a9a7d..47221d958e 100644 --- a/pcbnew/solve.cpp +++ b/pcbnew/solve.cpp @@ -412,8 +412,8 @@ static int Autoroute_One_Track( PCB_EDIT_FRAME* pcbframe, int marge; int padLayerMaskStart; /* Mask layers belonging to the starting pad. */ int padLayerMaskEnd; /* Mask layers belonging to the ending pad. */ - int topLayerMask = g_TabOneLayerMask[Route_Layer_TOP]; - int bottomLayerMask = g_TabOneLayerMask[Route_Layer_BOTTOM]; + int topLayerMask = GetLayerMask( Route_Layer_TOP ); + int bottomLayerMask = GetLayerMask( Route_Layer_BOTTOM ); int routeLayerMask; /* Mask two layers for routing. */ int tab_mask[2]; /* Enables the calculation of the mask layer being * tested. (side = TOP or BOTTOM) */