diff --git a/common/executable_names.cpp b/common/executable_names.cpp
index f5475c5919..8a4f6f090e 100644
--- a/common/executable_names.cpp
+++ b/common/executable_names.cpp
@@ -26,7 +26,6 @@
 
 #include <executable_names.h>
 
-// TODO Executable names TODO
 #ifdef __WINDOWS__
 const wxString CVPCB_EXE           ( "cvpcb.exe" );
 const wxString PCBNEW_EXE          ( "pcbnew.exe" );
diff --git a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp
index 2e1a142c62..7952c48219 100644
--- a/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp
+++ b/pcbnew/drc/drc_test_provider_courtyard_clearance.cpp
@@ -38,9 +38,6 @@
     - DRCE_MALFORMED_COURTYARD
     - DRCE_PTH_IN_COURTYARD,
     - DRCE_NPTH_IN_COURTYARD,
-
-    TODO: do an actual clearance check instead of polygon intersection. Treat closed outlines
-    as filled and allow open curves in the courtyard.
 */
 
 class DRC_TEST_PROVIDER_COURTYARD_CLEARANCE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
diff --git a/pcbnew/drc/drc_test_provider_hole_to_hole.cpp b/pcbnew/drc/drc_test_provider_hole_to_hole.cpp
index 5bbfe8e4d9..8f94c8d973 100644
--- a/pcbnew/drc/drc_test_provider_hole_to_hole.cpp
+++ b/pcbnew/drc/drc_test_provider_hole_to_hole.cpp
@@ -39,8 +39,6 @@
     Generated errors:
     - DRCE_DRILLED_HOLES_TOO_CLOSE
     - DRCE_DRILLED_HOLES_COLOCATED
-
-    TODO: vias-in-smd-pads check
 */
 
 class DRC_TEST_PROVIDER_HOLE_TO_HOLE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
diff --git a/pcbnew/pcb_track.h b/pcbnew/pcb_track.h
index 03252cd423..409727f4a0 100644
--- a/pcbnew/pcb_track.h
+++ b/pcbnew/pcb_track.h
@@ -295,8 +295,6 @@ public:
     // @copydoc BOARD_ITEM::GetEffectiveShape
     virtual std::shared_ptr<SHAPE> GetEffectiveShape( PCB_LAYER_ID aLayer = UNDEFINED_LAYER ) const override;
 
-    //TODO(snh): Add GetSelectMenuText() and GetMsgPanelInfoBase()
-
     /**
      * Function GetLength
      * returns the length of the arc track
diff --git a/pcbnew/pcbnew_printout.cpp b/pcbnew/pcbnew_printout.cpp
index 9d858296c2..b53b483285 100644
--- a/pcbnew/pcbnew_printout.cpp
+++ b/pcbnew/pcbnew_printout.cpp
@@ -302,7 +302,6 @@ int KIGFX::PCB_PRINT_PAINTER::getDrillShape( const PAD* aPad ) const
 
 VECTOR2D KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PAD* aPad ) const
 {
-    // TODO should it depend on the pad size?
     return m_drillMarkReal ? KIGFX::PCB_PAINTER::getDrillSize( aPad ) :
         VECTOR2D( m_drillMarkSize, m_drillMarkSize );
 }
@@ -310,6 +309,5 @@ VECTOR2D KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PAD* aPad ) const
 
 int KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PCB_VIA* aVia ) const
 {
-    // TODO should it depend on the via size?
     return m_drillMarkReal ? KIGFX::PCB_PAINTER::getDrillSize( aVia ) : m_drillMarkSize;
 }
diff --git a/pcbnew/router/pns_kicad_iface.cpp b/pcbnew/router/pns_kicad_iface.cpp
index 2059db84b0..d858d62ef4 100644
--- a/pcbnew/router/pns_kicad_iface.cpp
+++ b/pcbnew/router/pns_kicad_iface.cpp
@@ -33,6 +33,9 @@
 #include <layer_ids.h>
 #include <geometry/convex_hull.h>
 #include <confirm.h>
+#include <tools/pcb_tool_base.h>
+#include <tool/tool_manager.h>
+#include <settings/app_settings.h>
 
 #include <pcb_painter.h>
 
@@ -1046,7 +1049,6 @@ bool PNS_KICAD_IFACE_BASE::syncZone( PNS::NODE* aWorld, ZONE* aZone, SHAPE_POLY_
         return false;
 
     LSET      layers = aZone->GetLayerSet();
-    EDA_UNITS units = EDA_UNITS::MILLIMETRES;       // TODO: get real units
 
     poly = aZone->Outline();
     poly->CacheTriangulation( false );
@@ -1054,7 +1056,7 @@ bool PNS_KICAD_IFACE_BASE::syncZone( PNS::NODE* aWorld, ZONE* aZone, SHAPE_POLY_
     if( !poly->IsTriangulationUpToDate() )
     {
         KIDIALOG dlg( nullptr, wxString::Format( _( "%s is malformed." ),
-                                                 aZone->GetSelectMenuText( units ) ),
+                                                 aZone->GetSelectMenuText( GetUnits() ) ),
                       KIDIALOG::KD_WARNING );
         dlg.ShowDetailedText( wxString::Format( _( "This zone cannot be handled by the router.\n"
                                                    "Please verify it is not a self-intersecting "
@@ -1672,6 +1674,12 @@ void PNS_KICAD_IFACE::Commit()
 }
 
 
+EDA_UNITS PNS_KICAD_IFACE::GetUnits() const
+{
+    return static_cast<EDA_UNITS>( m_tool->GetManager()->GetSettings()->m_System.units );
+}
+
+
 void PNS_KICAD_IFACE::SetView( KIGFX::VIEW* aView )
 {
     wxLogTrace( "PNS", "SetView %p", aView );
@@ -1704,7 +1712,6 @@ void PNS_KICAD_IFACE::SetView( KIGFX::VIEW* aView )
 void PNS_KICAD_IFACE::UpdateNet( int aNetCode )
 {
     wxLogTrace( "PNS", "Update-net %d", aNetCode );
-
 }
 
 
diff --git a/pcbnew/router/pns_kicad_iface.h b/pcbnew/router/pns_kicad_iface.h
index 51d5cc36ea..f959fc68f8 100644
--- a/pcbnew/router/pns_kicad_iface.h
+++ b/pcbnew/router/pns_kicad_iface.h
@@ -74,15 +74,11 @@ public:
 
     void SetStartLayer( int aLayer ) { m_startLayer = aLayer; }
 
-    virtual PNS::NODE* GetWorld() const override
-    {
-        return m_world;
-    };
+    virtual PNS::NODE* GetWorld() const override { return m_world; };
 
-    BOARD* GetBoard() const
-    {
-        return m_board;
-    }
+    BOARD* GetBoard() const { return m_board; }
+
+    virtual EDA_UNITS GetUnits() const { return EDA_UNITS::MILLIMETRES; };
 
     PNS::RULE_RESOLVER* GetRuleResolver() override;
     PNS::DEBUG_DECORATOR* GetDebugDecorator() override;
@@ -130,6 +126,7 @@ public:
 
     void UpdateNet( int aNetCode ) override;
 
+    EDA_UNITS GetUnits() const override;
 
 private:
     struct OFFSET
diff --git a/pcbnew/tools/drawing_tool.cpp b/pcbnew/tools/drawing_tool.cpp
index de6dd5a383..da801e27ae 100644
--- a/pcbnew/tools/drawing_tool.cpp
+++ b/pcbnew/tools/drawing_tool.cpp
@@ -611,8 +611,6 @@ int DRAWING_TOOL::PlaceText( const TOOL_EVENT& aEvent )
                 else
                 {
                     PCB_TEXT* pcbText = new PCB_TEXT( m_frame->GetModel() );
-                    // TODO we have to set IS_NEW, otherwise InstallTextPCB.. creates an
-                    // undo entry :| LEGACY_CLEANUP
                     pcbText->SetFlags( IS_NEW );
 
                     pcbText->SetLayer( layer );
diff --git a/pcbnew/zone.cpp b/pcbnew/zone.cpp
index 9fea552d8d..d18804e2c7 100644
--- a/pcbnew/zone.cpp
+++ b/pcbnew/zone.cpp
@@ -626,15 +626,8 @@ void ZONE::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PANEL_ITEM>&
 
     PCB_LAYER_ID layer = m_layer;
 
-    // NOTE: This brings in dependence on PCB_EDIT_FRAME to the qa tests, which isn't ideal.
-    // TODO: Figure out a way for items to know the active layer without the whole edit frame?
-#if 0
-    if( PCB_EDIT_FRAME* pcbframe = dynamic_cast<PCB_EDIT_FRAME*>( aFrame ) )
-    {
-        if( m_FilledPolysList.count( pcbframe->GetActiveLayer() ) )
-            layer = pcbframe->GetActiveLayer();
-    }
-#endif
+    if( dynamic_cast<PCB_SCREEN*>( aFrame->GetScreen() ) )
+        layer = dynamic_cast<PCB_SCREEN*>( aFrame->GetScreen() )->m_Active_Layer;
 
     if( !GetIsRuleArea() )
     {