From fd6c9c768577f0a96fe236ccda4ec46e13b0b3af Mon Sep 17 00:00:00 2001
From: jean-pierre charras <jp.charras@wanadoo.fr>
Date: Wed, 22 Apr 2020 10:43:28 +0200
Subject: [PATCH] kicad2step: fix a bug when the board has no hole. kicad2step
 was trying to remove an empty hole list, generating a OCC error.

Fixes #4242
https://gitlab.com/kicad/code/kicad/issues/x4242
---
 utils/kicad2step/pcb/kicadmodule.cpp |  2 +-
 utils/kicad2step/pcb/kicadpcb.cpp    | 13 ++++++++-----
 utils/kicad2step/pcb/oce_utils.cpp   |  3 ++-
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/utils/kicad2step/pcb/kicadmodule.cpp b/utils/kicad2step/pcb/kicadmodule.cpp
index 8b72322dbf..4f5390ddf9 100644
--- a/utils/kicad2step/pcb/kicadmodule.cpp
+++ b/utils/kicad2step/pcb/kicadmodule.cpp
@@ -312,7 +312,7 @@ bool KICADMODULE::ComposePCB( class PCBMODEL* aPCB, S3D_RESOLVER* resolver,
     double posX = m_position.x - aOrigin.x;
     double posY = m_position.y - aOrigin.y;
 
-    for( auto i : m_curves )
+    for( KICADCURVE* i : m_curves )
     {
         if( i->m_layer != LAYER_EDGE || CURVE_NONE == i->m_form )
             continue;
diff --git a/utils/kicad2step/pcb/kicadpcb.cpp b/utils/kicad2step/pcb/kicadpcb.cpp
index 7e3690a054..0cc44e55d7 100644
--- a/utils/kicad2step/pcb/kicadpcb.cpp
+++ b/utils/kicad2step/pcb/kicadpcb.cpp
@@ -320,7 +320,8 @@ bool KICADPCB::parseSetup( SEXPR::SEXPR* data )
 
         if( !child->IsList() )
         {
-            ReportMessage( wxString::Format( "corrupt PCB file (line %d)\n", child->GetLineNumber() ) );
+            ReportMessage( wxString::Format(
+                           "corrupt PCB file (line %d)\n", child->GetLineNumber() ) );
             return false;
         }
 
@@ -330,8 +331,9 @@ bool KICADPCB::parseSetup( SEXPR::SEXPR* data )
         {
             if( child->GetNumberOfChildren() != 3 )
             {
-                ReportMessage( wxString::Format( "corrupt PCB file (line %d): grid_origin has %d children (expected: 3)\n",
-                       child->GetLineNumber(), child->GetNumberOfChildren() ) );
+                ReportMessage( wxString::Format(
+                               "corrupt PCB file (line %d): grid_origin has %d children (expected: 3)\n",
+                               child->GetLineNumber(), child->GetNumberOfChildren() ) );
                 return false;
             }
 
@@ -343,8 +345,9 @@ bool KICADPCB::parseSetup( SEXPR::SEXPR* data )
         {
             if( child->GetNumberOfChildren() != 3 )
             {
-                ReportMessage( wxString::Format( "corrupt PCB file (line %d)m: aux_axis_origin has %d children (expected: 3)\n",
-                                          child->GetLineNumber(), child->GetNumberOfChildren() ) );
+                ReportMessage( wxString::Format(
+                               "corrupt PCB file (line %d)m: aux_axis_origin has %d children (expected: 3)\n",
+                               child->GetLineNumber(), child->GetNumberOfChildren() ) );
                 return false;
             }
 
diff --git a/utils/kicad2step/pcb/oce_utils.cpp b/utils/kicad2step/pcb/oce_utils.cpp
index 3865e0fd51..9ef7c3c043 100644
--- a/utils/kicad2step/pcb/oce_utils.cpp
+++ b/utils/kicad2step/pcb/oce_utils.cpp
@@ -260,7 +260,6 @@ bool PCBMODEL::AddOutlineSegment( KICADCURVE* aCurve )
             ReportMessage( msg );
             return false;
         }
-
     }
     else
     {
@@ -778,6 +777,7 @@ bool PCBMODEL::CreatePCB()
         }
     }
 #else   // Much faster than first version: group all holes and cut only once
+    if( m_cutouts.size() )
     {
         BRepAlgoAPI_Cut Cut;
         TopTools_ListOfShape mainbrd;
@@ -794,6 +794,7 @@ bool PCBMODEL::CreatePCB()
         board = Cut.Shape();
     }
 #endif
+
     // push the board to the data structure
     ReportMessage( "\nGenerate board full shape\n" );
     m_pcb_label = m_assy->AddComponent( m_assy_label, board );