6b915049d1
Check singular arcs connection
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Even if there are no other segments in the line chain, we still should
check for arc connections in cases of individual arcs on a line chain
2024-03-22 10:41:42 -07:00
543343b7d1
prettifier: add newlines to golden samples
2024-03-18 16:03:09 -04:00
96ea1f6f89
Revert change to prettifier QA data
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The file format should not be bumped in these test cases, they are not a test of the file format writer.
2024-02-25 12:50:44 -05:00
ee3be0802c
Move PCBNew overrides to nullable properties.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/5562
2024-02-24 20:05:51 +00:00
27c253780d
Separate out Pad_Shape so auto-complete can work.
2024-01-10 19:22:05 +00:00
104aa1abe4
Change prettifier QA to not depend on file format changes
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Instead of writing out and reading back in using the plugin,
just test the formatter itself.
Also add support for testing full boards.
2024-01-01 13:38:16 -05:00
58b7eda47a
QA test( test_prettifier) update golden files and fix a warning message.
2024-01-01 10:57:32 +01:00
751c88ef20
Use 'uuid' (not 'id') in the s-expr PCB groups/generator format
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Add some regression tests to check loading of groups and generators
from various versions of the s-expr PCB format.
2023-12-31 23:09:26 +00:00
8e647c24b4
QA test, prettifier: Update golden files to the latest version.
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Add also a warning when a golden file is too old and creates comparison error.
2023-12-16 10:49:23 +01:00
e41f5efb03
Use modern bool style for footprint locking (locked yes)
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Add some simple tests for specific footprint load/save checks
(including round-trip stability)
2023-12-14 21:22:59 +00:00
481fa1f959
Allow PCB reference image locking and UUID to be saved
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Add some unit tests for reference image saving/loading.
Fixes: https://gitlab.com/kicad/code/kicad/-/issues/16334
2023-12-14 21:22:59 +00:00
ae66ce68b5
Update testcases for generator_version
2023-11-29 16:17:41 +00:00
f1f8981395
Automatic whitespace and indentation prettification for sexpr formats
2023-11-29 16:17:41 +00:00
9e48b388fe
Add additional QA sliver check
2023-11-28 16:02:39 -08:00
75c6b0ab28
Added IPC2581 support
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IPC2581 is a modern production file exchange system. It provides
single-file data output for an entire board including BOM and netlist
information.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/1954
2023-11-26 15:30:58 -08:00
a6b517147e
QA: update Tracks.pretty
2023-11-06 17:16:16 +03:00
6e4473855b
QA: update golden files for EAGLE SparkFun-GPS.lbr
2023-10-15 03:28:25 +03:00
e6f0a3d91b
QA: add test files for EasyEDA.
2023-09-07 11:02:40 +03:00
41e274684c
Make sure pads with no net get assigned Default netclass on board open.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/15562
2023-09-02 10:11:38 +01:00
c2a91caacf
altium: verify that file contains "Compound File Binary Format" magic bytes, as we do not support the ASCII format
2023-08-18 14:47:08 +02:00
f2a8c25084
Update Eagle gold files for spoke angle fixes.
2023-08-16 23:21:18 +01:00
8d5ebf5e30
QA: Add dummy board files (should fail header checks)
2023-08-15 05:26:12 +03:00
fb3e8ef8f1
QA: Add example P-CAD file
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Supplied by evanshultz in gitlab issue 3993
2023-08-15 05:26:12 +03:00
0b0c50471a
QA: Add example KiCad legacy PCB files
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legacy_demos based on commit e4fdce4a47
2023-08-15 05:26:12 +03:00
1c95762534
QA: Add example EAGLE PCB file - Adafruit-AHT20-PCB
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Source: https://github.com/adafruit/Adafruit-AHT20-PCB
2023-08-15 05:26:12 +03:00
87959a4625
QA: Add simple CADSTAR PCB file
2023-08-15 05:26:12 +03:00
1cbef0157d
Avoid edge cases on very wide thermal spokes.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/15280
2023-08-04 15:38:06 +01:00
96a34e5b57
Consolidate Maximum clearance calculation
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We were calculating the same thing in three locations and we missed
adding the clearance from the footprints in, resulting in bad fills and
missed drc errors (see QA addition)
2023-07-26 12:55:48 -07:00
a343cd0a24
Try to fix a QA issue (disable useless DRC tests for 2 boards)
2023-07-23 13:08:59 +02:00
b827073b3f
Update one more board to deal with changed default net clearance
2023-07-19 17:30:48 -07:00
45ed38a63b
Update qa tests to use new zone fill algo
2023-07-19 16:13:49 -07:00
998e749918
Move some DRC regression tests
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The RegressionZoneFillTests handle issues that are resolved by the zone
filler, so Clipper2 problematic fill belongs there. Otherwise, the
remaining tests should not refill the zones before running DRC because
we expect the DRC to catch errors without needing a refill
2023-07-07 11:52:25 -07:00
954b265839
Check for zone-zone overlap
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Instead of just checking for the zone outline, we adjust to check the
full fill area of the zones for intersection and overlaps
2023-07-07 11:52:25 -07:00
dd83217062
Add DRC testing for copper graphic to zone fill collisions.
2023-06-30 14:04:20 +01:00
86abfd2cef
Update a golden file in Eagle QA tests
2023-05-31 11:52:50 +02:00
bb90aa24b7
Add basic QA test to CADSTAR PCB footprint import
2023-05-29 23:29:28 +02:00
8bd21edd8a
Fix capitalization of text vars for Eagle importer.
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Also fixes the test gold files to expect the correct variable
references.
2023-05-06 23:49:10 +01:00
f7f52d77e4
Rework Copper Sliver check
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Adds QA checks to copper sliver tests. Adds the following checks:
- Dot product between two arms (quickly avoids checks for >90°)
- Checks the sliver is convex (area test)
- Eliminates minor slivers with angles that are approximately 0 and ones
with the opposite side width beneath a configurable level
- Updates Clipper2 to fix a couple of jagged edges on inflate
- Adds simplify during zone fill inflation to limit jaggies
Fixes https://gitlab.com/kicad/code/kicad/issues/14549
2023-04-25 10:32:46 -07:00
30b3645e60
Add regression test for 14412.
2023-03-25 16:13:45 +00:00
e65a58b823
Add regression test for 14334.
2023-03-25 12:45:36 +00:00
8150deec32
Add QA test for Clipper2 fill
2023-03-22 15:24:46 -07:00
914b5a4d21
Simplify test for substantial nubs
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Substantial elements following a divot should be at least as far in each
cardinal direction from the origin point in order to be considered
substantial. This catches cases where the "substantial" element is
actually a straight segment away from the divot
Fixes https://gitlab.com/kicad/code/kicad/issues/14130
2023-03-22 13:01:50 -07:00
7653a2bf99
Smarten connection width checker looking for splits
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Fractured polygons are always fractured along the x-axis, so when
checking to see if a segment is a fracture point, we check if the y
coordinate is equal. This avoids situations where there are multiple
fracture points between two inflection points
Additionally, we add a second check to ensure we don't hit spurious
blobs (all kinks should be symmetric and therefore be substantial in
each direction)
Fixes https://gitlab.com/kicad/code/kicad/issues/14130
2023-03-06 16:14:34 -08:00
e066454c61
Zones: use metric defaults and limits instead of mixed units
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Update testcases to reflect new defaults
2023-02-11 07:39:29 -05:00
675b6b5d5c
Fix logic error in ec4d377d
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Also fixup goldens for importers for new default island mode
2023-01-27 10:16:56 -05:00
cab5f65685
qa/pns: added test case for via drag walkaround
2022-11-18 15:14:34 +01:00
33594e92fa
router: qa test case for backspace (unfix) regression
2022-11-15 23:05:53 +01:00
ab350cbfaa
qa: some trivial test cases for the P&S regressions
2022-10-31 11:49:31 +01:00
9424b166d0
Add regression test case for 12609.
2022-10-09 23:31:26 +01:00
0150655ed3
Fix missing DRC check with via
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When the via is first and not second in our ordering, the hole-copper
clearance was not checked as the track did not have a hole.
We also calculated the NPTH-via clearance incorrectly in the inspector
2022-09-20 13:43:01 -07:00
Seth Hillbrand
Mike Williams
Jon Evans
Jeff Young
jean-pierre charras
John Beard
Alex Shvartzkop
Thomas Pointhuber
Roberto Fernandez Bautista
Tomasz Wlostowski