* Make title capitalization consistant.
* Replace some instances of module with footprint.
* Use angle instead of orientation where appropriate.
* Remove abbreviations where it made sense.
* Coding policy fixes.
*.i : fix coding style issues.
python method: add BOARD_ITEM Duplicate, which is a wrapper to Clone(). ( defined as Cast_to_BOARD_ITEM(selt.Clone()).Cast() )
update some .py examples.
- Removed the friends MODULE and FOOTPRINT_EDIT_FRAME from TEXTE_MODULE
(as in the @todo comment)
- Refactored the Rotate/Flip/Mirror for text in modules into the
TEXTE_MODULE class itself (members RotateWithModule, FlipWithModule,
MirrorWithModule)
- New behaviour in coloring text on screen: reference and value still
take the color from the MOD_TEXT_FR_VISIBLE and MOD_TEXT_BK_VISIBLE
visibles; other text takes the color of the layer containing it
(except when hidden, obviously) but still get its visibility
controlled by those visibles (probably the most intuitive and useful
behaviour)
- Still need to decide: should text on a layer be hidden when the layer
is? Probably yes (still to be implemented);
- Some comment fixed and many cast converted to static_cast
*) When kicad.exe closes a project, close any open KIFACEs so that they cannot
get disassociated from their true PROJECT.
*) Allow loading eeschema library editor from kicad.exe
*) Allow loading pcbnew library editor from kicad.exe
*) Rename LIB_COMPONENT to LIB_PART.
*) Add class PART_LIBS, and PART_LIB.
*) Make PART_LIBS non-global, i.e. PROJECT specific.
*) Implement "data on demand" for PART_LIBS
*) Implement "data on demand" for schematic SEARCH_STACK.
*) Use RSTRINGs to retain eeschema editor's notion of last library and part being edited.
*) Get rid of library search on every SCH_COMPONENT::Draw() call, instead use
a weak pointer.
*) Remove all chdir() calls so projects don't need to be CWD.
*) Romove APPEND support from OpenProjectFiles().
*) Make OpenProjectFiles() robust, even for creating new projects.
*) Load EESCHEMA colors in the KIWAY::OnKiwayStart() rather in window open,
and save them in the .eeschema config file, not in the project file.
*) Fix bug with wxDir() while accessing protected dirs in kicad.exe
*) Consolidate template copying into PROJECT class, not in kicad.exe source.
*) Generally untangle eeschema, making its libraries not global but rather
held in the PROJECT.
2) Change from legacy Cu stack to counting down from top=(F_Cu or 0).
The old Cu stack required knowing the count of Cu layers to make
sense of the layer number when converting to many exported file types.
The new Cu stack is more commonly used, although ours still gives
B_Cu a fixed number.
3) Introduce class LSET and enum LAYER_ID.
4) Change *.kicad_pcb file format version to 4 from 3.
5) Change fixed names Inner1_Cu-Inner14_Cu to In1_Cu-In30_Cu and their
meanings are typically flipped.
6) Moved the #define LAYER_N_* stuff into legacy_plugin.cpp where they
can die a quiet death, and switch to enum LAYER_ID symbols throughout.
7) Removed the LEGACY_PLUGIN::Save() and FootprintSave() functions.
You will need to convert to the format immediately, *.kicad_pcb and
*.kicad_mod (=pretty) since legacy format was never going to know
about 32 Cu layers and additional technical layers and the reversed Cu
stack.
Removed SetCurrentClassName() (it was not used anywhere and less safe than SetCurrentClass()).
Added BOARD_DESIGN_SETTIGNS::GetDefault() to make some pieces of shorter and clearer.
Most of the changes are just adding GetDesignSettings() before every occurence of m_NetClasses.
More complex changes:
class_netclass.cpp - NETCLASS does not store the pointer to the parent BOARD anymore. Added function SetParams( BOARD_DESIGN_SETTINGS& ).
class_netclass.h - Removed GetTrackMinWidth(), GetViaMinDiameter(), GetViaMinDrill(), GetuViaMinDiameter(), GetuViaMinDrill() as they were refering to BOARD_DESIGN_SETTINGS anyway (they are not net class specific).
kicad_plugin.cpp - filters out empty nets (that are anyway not saved) when storing net class information. Previously it was done in NETCLASS::Format() function.
- Converted the Next/Prev C casts to static casts and removed the type
unsafe ones
- Splitted as virtual the VIA::Flip member instead of using RTTI
- Heavily refactored the 'unconnected track' cleanup routine
- Misc constification
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
! The initial testing of this commit should be done using a Debug build so that
all the wxASSERT()s are enabled. Also, be sure and keep enabled the
USE_KIWAY_DLLs option. The tree won't likely build without it. Turning it
off is senseless anyways. If you want stable code, go back to a prior version,
the one tagged with "stable".
* Relocate all functionality out of the wxApp derivative into more finely
targeted purposes:
a) DLL/DSO specific
b) PROJECT specific
c) EXE or process specific
d) configuration file specific data
e) configuration file manipulations functions.
All of this functionality was blended into an extremely large wxApp derivative
and that was incompatible with the desire to support multiple concurrently
loaded DLL/DSO's ("KIFACE")s and multiple concurrently open projects.
An amazing amount of organization come from simply sorting each bit of
functionality into the proper box.
* Switch to wxConfigBase from wxConfig everywhere except instantiation.
* Add classes KIWAY, KIFACE, KIFACE_I, SEARCH_STACK, PGM_BASE, PGM_KICAD,
PGM_SINGLE_TOP,
* Remove "Return" prefix on many function names.
* Remove obvious comments from CMakeLists.txt files, and from else() and endif()s.
* Fix building boost for use in a DSO on linux.
* Remove some of the assumptions in the CMakeLists.txt files that windows had
to be the host platform when building windows binaries.
* Reduce the number of wxStrings being constructed at program load time via
static construction.
* Pass wxConfigBase* to all SaveSettings() and LoadSettings() functions so that
these functions are useful even when the wxConfigBase comes from another
source, as is the case in the KICAD_MANAGER_FRAME.
* Move the setting of the KIPRJMOD environment variable into class PROJECT,
so that it can be moved into a project variable soon, and out of FP_LIB_TABLE.
* Add the KIWAY_PLAYER which is associated with a particular PROJECT, and all
its child wxFrames and wxDialogs now have a Kiway() member function which
returns a KIWAY& that that window tree branch is in support of. This is like
wxWindows DNA in that child windows get this member with proper value at time
of construction.
* Anticipate some of the needs for milestones B) and C) and make code
adjustments now in an effort to reduce work in those milestones.
* No testing has been done for python scripting, since milestone C) has that
being largely reworked and re-thought-out.
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
Fixed crashes of ratsnest when a pointer for an item has changed after undo/redo operations.
Vias are properly removed from ratsnest (pcbnew/class_board.cpp).
Now, nets are saved with consecutive net codes (both modern & legacy plugins).
Zones are saved together with their nets, without depending on the fact if there are any pads with such net. Therefore validation of zone net names was removed (pcbnew/class_board.cpp).
Performed tests:
- Changed a pad's net name from empty to existent - ok, name was changed.
- Changed a pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty.
- Changed a pad's net name from existent to empty - ok, net name became empty
- Changed a pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed.
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
- KiCad s-expr & legacy, Eagle, P-CAD boards seem to load without any problem (they also contain correct net names assigned to the appropriate pads). All types of board file formats were loaded, then saved in sexpr format and reopened with a KiCad built from the master branch (without my modifications).
- A few boards were also saved using the legacy format and were opened with the master KiCad without any issues.
- Change a net name for a pad, restore with undo/redo - ok
- Remove everything, restore with undo - ok
- Remove everything, reload netlist - ok
Differences observed between files saved by the master branch KiCad and this one:
- list of nets are not saved in any particular order, so net codes may differ
- the default net class does not contain the unconnected net
GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it.
Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions).
BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far.
Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED.
Performed tests:
- loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok
- load a simple project, reload netlist after changing connections in eeschema - ok
- save & reload a board - ok, but still contain empty nets
- remove everything, restore with undo - ok
- remove everything, reload netlist - ok
- changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok
- zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
- ZONE_CONTAINER::m_Netname field
- ZONE_CONTAINER::SetNetName()
- ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM]
- ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used]
- ZONE_CONTAINER::SetNetNameFromNetCode()
Performed tests:
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM.
Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h.
Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h.
I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew.
Performed tests:
- changed pad's net name from empty to existent - ok, name was changed
- changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty
- changed pad's net name from existent to empty - ok, net name became empty
- changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed
- (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept
- loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct
- imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct
- saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
Net codes are updated upon net list update. (BOARD::ReplaceNetlist())
Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes.
On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net).
Removed COMPONENT_NET::m_netNumber, as it was not used anywhere.
Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique.
It seems that at this point:
- Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well.
- Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList())
Performed tests:
- Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps.
- Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above.
- Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit.
- Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied.
- Eagle & KiCad legacy boards seem to load without any problem.
Pcbnew: Code cleaning and bug fix in autoplace functions
Dialog exchange footprints has now a separate button to update the .cmp file, only on request.
pass into an HTML rendering panel and otherwise look goofey.
*) Implement BOARD::Move() can call it from EAGLE_PLUGIN::Load().
*) When USE_FP_LIB_TABLE, tolerate blank nicknames in FPIDs coming from eeschema.
See the switch for this in pcbnew/netlist.cpp as ALLOW_PARTIAL_FPID.
*) Add an assert and a try catch block to figure out that View does not
like some eagle pcb board. bitset::set() is getting a -1 value and firing
an exception.
Maciej Suminski
Wayne Stambaugh
jean-pierre charras
Lorenzo Marcantonio
Dick Hollenbeck