GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it.
Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions).
BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far.
Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED.
Performed tests:
- loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok
- load a simple project, reload netlist after changing connections in eeschema - ok
- save & reload a board - ok, but still contain empty nets
- remove everything, restore with undo - ok
- remove everything, reload netlist - ok
- changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok
- zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
- ZONE_CONTAINER::m_Netname field
- ZONE_CONTAINER::SetNetName()
- ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM]
- ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used]
- ZONE_CONTAINER::SetNetNameFromNetCode()
Performed tests:
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM.
Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h.
Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h.
I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew.
Performed tests:
- changed pad's net name from empty to existent - ok, name was changed
- changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty
- changed pad's net name from existent to empty - ok, net name became empty
- changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed
- (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept
- loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct
- imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct
- saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
Net codes are updated upon net list update. (BOARD::ReplaceNetlist())
Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes.
On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net).
Removed COMPONENT_NET::m_netNumber, as it was not used anywhere.
Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique.
It seems that at this point:
- Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well.
- Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList())
Performed tests:
- Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps.
- Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above.
- Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit.
- Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied.
- Eagle & KiCad legacy boards seem to load without any problem.
Pcbnew: Code cleaning and bug fix in autoplace functions
Dialog exchange footprints has now a separate button to update the .cmp file, only on request.
pass into an HTML rendering panel and otherwise look goofey.
*) Implement BOARD::Move() can call it from EAGLE_PLUGIN::Load().
*) When USE_FP_LIB_TABLE, tolerate blank nicknames in FPIDs coming from eeschema.
See the switch for this in pcbnew/netlist.cpp as ALLOW_PARTIAL_FPID.
*) Add an assert and a try catch block to figure out that View does not
like some eagle pcb board. bitset::set() is getting a -1 value and firing
an exception.
Remove KICAD_GOST option because it is now useless: the 2 GOST options are now selectable at run time and are:
* specific page layouts (now user definable, and the GOST page layouts are available in template folder)
* notation for multiple parts per package (made in eeschema, preference menu)
Enhancement in Excellon file reader: accept Feed Rate and Spindle Speed definitions in Tool information line (but does not use them)
Eeschema: better name for m_SheetList (changed to m_SheetPath) member of class NETLIST_OBJECT.
* Add code to CvPcb to handle assigning component footprints from the
footprint library table instead of the search path method.
* Add code to CvPcb to allow editing of the footprint library table.
* CvPcb footprint and component panes display fully qualified FPID names.
* Make CvPcb library pane display footprint library table nicknames instead
of library file names.
* Add code to FP_LIB_TABLE object to test the paths in the table against the
list of libraries loaded from the project file.
* Add code to FP_LIB_TABLE to convert assigned footprints in a NETLIST from
legacy format to footprint library table format.
* Split out COMPONENT_NET, COMPONENT, and NETLIST objects from netlist_reader
files and create new pcb_netlist files.
* Fix minor wxListView scroll bar sizing issues.
* Add new token and code to save and load FPID nickname in board file.
* Add new token and code to save and load FPID nickname in s-expression net
list file.
* Add WX_STRING_REPORT object to dump strings to a wxString object.
* Use FPID instead of wxString in MODULE object.
* Use FPID instead of wxString when loading and saving files.
* Use FPID in COMPONENT object.
* Add wxString helper functions and comparison operators to FPID.
* Add fp_lib token to pcb and netlist file formats.
* Add code to load and save FPIDs to pcb file format.
* Fix segfault when deleting invalid footprint library tables in Pcbnew
in non footprint library table build.
* Fix bug when counting the number of mod files in
EDA_APP::SetFootprintLibTablePath();
Netlist dialog: add option to report only most important messages. Useful for large boards.
class REPORTER: add features to allow a basic message filtering (flags to report all/warning/error messages)
Fix Bug #1214599 ( tools are deselected on Move command )
* Fix both legacy and s-expression netlist readers when footprints are
assigned in the netlist.
* Add some helper functions to NETLIST for detecting when footprints are set
or not set and when they have been changed while loading the .cmp file.
* Rename a few functions to improve their readability.
* Tweak the NETLIST_READER code to allow for component footprint names that
are not found in any library to generate a warning instead of an error and
update the board accordingly.
* Don't display undo warning in netlist dialog when dry run option selected.
* Rename netlist_reader_common.cpp to netlist_reader.cpp
* Rename netlist_reader_firstformat.cpp to legacy_netlist_reader.cpp
* Rename netlist_reader_kicad.cpp to kicad_netlist_reader.cpp
* Remove cvpcb/read_write_cmpfile.cpp and move the single function it
contained into cvframe.cpp
* Remove cvpcb/loadcmp.cpp and move the single function it contained into
class_DisplayFootprintsFrame.cpp.
* Remove cvpcb/readschematicnetlist.cpp and move the single function it
contained into cvframe.cpp.
* Remove cvpcb/setvisu.cpp and move the few functions it contained into
the appropriate source file.
* Create separate NETLIST object to hold contents of netlist files.
* Read entire netlist and footprint link files before making applying
changes to board.
* Add BOARD::ReplaceNetlist() function to eliminate the calls between the
NETLIST_READER, PCB_EDIT_FRAME, and BOARD objects.
* Change placement of new components below the center of the current board
or in the center of the page if the BOARD is empty.
* Add dry run option to netlist dialog to print changes to message control
without making changes.
* Add button to netlist dialog to allow saving contents of message control
to a file.
* Eliminate the need to compile netlist_reader_*.cpp in both CvPcb and Pcbnew.
* Add netlist_reader_*.cpp to the pcbcommon library.
* Remove redundant load component link file code from CvPcb.
* Modify CvPcb new to work with the new NETLIST_READER object.
* Add compare() function and < and == operators to FPID object.
* Add REPORTER class to hide an underlying string writing implementation for
use in low level objects. Thank you Dick for the idea.
* Lots of minor coding policy, Doxygen comment, and missing license fixes.
* Complete encapsulation of the ZONE_CONTAINER class.
* Fixed a bug in the EDA_TEXT::Format() default effects behavior due to
improper conversion to internal units and missing test for default
thickness.
* Improved grammar of some Pcbnew context menu strings.
* Moved some more cleverly hidden BOARD object methods into class_board.cpp.
* Lots of coding policy and documentation fixes.
standard layer name support from BOARD::GetLayerName(). This function evolved
in a contorted direction over time, and was being asked to return one of 3
different kinds of layer names, even though it only took a boolean to control
that choice.
Users are better served by forcing them to get to know the concise new
English Standard layer names. This is because these concise names show up
in the "pretty" footprint/module files as the standard representation of
both feature and copper layers.
Change the name of BOARD::GetDefaultLayerName() to GetStandardLayerName().
Drop boolean argument to both BOARD::GetStandardLayerName() and
BOARD::GetLayerName().
* Improve MSG_PANEL_ITEM to handle message panel information.
* Create containers for passing message panel items between objects and
the message panel.
* Rename EDA_ITEM::DisplayInfo to EDA_ITEM::GetMsgPanelInfo.
* Remove all direct manipulation of EDA_DRAW_FRAME from all objects derived
from EDA_ITEM.
This required the additional compiler command line option "-std=c++0x".
2) Switch to unique_ptr from auto_ptr which is C++ deprecated.
3) Change to new English layer names per mailing list discussion, see class_board.cpp.
4) When saving to *.kicad_pcb or *.kicad_mod, identify opportunities to use wildcard
layer sets, for pads so far.
5) Switch to two std::string hashtables in pcb_parser.cpp, away from one wxString based one
for layer names and layer sets mapping. One hashtable holds the mask, the other the index.
Layer sets are only in the mask table.
6) Move "LOCALE_IO toggle" into PCB_IO::Format() since it is a public API function and
caller should find it as convenient as possible to use. LOCALE_IO should handle
nesting OK in the case where public Format() is called from one of the Footprint*()
functions.
7) Drop support for "export module to new library". Creating new libraries will have to
be handled in concert with library table entries, and we've talked recently about
creating a better footprint library manager, one that resides in a DLL/DSO. So
this kind of functionality needs to be handled in there in the near future.
8) Change name of exported PCB_IO module/footprint to *.kicad_mod and not *.emp.
can be parsed, since they do not have an overriding layer name map
like a BOARD does.
Avoid doubly looking up hashtable entries in m_layerMap.
Minor code reformatting.
and therefore tracks are now dragged when a end point is inside a pad, not necessary on the pad position.
However, drag functions still need more cleanup.
When reading board files, the net 0 was stored twice.
It creates only log messges in debug mode, because the list of nets is rebuild after reading files.
Use now English layers names to build filenames in plot functions (for techical layers), because translated names create sometimes problems in filenames.
(should do not change anything for English users)
* Use index when saving layers to handle translated layer names.
* Add LOCALE_IO switcher when loading s-expression format.
* Make SEGVIA default to through hole to improve file size.
* Don't save default orientation of 0 degrees in TEXTE_MODULE and TEXTE_PCB.
* Don't save default zone configuration parameters.
* Save multiple zone corners on a single line.
* Fixed missing ( check in graphic and module arc parsers.
* Consistency improvements for DRAWSEGMENT and EDGE_MODULE objects.
* Minor tweaks to D_PAD formatting.
* Add s-expression file parser object and keyword files.
* Fix minor issues with s-expression file formatting.
* Fix a minor bug the zone container fill state parsing in the legacy plugin.
* Move EDA_TEXT visibility definition to eda_text.h.
* Add minor BOARD_ITEM object improvements to support s-expression file
parser.
* Derive the pcbnew copper zone and non-copper zone dialog windows from DIAG_SHIM,
which injects some template code.
* Update UIpolicies.txt to talk about DIALOG_SHIM support.
* Add zone support to eagle_plugin.
* Organize ZONE_CONTAINER class declaration for future privacy and accessors.
* Move board item object Format() functions into PCB_IO object.
* Change file format to use layer names instead of numbers.
* Change file extension to kicad_pcb.
// This provides better project control over rounding to int from double
// than wxRound() did. This scheme provides better logging in Debug builds
// and it provides for compile time calculation of constants.
#include <stdio.h>
#include <assert.h>
#include <limits.h>
//-----<KiROUND KIT>------------------------------------------------------------
/**
* KiROUND
* rounds a floating point number to an int using
* "round halfway cases away from zero".
* In Debug build an assert fires if will not fit into an int.
*/
#if defined( DEBUG )
// DEBUG: a macro to capture line and file, then calls this inline
static inline int KiRound( double v, int line, const char* filename )
{
v = v < 0 ? v - 0.5 : v + 0.5;
if( v > INT_MAX + 0.5 )
{
printf( "%s: in file %s on line %d, val: %.16g too ' > 0 ' for int\n", __FUNCTION__, filename, line, v );
}
else if( v < INT_MIN - 0.5 )
{
printf( "%s: in file %s on line %d, val: %.16g too ' < 0 ' for int\n", __FUNCTION__, filename, line, v );
}
return int( v );
}
#define KiROUND( v ) KiRound( v, __LINE__, __FILE__ )
#else
// RELEASE: a macro so compile can pre-compute constants.
#define KiROUND( v ) int( (v) < 0 ? (v) - 0.5 : (v) + 0.5 )
#endif
//-----</KiROUND KIT>-----------------------------------------------------------
// Only a macro is compile time calculated, an inline function causes a static constructor
// in a situation like this.
// Therefore the Release build is best done with a MACRO not an inline function.
int Computed = KiROUND( 14.3 * 8 );
int main( int argc, char** argv )
{
for( double d = double(INT_MAX)-1; d < double(INT_MAX)+8; d += 2.0 )
{
int i = KiROUND( d );
printf( "t: %d %.16g\n", i, d );
}
return 0;
}
* Move EDA_TEXT object into separate header and source file.
* Compile EDA_TEXT class separately for BOARD_ITEM and SCH_ITEM units.
* Compile PAGE_INFO class separately for BOARD_ITEM and SCH_ITEM units.
* Minor formatting tweaks to Pcbnew s-expression file.
* Move internal unit formatting functions into BOARD_ITEM and SCH_ITEM.
* Save dialog now supports saving boards to new file format.
* Add CMake option to build s-expression file save.
* Add check to main CMakeList.txt file to make sure nanometers are
enables when the new file format is built.
* Minor tweaks to object format functions for improved output.
* Rename kicad_plugin.h/cpp to legacy_plugin.h/cpp.
* Add s-expression Format() function to all objects derived from
BOARD_ITEM.
* Add s-expression Format() function to base objects as required.
* Add functions to convert coordinates from base internal units
(nanometers) to millimeter string for writing to s-expression
file.
* Add temporary dummy conversion functions to prevent link errors
until schematic and board object and action code can be separated
into DSO/DLL.
* Add CMake build option to build Pcbnew with nanometer internal
units.
* Remove unnecessary copy constructors from board and module library
objects.
* Add doClone() method to board and library objects.
* Add comment to class definitions where the default copy constructor
generated by the compiler was adequate.
* Replace copy method with clone method where applicable.
* Remove DuplicateStruct() function.
* Remove track object copy function.
This feature is very useful for electronics hobbyists who use DIY PCB technology
(both toner transfer and photoresist methods).
Also width correction may be useful for PCB designers who take care of track width etching.
This patch also fixes some minor PS plotting issues.
which should eventually go away in favor of kicad_plugin.cpp.
Add CMake options USE_NEW_PCBNEW_LOAD and USE_NEW_PCBNEW_SAVE, which should not be
used yet, and both default to OFF accordingly.
* Removed Pcb_Frame argument from BOARD() constructor, since it precludes
having a BOARD being edited by more than one editor, it was a bad design.
And this meant removing m_PcbFrame from BOARD.
* removed BOARD::SetWindowFrame(), and BOARD::m_PcbFrame
* Removed the global BOARD_DESIGN_SETTINGS which was in class_board.cpp
* added BOARD_DESIGN_SETTINGS to the BOARD class, a full instance
* a couple dialogs now only change BOARD_DESIGN_SETTINGS when OK is pressed,
such as dialog_mask_clearance, dialog_drc, etc.
* Removed common/pcbcommon.cpp's int g_CurrentVersionPCB = 1 and replaced it
with build_version.h's #define BOARD_FILE_VERSION, although there may be a
better place for this constant.
* Made the public functions in PARAM_CFG_ARRAY be type const.
void SaveParam(..) const and void ReadParam(..) const
* PARAM_CFG_BASE now has virtual destructor since we have various way of
destroying the derived class and boost::ptr_vector must be told about this.
* Pass const PARAM_CFG_ARRAY& instead of PARAM_CFG_ARRAY so that we can use
an automatic PARAM_CFG_ARRAY which is on the stack.\
* PCB_EDIT_FRAME::GetProjectFileParameters() may no longer cache the array,
since it has to access the current BOARD and the BOARD can change.
Remember BOARD_DESIGN_SETTINGS are now in the BOARD.
* Made the m_BoundingBox member private, this was a brutally hard task,
and indicative of the lack of commitment to accessors and object oriented
design on the part of KiCad developers. We must do better.
Added BOARD::GetBoundingBox, SetBoundingBox(), ComputeBoundingBox().
* Added PCB_BASE_FRAME::GetBoardBoundingBox() which calls BOARD::ComputeBoundingBox()
the GetPosition() and SetPosition() changes. It also starts towards making m_Orientation
and m_Thickness fields private with accessors, but does not complete this latter goal.
* Correct all user strings and comments for the correct capitalization of
application names according to JP. They are KiCad, Pcbnew, CvPcb,
Eeschema, and GerbView.
* Add a note the the user interface policy about the correct capitalization.
* All header files used to create the PCB common library now compile as
stand alone code. This prevents the need to define them in a specific
order to make source code compile properly. It should also now be
possible to relocate the source code to build the common PCB library
to a separate folder.
Maciej Suminski
Dick Hollenbeck
jean-pierre charras
Wayne Stambaugh
Lorenzo Marcantonio
Heikki Pulkkinen
Alexander Zakamaldin
Vladimir Ur
Marco Mattila