2) Change from legacy Cu stack to counting down from top=(F_Cu or 0).
The old Cu stack required knowing the count of Cu layers to make
sense of the layer number when converting to many exported file types.
The new Cu stack is more commonly used, although ours still gives
B_Cu a fixed number.
3) Introduce class LSET and enum LAYER_ID.
4) Change *.kicad_pcb file format version to 4 from 3.
5) Change fixed names Inner1_Cu-Inner14_Cu to In1_Cu-In30_Cu and their
meanings are typically flipped.
6) Moved the #define LAYER_N_* stuff into legacy_plugin.cpp where they
can die a quiet death, and switch to enum LAYER_ID symbols throughout.
7) Removed the LEGACY_PLUGIN::Save() and FootprintSave() functions.
You will need to convert to the format immediately, *.kicad_pcb and
*.kicad_mod (=pretty) since legacy format was never going to know
about 32 Cu layers and additional technical layers and the reversed Cu
stack.
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
- ZONE_CONTAINER::m_Netname field
- ZONE_CONTAINER::SetNetName()
- ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM]
- ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used]
- ZONE_CONTAINER::SetNetNameFromNetCode()
Performed tests:
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM.
Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h.
Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h.
I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew.
Performed tests:
- changed pad's net name from empty to existent - ok, name was changed
- changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty
- changed pad's net name from existent to empty - ok, net name became empty
- changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed
- (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept
- loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct
- imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct
- saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
comment for GITHUB_PLUGIN which should flow into Doxygen output.
*) Rewrote:
PCB_BASE_FRAME::Save_Module_In_Library(): now uses fp-lib-table and PROPERTIES.
PCB_EDIT_FRAME::ArchiveModulesOnBoard(): now can archive to any writable library type.
PCB_BASE_FRAME::SelectLibrary(): is now generic for selecting a library, not just the active library.
* Use FPID instead of wxString in MODULE object.
* Use FPID instead of wxString when loading and saving files.
* Use FPID in COMPONENT object.
* Add wxString helper functions and comparison operators to FPID.
* Add fp_lib token to pcb and netlist file formats.
* Add code to load and save FPIDs to pcb file format.
* Fix segfault when deleting invalid footprint library tables in Pcbnew
in non footprint library table build.
* Fix bug when counting the number of mod files in
EDA_APP::SetFootprintLibTablePath();
* Add footprint library table loading to footprint editor.
* Overload FOOTPRINT_INFO::ReadFootprintFiles() to read footprints from the
footprint library tables.
* Fix a bug in FP_LIB_TABLE::IsEmpty() when the table has a fallback table.
* Add code to FOOTPRINT_EDIT_FRAME to use footprint library tables.
* Add an optional build time version of PCB_EDIT_FRAME::loadFootprints() to
populate netlist footprints from footprint library table.
* Remove adding footprints to board whenever GetModuleLibrary() is called and
move loading locally as required.
* Add missing source file license comments and coding policy fixes.
File "rules" has instructional text as comments near top.
2) Convert all text files in repo to LF line ending form.
Any checkout done with "rules" in play will convert the working
tree to native line ending, while keeping repo as LF line ending.
The plan goes like this:
- eeschema still uses int in decidegrees
- all the other things internally use double in decidegrees (or radians
in temporaries)
- in pcbnew UI the unit is *still* int in decidegrees
The idea is to have better precision everywhere while keeping the user with int i
angles. Hopefully, if a fractional angle doesn't come in from the outside, everything
should *look* like an integer angle (unless I forgot something and it broke)
When the time comes, simply updating the UI for allowing doubles from the user should
be enough to get arbitrary angles in pcbnew.
- Removed spurious int casts (these are truncated anyway and will break
doubles)
- Applied the Distance, GetLineLength, EuclideanNorm, DEG2RAD, RAD2DEG
ArcTangente and NORMALIZE* functions where possible
- ArcTangente now returns double and handles the 0,0 case like atan2, so
it's no longer necessary to check for it before calling
- Small functions in trigo moved as inline
* Complete encapsulation of the ZONE_CONTAINER class.
* Fixed a bug in the EDA_TEXT::Format() default effects behavior due to
improper conversion to internal units and missing test for default
thickness.
* Improved grammar of some Pcbnew context menu strings.
* Moved some more cleverly hidden BOARD object methods into class_board.cpp.
* Lots of coding policy and documentation fixes.
* Complete encapsulation of the MODULE class.
* Complete encapsulation of the EDA_TEXT class.
* Encapsulate most of the ZONE_CONTAINER class.
* Add pcbcommon library as a dependency for reSWIGging the scripting
support. This should cover most dependency cases.
* Encapsulate most of the MODULE class.
* Start encapsulating the DIMENSION class.
* Lay some groundwork for EDA_TEXT encapsulation.
* Move cleverly hidden MODULE functions into class_module.cpp.
* Use std::swap to exchange TEXTE_PCB values for undo/redo.
* Remove unused members from MODULE class.
* The usual coding policy and documentation fixes.
* Improve the stable and testing build version option logic.
* Use CMake FindPythonInterp to configure the Python interpreter.
* Use Python interpreter to determine the system Python module install
path if not already defined on the command line.
* Add header symbol checks for asinh(), acosh(), and atanh().
* Add test source to check for isinf() which can be defined as a C++template.
* Replace conditional compile on windows systems for aXXXh() with CMake
configuration tests.
* A few minor MSVC compile fixes.
* Fix incorrect python environment string in fixswigimports.py
* Create a separate document for KiCad CMake build options.
* Create a separate how to compile KiCad on Windows document.
Henri Valta
Dick Hollenbeck
Lorenzo Marcantonio
Maciej Suminski
Marco Serantoni
jean-pierre charras
Wayne Stambaugh
Alexander Lunev