Also in global vas edition, always set the via drill to the actual current netclass value (do not use anymore the 0 value as default), to avoid unwanted invisible drill change for existing vias when the netclass value is modified.
This is consistent with the via creation, in GAL mode
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
- Removed spurious int casts (these are truncated anyway and will break
doubles)
- Applied the Distance, GetLineLength, EuclideanNorm, DEG2RAD, RAD2DEG
ArcTangente and NORMALIZE* functions where possible
- ArcTangente now returns double and handles the 0,0 case like atan2, so
it's no longer necessary to check for it before calling
- Small functions in trigo moved as inline
* Correct all user strings and comments for the correct capitalization of
application names according to JP. They are KiCad, Pcbnew, CvPcb,
Eeschema, and GerbView.
* Add a note the the user interface policy about the correct capitalization.
* All header files used to create the PCB common library now compile as
stand alone code. This prevents the need to define them in a specific
order to make source code compile properly. It should also now be
possible to relocate the source code to build the common PCB library
to a separate folder.