Removes the need of using the legacy code in polygon/PolyLine.{h,cpp},
refactoring all CPolyLine instances with SHAPE_POLY_SET instances.
The remaining legacy methods have been ported to SHAPE_POLY_SET;
mainly: Chamfer, Fillet, {,Un}Hatch.
The iteration over the polygon vertices have been simplified using the
family of ITERATOR classes.
BOARD::GetBoundingBox() now directly calls BOARD::ComputeBoundingBox()
and there is a new method BOARD::GetBoardEdgesBoundingBox() used for
call sites that needed to use ComputeBoundingBox( true ) in the past.
This allows COMMON_TOOLS to implement ZoomFitScreen without knowledge
of the BOARD class.
Make all EDA_TEXT data private and rename accessors to avoid function
name collisions in derived classes.
Overload EDA_TEXT's SetTextAngle() and SetEffects() in TEXTE_PCB.
Add support for preserving Reference text position, size, orientation
during a netlist import into a BOARD, as well as the one off footprint
update dialog.
Rename FPID to LIB_ID as is now used as a generic library identifier and
is no longer specific to footprints.
Remove all mention of footprint from the new LIB_ID doxygen comments and
code.
Rename files fpid.h and fpid.cpp to lib_id.h and lib_id.cpp.
Rename fp_lib_table.keywords file to lib_table.keywords and adjust CMake
build dependencies accordingly.
Update all source files effected by the code and file name changes.
Update .gitignore for file name changes.
* Factor out PROPERTIES object from the PCB plugin code and move it into
common so it can be used by both the Pcbnew and Eeschema plugins.
* Add schematic I/O plugin manager for loading and saving schematic and
component library files.
* Add initial attempt at a parser for current schematic file format. This
parser will be infinitely more strict than the current parser which is very
forgiving in what it parses.
* Make minor changes to the base bitmap class to support the new parser.
* Add find root sheet support to sheet object to allow fetching the root
sheet from any sheet in the stack.
Currently, kicad_pcb files have a (version ...) tag, but it is ignored. This
commit does the following:
1. Parse the version. If it's later than the last supported version, present an
alternative error message suggesting an upgrade if the file does not load
correctly. The version will be interpreted as an integer YYYYMMDD to suggest
a KiCad release date.
2. Accept a (version ...) tag also in kicad_mod files, but do not write them
yet. If no version tag is present in these files, assume the version to be that
of the current format version at the time of this commit.
This is meant to be merged to the 4.x stable series, and preps for KiCad 5
which will start emitting version tags also in footprints - users with what
will then be 'old stable' will not get a parse error when we introduce this for
footprints, and we can safely increment the format version later.
PAD_SHAPE_T and PAD_ATTR_T still have a double definition (new names and old names) to be sure python scripts are nor broken by the change.
PAD_DRILL_SHAPE_T does not have a double definition, because it is unlikely oblong holes are used in python scripts.
Double definitions will be removed in the (next) future.
* Cleanup namespace in enum ZoneConnection in pcbnew/zones.h to self-explained names unification: PAD_ZONE_CONN_INHERITED, PAD_ZONE_CONN_NONE,PAD_ZONE_CONN_THERMAL,PAD_ZONE_CONN_FULL, PAD_ZONE_CONN_THT_THERMAL
Eagle plugin: if a board has a odd number of copper layers, the converted board copper layer count is rounded to the next even count (a odd count creates issues in .kicad_pcb files).
2) Change from legacy Cu stack to counting down from top=(F_Cu or 0).
The old Cu stack required knowing the count of Cu layers to make
sense of the layer number when converting to many exported file types.
The new Cu stack is more commonly used, although ours still gives
B_Cu a fixed number.
3) Introduce class LSET and enum LAYER_ID.
4) Change *.kicad_pcb file format version to 4 from 3.
5) Change fixed names Inner1_Cu-Inner14_Cu to In1_Cu-In30_Cu and their
meanings are typically flipped.
6) Moved the #define LAYER_N_* stuff into legacy_plugin.cpp where they
can die a quiet death, and switch to enum LAYER_ID symbols throughout.
7) Removed the LEGACY_PLUGIN::Save() and FootprintSave() functions.
You will need to convert to the format immediately, *.kicad_pcb and
*.kicad_mod (=pretty) since legacy format was never going to know
about 32 Cu layers and additional technical layers and the reversed Cu
stack.
Removed SetCurrentClassName() (it was not used anywhere and less safe than SetCurrentClass()).
Added BOARD_DESIGN_SETTIGNS::GetDefault() to make some pieces of shorter and clearer.
Most of the changes are just adding GetDesignSettings() before every occurence of m_NetClasses.
More complex changes:
class_netclass.cpp - NETCLASS does not store the pointer to the parent BOARD anymore. Added function SetParams( BOARD_DESIGN_SETTINGS& ).
class_netclass.h - Removed GetTrackMinWidth(), GetViaMinDiameter(), GetViaMinDrill(), GetuViaMinDiameter(), GetuViaMinDrill() as they were refering to BOARD_DESIGN_SETTINGS anyway (they are not net class specific).
kicad_plugin.cpp - filters out empty nets (that are anyway not saved) when storing net class information. Previously it was done in NETCLASS::Format() function.
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it.
Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions).
BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far.
Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED.
Performed tests:
- loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok
- load a simple project, reload netlist after changing connections in eeschema - ok
- save & reload a board - ok, but still contain empty nets
- remove everything, restore with undo - ok
- remove everything, reload netlist - ok
- changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok
- zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
- ZONE_CONTAINER::m_Netname field
- ZONE_CONTAINER::SetNetName()
- ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM]
- ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used]
- ZONE_CONTAINER::SetNetNameFromNetCode()
Performed tests:
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM.
Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h.
Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h.
I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew.
Performed tests:
- changed pad's net name from empty to existent - ok, name was changed
- changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty
- changed pad's net name from existent to empty - ok, net name became empty
- changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed
- (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept
- loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct
- imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct
- saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
* Replace illegal file system characters when reading legacy libraries to
prevent FPID parsing errors and allow saving to PRETTY file format.
* Create validator to filter illegal file system characters from footprint
name text edit controls to prevent issues when saving to PRETTY file format.
* Add missing source file licenses and some minor coding policy fixes.
comment for GITHUB_PLUGIN which should flow into Doxygen output.
*) Rewrote:
PCB_BASE_FRAME::Save_Module_In_Library(): now uses fp-lib-table and PROPERTIES.
PCB_EDIT_FRAME::ArchiveModulesOnBoard(): now can archive to any writable library type.
PCB_BASE_FRAME::SelectLibrary(): is now generic for selecting a library, not just the active library.
FIX: unique renaming of eagle footprints by substituting illegal : and / with URL encoding technique.
ADD: window resize border to DisplayError() windows.
Eagle plugin: filter and replace not allowed chars in FPID(-':' and '/') by _ or -, if they are used in Eagle footprint names (otherwise, boards converted and saved under kicad_pcb format are not readable by Pcbnew).
pass into an HTML rendering panel and otherwise look goofey.
*) Implement BOARD::Move() can call it from EAGLE_PLUGIN::Load().
*) When USE_FP_LIB_TABLE, tolerate blank nicknames in FPIDs coming from eeschema.
See the switch for this in pcbnew/netlist.cpp as ALLOW_PARTIAL_FPID.
*) Add an assert and a try catch block to figure out that View does not
like some eagle pcb board. bitset::set() is getting a -1 value and firing
an exception.